Patents by Inventor Masanobu Ohmura
Masanobu Ohmura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11067916Abstract: A driving apparatus comprising a driving circuit is provided. The driving circuit includes an output terminal to which the load element is connected, a current output circuit configured to supply a current to the load element, a voltage supply circuit configured to apply a voltage to the load element, a first signal line configured to control a timing at which the current output circuit starts supplying a current to the load element and a second signal line configured to control a timing at which the voltage supply circuit is turned off. The voltage supply circuit starts applying a voltage before the current output circuit supplies a current to the load element, and a timing at which the current output circuit starts supplying a current differs from a timing at which the voltage supply circuit turns off application of a voltage.Type: GrantFiled: August 25, 2020Date of Patent: July 20, 2021Assignee: CANON KABUSHIKI KAISHAInventors: Takanori Suzuki, Masanobu Ohmura, Tatsuya Ryoki
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Publication number: 20210063908Abstract: A driving apparatus comprising a driving circuit is provided. The driving circuit includes an output terminal to which the load element is connected, a current output circuit configured to supply a current to the load element, a voltage supply circuit configured to apply a voltage to the load element, a first signal line configured to control a timing at which the current output circuit starts supplying a current to the load element and a second signal line configured to control a timing at which the voltage supply circuit is turned off. The voltage supply circuit starts applying a voltage before the current output circuit supplies a current to the load element, and a timing at which the current output circuit starts supplying a current differs from a timing at which the voltage supply circuit turns off application of a voltage.Type: ApplicationFiled: August 25, 2020Publication date: March 4, 2021Inventors: Takanori Suzuki, Masanobu Ohmura, Tatsuya Ryoki
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Patent number: 10761470Abstract: A printing apparatus is provided. The apparatus comprises a light-emitting element, a light-receiving element including a first terminal and a second terminal, a reference current generator supplying a reference current, a comparator comparing a monitor current with the reference current, the light-receiving element supplying the monitor current to the second terminal in accordance with a light emission amount, a driver driving the light-emitting element based on an output of the comparator, and a reference voltage controller. The comparator includes a first input terminal connected to the second terminal and a second input terminal. The reference voltage controller supplies a reference voltage selected from at least two voltage values to the second input terminal, and to control the voltage of the second terminal to be a voltage according to the reference voltage.Type: GrantFiled: September 4, 2019Date of Patent: September 1, 2020Assignee: Canon Kabushiki KaishaInventors: Wataru Endo, Masanobu Ohmura, Hirotaka Shiomichi
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Patent number: 10668719Abstract: A recording element substrate includes a substrate, a plurality of energy generating elements arranged on the substrate to form an element row, a plurality of supply ports arranged along the element row to form a supply port row, and a plurality of supply paths extending from the plurality of supply ports along the thickness direction of the substrate, wherein a plurality of beam portions disposed between adjacent supply ports in the direction of the supply port row has a plurality of conductor layers in which a conductor layer including a power supply conductor connected to the energy generating elements and a conductor layer including a ground conductor connected to the energy generating elements, are stacked along the thickness direction of the substrate, and wherein at least one of the plurality of conductor layers is occupied by one power supply conductor or one ground conductor.Type: GrantFiled: September 21, 2018Date of Patent: June 2, 2020Assignee: Canon Kabushiki KaishaInventors: Masataka Sakurai, Nobuyuki Hirayama, Ryo Kasai, Kengo Umeda, Hidenori Yamato, Masanobu Ohmura, Tatsuhito Goden
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Publication number: 20200089155Abstract: A printing apparatus is provided. The apparatus comprises a light-emitting element, a light-receiving element including a first terminal and a second terminal, a reference current generator supplying a reference current, a comparator comparing a monitor current with the reference current, the light-receiving element supplying the monitor current to the second terminal in accordance with a light emission amount, a driver driving the light-emitting element based on an output of the comparator, and a reference voltage controller. The comparator includes a first input terminal connected to the second terminal and a second input terminal. The reference voltage controller supplies a reference voltage selected from at least two voltage values to the second input terminal, and to control the voltage of the second terminal to be a voltage according to the reference voltage.Type: ApplicationFiled: September 4, 2019Publication date: March 19, 2020Inventors: Wataru Endo, Masanobu Ohmura, Hirotaka Shiomichi
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Patent number: 10226921Abstract: A printhead substrate, comprising an electrothermal transducer configured to heat a printing material, a first DMOS transistor configured to drive the electrothermal transducer, a MOS structure forming an anti-fuse element, a second DMOS transistor configured to write information in the anti-fuse element by causing an insulation breakdown of an insulating film of the MOS structure, and a driving unit consisted of at least one MOS transistor and configured to drive the second DMOS transistor.Type: GrantFiled: January 31, 2017Date of Patent: March 12, 2019Assignee: CANON KABUSHIKA KAISHAInventor: Masanobu Ohmura
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Publication number: 20190023007Abstract: A recording element substrate includes a substrate, a plurality of energy generating elements arranged on the substrate to form an element row, a plurality of supply ports arranged along the element row to form a supply port row, and a plurality of supply paths extending from the plurality of supply ports along the thickness direction of the substrate, wherein a plurality of beam portions disposed between adjacent supply ports in the direction of the supply port row has a plurality of conductor layers in which a conductor layer including a power supply conductor connected to the energy generating elements and a conductor layer including a ground conductor connected to the energy generating elements, are stacked along the thickness direction of the substrate, and wherein at least one of the plurality of conductor layers is occupied by one power supply conductor or one ground conductor.Type: ApplicationFiled: September 21, 2018Publication date: January 24, 2019Inventors: Masataka Sakurai, Nobuyuki Hirayama, Ryo Kasai, Kengo Umeda, Hidenori Yamato, Masanobu Ohmura, Tatsuhito Goden
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Patent number: 10105949Abstract: A recording element substrate includes a substrate, a plurality of energy generating elements arranged on the substrate to form an element row, a plurality of supply ports arranged along the element row to form a supply port row, and a plurality of supply paths extending from the plurality of supply ports along the thickness direction of the substrate, wherein a plurality of beam portions disposed between adjacent supply ports in the direction of the supply port row has a plurality of conductor layers in which a conductor layer including a power supply conductor connected to the energy generating elements and a conductor layer including a ground conductor connected to the energy generating elements, are stacked along the thickness direction of the substrate, and wherein at least one of the plurality of conductor layers is occupied by one power supply conductor or one ground conductor.Type: GrantFiled: May 22, 2017Date of Patent: October 23, 2018Assignee: Canon Kabushiki KaishaInventors: Masataka Sakurai, Nobuyuki Hirayama, Ryo Kasai, Kengo Umeda, Hidenori Yamato, Masanobu Ohmura, Tatsuhito Goden
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Publication number: 20180035062Abstract: A plurality of pixels includes a photoelectric conversion unit and the first transistor. A signal line is connected to the plurality of pixels. A second transistor includes a source or a drain electrically connected to the first transistor and includes a gate supplied with a signal corresponding to a reference signal of which a potential changes at a predetermined gradient with time. A first current source is configured to supply a current to the first and second transistors. A control unit is configured to control a voltage between a gate and a source of a third transistor to be a voltage corresponding to a voltage between the gate and the source of the second transistor. A comparator circuit is configured to compare a first current flowing through the third transistor with a reference current.Type: ApplicationFiled: July 21, 2017Publication date: February 1, 2018Inventors: Kentaro Tsukida, Masanobu Ohmura
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Publication number: 20170341377Abstract: A recording element substrate includes a substrate, a plurality of energy generating elements arranged on the substrate to form an element row, a plurality of supply ports arranged along the element row to form a supply port row, and a plurality of supply paths extending from the plurality of supply ports along the thickness direction of the substrate, wherein a plurality of beam portions disposed between adjacent supply ports in the direction of the supply port row has a plurality of conductor layers in which a conductor layer including a power supply conductor connected to the energy generating elements and a conductor layer including a ground conductor connected to the energy generating elements, are stacked along the thickness direction of the substrate, and wherein at least one of the plurality of conductor layers is occupied by one power supply conductor or one ground conductor.Type: ApplicationFiled: May 22, 2017Publication date: November 30, 2017Inventors: Masataka Sakurai, Nobuyuki Hirayama, Ryo Kasai, Kengo Umeda, Hidenori Yamato, Masanobu Ohmura, Tatsuhito Goden
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Publication number: 20170136765Abstract: A printhead substrate, comprising an electrothermal transducer configured to heat a printing material, a first DMOS transistor configured to drive the electrothermal transducer, a MOS structure forming an anti-fuse element, a second DMOS transistor configured to write information in the anti-fuse element by causing an insulation breakdown of an insulating film of the MOS structure, and a driving unit consisted of at least one MOS transistor and configured to drive the second DMOS transistor.Type: ApplicationFiled: January 31, 2017Publication date: May 18, 2017Inventor: Masanobu Ohmura
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Patent number: 9592667Abstract: A printhead substrate, comprising an electrothermal transducer configured to heat a printing material, a first DMOS transistor configured to drive the electrothermal transducer, a MOS structure forming an anti-fuse element, a second DMOS transistor configured to write information in the anti-fuse element by causing an insulation breakdown of an insulating film of the MOS structure, and a driving unit consisted of at least one MOS transistor and configured to drive the second DMOS transistor.Type: GrantFiled: July 2, 2015Date of Patent: March 14, 2017Assignee: CANON KABUSHIKI KAISHAInventor: Masanobu Ohmura
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Patent number: 9505211Abstract: A semiconductor device for a liquid discharge head is provided. The device includes first and second electrodes, discharge elements configured to give energy to a liquid, first switching elements configured to electrically connect first terminals of discharge elements to the first electrode, and including one or more first switching elements each connected to two or more discharge elements, and second switching elements configured to electrically connect second terminals of the plurality of discharge elements to the second electrode, and including one or more second switching element each connected to two or more discharge elements. Two or more discharge elements connected to a same second switching element are connected to different first switching elements.Type: GrantFiled: March 19, 2015Date of Patent: November 29, 2016Assignee: CANON KABUSHIKI KAISHAInventors: Kazunari Fujii, Masanobu Ohmura
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Patent number: 9472648Abstract: A manufacturing method of a semiconductor device including a DMOS transistor, an NMOS transistor and a PMOS transistor arranged on a semiconductor substrate, the DMOS transistor including a first impurity region and a second impurity region formed to be adjacent to each other, the first impurity region being of the same conductivity type as a drain region and a source region of the DMOS transistor, forming to enclose the drain region, and the second impurity region being of a conductivity type opposite to the first impurity region, forming to enclose the source region, the manufacturing method of the semiconductor device comprising forming the first impurity region and one of the NMOS transistor and the PMOS transistor, and forming the second impurity region and the other of the NMOS transistor and the PMOS transistor.Type: GrantFiled: March 25, 2015Date of Patent: October 18, 2016Assignee: CANON KABUSHIKI KAISHAInventors: Nobuyuki Suzuki, Satoshi Suzuki, Masanobu Ohmura
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Patent number: 9463618Abstract: A liquid discharge substrate includes a plurality of discharge elements disposed on a substrate, a first transistor electrically connected to the plurality of discharge elements, and a plurality of second transistors. The first transistor is disposed between the plurality of discharge elements and the plurality of second transistors.Type: GrantFiled: March 26, 2015Date of Patent: October 11, 2016Assignee: Canon Kabushiki KaishaInventors: Kazunari Fujii, Masanobu Ohmura, Tatsuhito Goden, Wataru Endo
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Patent number: 9362896Abstract: Provided is a chip including a plurality of unit cells; a scanning circuit adapted to scan the plurality of unit cells, thereby making each of the plurality of unit cells output a signal; a voltage-to-current conversion circuit; a current-to-voltage conversion circuit; an output terminal; and an input terminal. The current-to-voltage conversion circuit is adapted to convert a first current signal input into the input terminal, into a first voltage signal, the scanning circuit starts scanning in response to the first voltage signal output from the current-to-voltage conversion circuit, and the voltage-to-current conversion circuit is adapted to convert a second voltage signal output from the scanning circuit into a second current signal, and to output the second current signal from the output terminal.Type: GrantFiled: April 6, 2015Date of Patent: June 7, 2016Assignee: CANON KABUSHIKI KAISHAInventors: Tatsuya Suzuki, Masanobu Ohmura
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Patent number: 9308719Abstract: A board for a printhead mountable on a printing apparatus includes three terminals used for connection to the printing apparatus, a printing element, a driving circuit connected to the first terminal, an inspection circuit connected between the first terminal and the second terminal, and a resistance element connected between the second terminal and the third terminal. When an inspection signal is supplied from the printing apparatus to the first terminal, the inspection circuit outputs an output signal according to the inspection signal. When a control signal for performing printing is supplied from the printing apparatus to the first terminal, the driving circuit drives the printing element according to the control signal, and the inspection circuit sets the inspection circuit and the second terminal in an open state with each other.Type: GrantFiled: February 28, 2014Date of Patent: April 12, 2016Assignee: Canon Kabushiki KaishaInventors: Hiroaki Kameyama, Masanobu Ohmura
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Patent number: 9278518Abstract: A printhead substrate comprising a plurality of printing portions and a plurality of ink supply ports, wherein the plurality of printing portions are divided into a plurality of groups, and the plurality of ink supply ports are arranged so as to correspond to the plurality of groups respectively, the printhead substrate also comprises a plurality of first voltage wiring portions provided in correspondence with the plurality of groups, and each first voltage wiring portion includes a first wiring pattern configured to connect the first terminals of the respective printing portions in the corresponding group with each other, and a second wiring pattern connected to the first wiring pattern and arranged between an ink supply port in the corresponding group and its neighboring ink supply port.Type: GrantFiled: October 20, 2014Date of Patent: March 8, 2016Assignee: Canon Kabushiki KaishaInventors: Kazunari Fujii, Masanobu Ohmura
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Patent number: 9227401Abstract: A printing element substrate, comprising a plurality of units configured to print on a printing medium based on print data, each of the plurality of units, including a printing element configured to print on the printing medium, a first transistor configured to operate as a source follower upon receiving a voltage at a gate terminal of the first transistor, and supply a current to the printing element, and a second transistor configured to control supply of the current to the printing element in response to a control signal input to a gate terminal of the second transistor.Type: GrantFiled: May 29, 2014Date of Patent: January 5, 2016Assignee: Canon Kabushiki KaishaInventors: Kazunari Fujii, Masanobu Ohmura
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Patent number: 9205649Abstract: A substrate includes first and second power supply lines, and units. Each unit includes common transistor, discharge elements and individual transistors. One of source and drain of the common transistor is connected to the first power supply line, first nodes of the discharge elements are connected to other of the source and drain, one of source and drain of each individual transistor is connected to a second node of the discharge element, the other is connected to the second power supply line. Channel of the common transistor is wider than those of the individual transistors. Arrangement direction of the units and arrangement direction of the discharge elements are first direction, the first and second power supply lines extend in the first direction, and the second power supply line is wider than that of the first power supply line.Type: GrantFiled: April 29, 2015Date of Patent: December 8, 2015Assignee: Canon Kabushiki KaishaInventors: Wataru Endo, Masanobu Ohmura, Kazunari Fujii, Tatsuhito Goden