Patents by Inventor Masanori Kojima

Masanori Kojima has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20150297795
    Abstract: The object is to provide a carrier showing superior adhesion property and detachability, which is suitable for transferring a cell sheet. A carrier for transferring a cell sheet for transplantation comprising a cell sheet-adhesive coating layer that can respond to a non-cytotoxic condition and a support layer consisting of a base material acceptable as a medical material is provided. By applying a cell sheet adhering to the coating layer of the carrier to a transplantation site and providing the non-cytotoxic condition, the carrier can be detached and removed with maintaining the cell sheet at the transplantation site.
    Type: Application
    Filed: August 26, 2013
    Publication date: October 22, 2015
    Applicant: NIKKAN INDUSTRIES CO., LTD.
    Inventors: Toyoji Hibi, Koji Kato, Hiroyuki Niikura, Jun Watanabe, Masanori Kojima
  • Patent number: 9036188
    Abstract: To make it possible for a user to easily send data, the invention is provided with: a candidate addressee display unit for receiving information relating to a candidate addressee from a data transfer server and displaying an addressee selection screen so that the candidate addressee can be selected; an addressee setting unit for notifying the data transfer server of a selection result from when the candidate addressee has been selected, and thereby setting the addressee; a data acquisition unit for acquiring data intended to be sent; and a transmission control unit for sending the data intended to be sent to the data transfer server and thereby causing the data intended to be sent to be transferred from the data transfer server to the addressee.
    Type: Grant
    Filed: January 18, 2013
    Date of Patent: May 19, 2015
    Assignee: Seiko Epson Corporation
    Inventors: Fuminori Hanaoka, Yutaka Akahori, Takatoshi Fujisawa, Masanori Kojima
  • Patent number: 7569457
    Abstract: An implantation step of a dopant ion for forming source and drain regions (S and D) is divided into one implantation of a dopant ion for forming a p/n junction with a well region (3), and one implantation of a dopant ion that does not influence a position of the p/n junction between the source and drain regions (S and D) and the well region with a shallow implantation depth and? a large implantation amount. After conducting an activation heat treatment of the dopant, a surface of the source/drain region is made into cobalt suicide 12, so that the source/drain region (S and D) can have a low resistance, and a p/n junction leakage can be reduced.
    Type: Grant
    Filed: November 9, 2007
    Date of Patent: August 4, 2009
    Assignee: Renesas Technology Corp.
    Inventors: Shinichi Fukada, Naotaka Hashimoto, Masanori Kojima, Hiroshi Momiji, Hiromi Abe, Masayuki Suzuki
  • Publication number: 20080132022
    Abstract: An implantation step of a dopant ion for forming source and drain regions (S and D) is divided into one implantation of a dopant ion for forming a p/n junction with a well region (3), and one implantation of a dopant ion that does not influence a position of the p/n junction between the source and drain regions (S and D) and the well region with a shallow implantation depth and? a large implantation amount. After conducting an activation heat treatment of the dopant, a surface of the source/drain region is made into cobalt suicide 12, so that the source/drain region (S and D) can have a low resistance, and a p/n junction leakage can be reduced.
    Type: Application
    Filed: November 9, 2007
    Publication date: June 5, 2008
    Inventors: Shinichi Fukada, Naotaka Hashimoto, Masanori Kojima, Hiroshi Momiji, Hiromi Abe, Masayuki Suzuki
  • Patent number: 7342364
    Abstract: A light source comprising a light emitting diode comprising a GaN-based compound and having a single quantum well structure, and a driving voltage source for applying a pulse voltage to the light emitting diode, wherein a voltage at a low level of the pulse voltage is set to a voltage lower than a voltage at which a fall time of the light emitting diode is made the longest.
    Type: Grant
    Filed: September 15, 2005
    Date of Patent: March 11, 2008
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Satoru Kato, Tetsu Kachi, Kazuyoshi Tomita, Hiroshi Ito, Masanori Kojima
  • Patent number: 7314805
    Abstract: An implantation step of a dopant ion for forming source and drain regions (S and D) is divided into one implantation of a dopant ion for forming a p/n junction with a well region (3), and one implantation of a dopant ion that does not influence a position of the p/n junction between the source and drain regions (S and D) and the well region with a shallow implantation depth and a large implantation amount. After conducting an activation heat treatment of the dopant, a surface of the source/drain region is made into cobalt silicide 12, so that the source/drain region (S and D) can have a low resistance, and a p/n junction leakage can be reduced.
    Type: Grant
    Filed: September 13, 2006
    Date of Patent: January 1, 2008
    Assignee: Renesas Technology Corp.
    Inventors: Shinichi Fukada, Naotaka Hashimoto, Masanori Kojima, Hiroshi Momiji, Hiromi Abe, Masayuki Suzuki
  • Patent number: 7291865
    Abstract: A flip-chip type of Group III nitride based compound semiconductor light-emitting device comprises a transparent conductive film 10 made of ITO on a p-type contact layer. On the transparent conductive film, an insulation protection film 20, a reflection film 30 which is made of silver (Ag) and aluminum (Al) and reflects light to a sapphire substrate side, and a metal layer 40 made of gold (Au) are deposited in sequence. Because the insulation protection film 20 exists between the transparent conductive film 10 and the reflection film 30, metal atoms comprised in the reflection film 30 can be prevented from diffusing in the transparent conductive film 10. That enables the transparent conductive film 10 to maintain high transmissivity. As a result, a light-emitting device having high external quantum efficienty can be provided.
    Type: Grant
    Filed: September 28, 2005
    Date of Patent: November 6, 2007
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Masanori Kojima, Minoru Hirose, Masao Kamiya, Kosuke Yahata
  • Publication number: 20070045351
    Abstract: To provide a liquid feed pump, a filter housing, a valve and a spray nozzle and a spray apparatus incorporating these components that can suppress contamination of the liquid being fed. A liquid feed pump 10 includes: a cylinder 12 having a substantially cylindrical shape; and a piston 14 fitted into the cylinder. The liquid feed pressure of the liquid feed pump 10 is equal to or higher than 1 MPa and equal to or lower than 50 MPa, and substantially the whole surface of a liquid contacting part of the liquid feed pump is made of a resin material or a ceramic material.
    Type: Application
    Filed: January 10, 2006
    Publication date: March 1, 2007
    Applicant: Asahi Sunac Corporation
    Inventors: Yoshiyuki Seike, Shigeru Taniguchi, Masanori Kojima, Kentaro Otani, Keiji Miyachi, Masahiko Amari
  • Publication number: 20070004163
    Abstract: An implantation step of a dopant ion for forming source and drain regions (S and D) is divided into one implantation of a dopant ion for forming a p/n junction with a well region (3), and one implantation of a dopant ion that does not influence a position of the p/n junction between the source and drain regions (S and D) and the well region with a shallow implantation depth and a large implantation amount. After conducting an activation heat treatment of the dopant, a surface of the source/drain region is made into cobalt silicide 12, so that the source/drain region (S and D) can have a low resistance, and a p/n junction leakage can be reduced.
    Type: Application
    Filed: September 13, 2006
    Publication date: January 4, 2007
    Inventors: Shinichi Fukada, Naotaka Hashimoto, Masanori Kojima, Hiroshi Momiji, Hiromi Abe, Masayuki Suzuki
  • Patent number: 7132341
    Abstract: In a high-performance semiconductor integrated circuit, the standby current is reduced by preventing current leakage in a semiconductor integrated circuit device, for example, the memory cell of an SRAM. A gate electrode G is formed on semiconductor substrate 1 and n+-type semiconductor regions 17 (source/drain regions) are formed in the semiconductor substrate on both sides of this gate electrode. Within the same apparatus and under near-vacuum conditions, a depth of 2.5 nm or less is etched away from the surfaces of the source/drain regions and gate electrode, a film of Co is then formed on the source/drain regions, and thermal processing is applied to form CoSi2 layer 19a. As a result, current leakage in the memory cell can be prevented and this method can be applied to semiconductor integrated circuit devices that have low current consumption or are battery-driven.
    Type: Grant
    Filed: October 12, 2001
    Date of Patent: November 7, 2006
    Assignees: Renesas Technology Corp., Hitachi ULSI Systems Co., Ltd.
    Inventors: Masashi Sahara, Fumiaki Endo, Masanori Kojima, Katsuhiro Uchimura, Hideaki Kanazawa, Masakazu Sugiura
  • Patent number: 7118983
    Abstract: An implantation step of a dopant ion for forming source and drain regions (S and D) is divided into one implantation of a dopant ion for forming a p/n junction with a well region (3), and one implantation of a dopant ion that does not influence a position of the p/n junction between the source and drain regions (S and D) and the well region with a shallow implantation depth and? a large implantation amount. After conducting an activation heat treatment of the dopant, a surface of the source/drain region is made into cobalt silicide 12, so that the source/drain region (S and D) can have a low resistance, and a p/n junction leakage can be reduced.
    Type: Grant
    Filed: June 30, 2005
    Date of Patent: October 10, 2006
    Assignee: Renesas Technology Corp.
    Inventors: Shinichi Fukada, Naotaka Hashimoto, Masanori Kojima, Hiroshi Momiji, Hiromi Abe, Masayuki Suzuki
  • Patent number: 7094655
    Abstract: An implantation step of a dopant ion for forming source and drain regions (S and D) is divided into one implantation of a dopant ion for forming a p/n junction with a well region (3), and one implantation of a dopant ion that does not influence a position of the p/n junction between the source and drain regions (S and D) and the well region with a shallow implantation depth and a large implantation amount. After conducting an activation heat treatment of the dopant, a surface of the source/drain region is made into cobalt silicide 12, so that the source/drain region (S and D) can have a low resistance, and a p/n junction leakage can be reduced.
    Type: Grant
    Filed: June 30, 2005
    Date of Patent: August 22, 2006
    Assignee: Renesas Technology Corp.
    Inventors: Shinichi Fukada, Naotaka Hashimoto, Masanori Kojima, Hiroshi Momiji, Hiromi Abe, Masayuki Suzuki
  • Patent number: 7094642
    Abstract: An implantation step of a dopant ion for forming source and drain regions (S and D) is divided into one implantation of a dopant ion for forming a p/n junction with a well region (3), and one implantation of a dopant ion that does not influence a position of the p/n junction between the source and drain regions (S and D) and the well region with a shallow implantation depth and a large implantation amount. After conducting an activation heat treatment of the dopant, a surface of the source/drain region is made into cobalt silicide 12, so that the source/drain region (S and D) can have a low resistance, and a p/n junction leakage can be reduced.
    Type: Grant
    Filed: April 21, 2005
    Date of Patent: August 22, 2006
    Assignees: Hitachi, Ltd., Hitachi ULSI Systems Co., Ltd.
    Inventors: Shinichi Fukada, Naotaka Hashimoto, Masanori Kojima, Hiroshi Momiji, Hiromi Abe, Masayuki Suzuki
  • Patent number: 7074665
    Abstract: An implantation step of a dopant ion for forming source and drain regions (S and D) is divided into one implantation of a dopant ion for forming a p/n junction with a well region (3), and one implantation of a dopant ion that does not influence a position of the p/n junction between the source and drain regions (S and D) and the well region with a shallow implantation depth and a large implantation amount. After conducting an activation heat treatment of the dopant, a surface of the source/drain region is made into cobalt silicide 12, so that the source/drain region (S and D) can have a low resistance, and a p/n junction leakage can be reduced.
    Type: Grant
    Filed: November 6, 2003
    Date of Patent: July 11, 2006
    Assignees: Hitachi, Ltd., Hitachi ULSI Systems Co., Ltd.
    Inventors: Shinichi Fukada, Naotaka Hashimoto, Masanori Kojima, Hiroshi Momiji, Hiromi Abe, Masayuki Suzuki
  • Patent number: 7064040
    Abstract: An implantation step of a dopant ion for forming source and drain regions (S and D) is divided into one implantation of a dopant ion for forming a p/n junction with a well region (3), and one implantation of a dopant ion that does not influence a position of the p/n junction between the source and drain regions (S and D) and the well region with a shallow implantation depth and’ a large implantation amount. After conducting an activation heat treatment of the dopant, a surface of the source/drain region is made into cobalt silicide 12, so that the source/drain region (S and D) can have a low resistance, and a p/n junction leakage can be reduced.
    Type: Grant
    Filed: June 30, 2005
    Date of Patent: June 20, 2006
    Assignees: Hitachi, Ltd., Hitachi ULSI Systems Co., Ltd.
    Inventors: Shinichi Fukada, Naotaka Hashimoto, Masanori Kojima, Hiroshi Momiji, Hiromi Abe, Masayuki Suzuki
  • Publication number: 20060071226
    Abstract: A flip-chip type of Group III nitride based compound semiconductor light-emitting device comprises a transparent conductive film 10 made of ITO on a p-type contact layer. On the transparent conductive film, an insulation protection film 20, a reflection film 30 which is made of silver (Ag) and aluminum (Al) and reflects light to a sapphire substrate side, and a metal layer 40 made of gold (Au) are deposited in sequence. Because the insulation protection film 20 exists between the transparent conductive film 10 and the reflection film 30, metal atoms comprised in the reflection film 30 can be prevented from diffusing in the transparent conductive film 10. That enables the transparent conductive film 10 to maintain high transmissivity. As a result, a light-emitting device having high external quantum efficienty can be provided.
    Type: Application
    Filed: September 28, 2005
    Publication date: April 6, 2006
    Applicant: TOYODA GOSEI CO., LTD.
    Inventors: Masanori Kojima, Minoru Hirose, Masao Kamiya, Kosuke Yahata
  • Publication number: 20060065715
    Abstract: The charge settlement device of the invention has an information reading unit. When a certain fee is charged to a user and the user places a contactless storage medium, which stores electronic money information and user identification information for identification of the user, close to the information reading unit, the charge settlement device subtracts an amount corresponding to the certain fee from available electronic money represented by the electronic money information for payment of the certain fee. When the user places the contactless storage medium close to the information reading unit, the user is identified based on the user identification information obtained from the contactless storage medium.
    Type: Application
    Filed: August 29, 2005
    Publication date: March 30, 2006
    Inventors: Masanori Kojima, Yasushi Nakaoka, Masaaki Hanaoka
  • Publication number: 20060061302
    Abstract: A light source comprising a light emitting diode comprising a GaN-based compound and having a single quantum well structure, and a driving voltage source for applying a pulse voltage to the light emitting diode, wherein a voltage at a low level of the pulse voltage is set to a voltage lower than a voltage at which a fall time of the light emitting diode is made the longest.
    Type: Application
    Filed: September 15, 2005
    Publication date: March 23, 2006
    Applicant: Toyoda Gosei Co., Ltd.
    Inventors: Satoru Kato, Tetsu Kachi, Kazuyoshi Tomita, Hiroshi Ito, Masanori Kojima
  • Publication number: 20050250269
    Abstract: An implantation step of a dopant ion for forming source and drain regions (S and D) is divided into one implantation of a dopant ion for forming a p/n junction with a well region (3), and one implantation of a dopant ion that does not influence a position of the p/n junction between the source and drain regions (S and D) and the well region with a shallow implantation depth and a large implantation amount. After conducting an activation heat treatment of the dopant, a surface of the source/drain region is made into cobalt silicide 12, so that the source/drain region (S and D) can have a low resistance, and a p/n junction leakage can be reduced.
    Type: Application
    Filed: June 30, 2005
    Publication date: November 10, 2005
    Inventors: Shinichi Fukada, Naotaka Hashimoto, Masanori Kojima, Hiroshi Momiji, Hiromi Abe, Masayuki Suzuki
  • Publication number: 20050250268
    Abstract: An implantation step of a dopant ion for forming source and drain regions (S and D) is divided into one implantation of a dopant ion for forming a p/n junction with a well region (3), and one implantation of a dopant ion that does not influence a position of the p/n junction between the source and drain regions (S and D) and the well region with a shallow implantation depth and? a large implantation amount. After conducting an activation heat treatment of the dopant, a surface of the source/drain region is made into cobalt silicide 12, so that the source/drain region (S and D) can have a low resistance, and a p/n junction leakage can be reduced.
    Type: Application
    Filed: June 30, 2005
    Publication date: November 10, 2005
    Inventors: Shinichi Fukada, Naotaka Hashimoto, Masanori Kojima, Hiroshi Momiji, Hiromi Abe, Masayuki Suzuki