Patents by Inventor Masanori Takada

Masanori Takada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180052632
    Abstract: This storage system includes a processor, a memory, a storage drive, and an interface device. The storage drive determines a size of transfer data based on an offset value which is a value relating to a size between the beginning of a storage area in the memory for the transfer of the data to be transferred to the interface device and the beginning of the partition of the memory to which the beginning of the storage area belongs, and then transfers data to be transferred, which has the determined size, to the interface device. The interface device divides the transferred data into packets and transfers these packets to the processor. The processor then stores the packets transferred from the interface device in the memory on a unit of a partition.
    Type: Application
    Filed: May 11, 2015
    Publication date: February 22, 2018
    Inventors: Masanori TAKADA, Naoya OKADA, Mitsuo DATE, Tsutomu KOGA
  • Publication number: 20170344313
    Abstract: A storage system has a cluster structure in which a node is connected with a different node, the node having a volatile memory for storing first update data from a host and a first non-volatile memory for storing second copy data of second update data from the host to the different node, and having a copy management processing unit for storing first copy data of the first update data into a second non-volatile memory of the different node, and a storage service processing unit for transmitting, to the host, a response with respect to an update request of the first update data in response to the storage of the first copy data of the first update data by the copy management processing unit into the second non-volatile memory of the different node.
    Type: Application
    Filed: January 23, 2015
    Publication date: November 30, 2017
    Inventors: Mitsuo HAYASAKA, Kazumasa MATSUBARA, Masanori TAKADA, Yoshihiro YOSHII
  • Publication number: 20170277914
    Abstract: When mounting hardware which is coupled to another portion by a plurality of paths with different applications, despite the hardware being a single device, and a failure occurs in any of the paths, there is a risk that the failure may propagate to other components unless the other paths are also blocked. In order to solve the problem described above, in a storage apparatus to which a device coupled by a plurality of coupling paths with different applications can be mounted, the present invention determines a block range at the time of an occurrence of a failure to be a device and a plurality of coupling paths coupled to the device, manages the block range, and upon an occurrence of a failure, executes failure handling which involves blocking an appropriate block range determined in advance by referring to the information.
    Type: Application
    Filed: November 12, 2014
    Publication date: September 28, 2017
    Inventors: Akihiko ARAKI, Yusuke NONAKA, Masanori TAKADA, Naoya OKADA
  • Patent number: 9740423
    Abstract: In a computer system having a storage controller that receives a read request or a write request, a processor is configured to send to an interface device either a read-support indication, which is an indication to execute either all or a portion of read processing for read-data of the read request, or a write-support indication, which is an indication for either all or a portion of write processing for write-data of the write request. Then, the interface device, in accordance with either the read-support indication or the write-support indication, is configured to execute either all or a portion of the read processing for the read-data, or all or a portion of the write processing for the write-data, and to send to a host computer either a first response to the effect that the read processing has been completed, or a second response that the write processing has been completed.
    Type: Grant
    Filed: July 26, 2013
    Date of Patent: August 22, 2017
    Assignee: Hitachi, Ltd.
    Inventors: Masanori Takada, Nobuhiro Yokoi, Sadahiro Sugimoto, Akira Yamamoto
  • Patent number: 9703744
    Abstract: In a storage subsystem adopting HDD and PCIe-SSD as storage media, as a method for preventing the complication of having to select a removal method while considering the drive type inserted to the drive slot since the method for removing the HDD differs from the method for removing the PCIe-SSD according to the prior art, the present invention provides an LED for displaying whether it is possible to remove the HDD or the PCIe-SSD inserted to the slot of a drive enclosure, wherein when an HDD is inserted in the drive slot, the LED displays that removal of the HDD is enabled when power supply to the HDD is stopped, and when PCIe-SSD is inserted to the drive slot, the LED displays that removal of the SSD is enabled when Downstream Port Containment (DPC) is triggered in the downstream port of the PCIe switch to which the SSD is connected.
    Type: Grant
    Filed: January 23, 2013
    Date of Patent: July 11, 2017
    Assignee: Hitachi, Ltd.
    Inventors: Katsuya Tanaka, Masanori Takada, Naoya Okada
  • Patent number: 9697097
    Abstract: Methods are in use for saving data stored in a volatile memory to a non-volatile memory during a power outage in a storage system so that the data on the volatile memory is not lost. In the related art, the entire data saved to the non-volatile memory is read and written in the volatile memory when electric power supply is restored. Then, an operation as the storage system is resumed and an access request from a host is accepted. In the related art, the data saved in the non-volatile memory has to be read in entirety, and thus time is required until resumption of the access request acceptance and availability is impeded.
    Type: Grant
    Filed: June 2, 2014
    Date of Patent: July 4, 2017
    Assignee: HITACHI, LTD.
    Inventors: Masanori Takada, Akira Yamamoto
  • Publication number: 20170177270
    Abstract: The storage system has one or more storage drives, and one or more controllers for receiving processing requests from a superior device, wherein each of the one or more controllers has a processor for executing the processing request and an accelerator, and the accelerator has multiple internal data memories and an internal control memory, wherein if the processing request is a read I/O request, it stores a control information regarding the request to the internal control memory, and reads data being the target of the relevant request from at least one storage drive out of the multiple storage drives, which is temporarily stored in the one or more said internal data memories, and transferred sequentially in order from the internal data memory already storing data to the superior device.
    Type: Application
    Filed: September 11, 2014
    Publication date: June 22, 2017
    Inventors: Kazushi NAKAGAWA, Masanori TAKADA, Norio SIMOZONO
  • Patent number: 9645926
    Abstract: It is provided a storage system, comprising a storage device for storing data and at least one controller for controlling reading/writing of the data from/to the storage device. The at least one controller each includes a first cache memory for temporarily storing the data read from the storage device by file access, and a second cache memory for temporarily storing the data to be read/written from/to the storage device by block access. The processor reads the requested data from the storage device in the case where data requested by a file read request received from a host computer is not stored in the first cache memory, stores the data read from the storage device in the first cache memory without storing the data in the second cache memory, and transfers the data stored in the first cache memory to the host computer that has issued the file read request.
    Type: Grant
    Filed: October 19, 2012
    Date of Patent: May 9, 2017
    Assignee: Hitachi, Ltd.
    Inventors: Masanori Takada, Akira Yamamoto, Hiroshi Hirayama
  • Publication number: 20170075816
    Abstract: A control apparatus, in a storage system, accesses a specific storage area in a shared memory by designating a fixed virtual address, even when a capacity of the shared memory in the storage system changes. A space of a physical address indicating a storage area in a plurality of memories in a self-control-subsystem of two control-subsystems and a space of a physical address indicating a storage area in the plurality of memories in the other-control-subsystem are associated with a space of a virtual address used by each of a processor and an input/output device in the self-control-subsystem. Upon receiving data transferred from the other-control-subsystem to the self-control-subsystem, a relay device translates a virtual address indicating a transfer destination of the data designated by the other-control-subsystem into a virtual address in the self-control-subsystem based on an offset determined in advance, and transfers the data to the translated virtual address.
    Type: Application
    Filed: April 24, 2014
    Publication date: March 16, 2017
    Applicant: HITACHI, LTD.
    Inventors: Naoya OKADA, Masanori TAKADA, Shintaro KUDO, Yusuke NONAKA, Tadashi TAKEUCHI
  • Patent number: 9471434
    Abstract: When a failure occurs in a storage system controller, the controller reboots after completing prescribed failure processing for respective control parts. Upon detecting a failure, first, second, and third control parts of the controller perform respective failure processing. The first control part controls block access requests, the second control part controls file system access, and the third control part manages the second control part. The first control part and third control part write prescribed information to a storage area and reboot at least a portion of the controller upon detecting the failure.
    Type: Grant
    Filed: July 22, 2013
    Date of Patent: October 18, 2016
    Assignee: HITACHI, LTD.
    Inventors: Akihiko Araki, Yusuke Nonaka, Masanori Takada
  • Publication number: 20160259697
    Abstract: Methods are in use for saving data stored in a volatile memory to a non-volatile memory during a power outage in a storage system so that the data on the volatile memory is not lost. In the related art, the entire data saved to the non-volatile memory is read and written in the volatile memory when electric power supply is restored. Then, an operation as the storage system is resumed and an access request from a host is accepted. In the related art, the data saved in the non-volatile memory has to be read in entirety, and thus time is required until resumption of the access request acceptance and availability is impeded.
    Type: Application
    Filed: June 2, 2014
    Publication date: September 8, 2016
    Applicant: HITACHI, LTD.
    Inventors: Masanori TAKADA, Akira YAMAMOTO
  • Publication number: 20160196184
    Abstract: When a failure occurs, the present invention makes it possible to reboot after completing prescribed failure processing for respective control parts. A storage system 10 comprises a controller 100 and a logical volume 23. The controller 100 comprises a processor 140 and a memory 150 that is used by the processor, and uses the processor to realize a plurality of control parts 101, 102, and 103. A block OS 101, which is an example of a first control part, controls a block access request to a disk device 21 (logical volume 23). A file OS 103, which is an example of a second control part, is managed by a hypervisor 102. When a failure has occurred inside the controller, the controller reboots after confirming that prescribed failure processing has been completed for each OS 101, 102, and 103.
    Type: Application
    Filed: July 22, 2013
    Publication date: July 7, 2016
    Applicant: HITACHI, LTD.
    Inventors: Akihiko ARAKI, Yusuke NONAKA, Masanori TAKADA
  • Publication number: 20160132271
    Abstract: In a computer system having a storage controller that receives a read request or a write request, a processor is configured to send to an interface device either a read-support indication, which is an indication to execute either all or a portion of read processing for read-data of the read request, or a write-support indication, which is an indication for either all or a portion of write processing for write-data of the write request. Then, the interface device, in accordance with either the read-support indication or the write-support indication, is configured to execute either all or a portion of the read processing for the read-data, or all or a portion of the write processing for the write-data, and to send to a host computer either a first response to the effect that the read processing has been completed, or a second response that the write processing has been completed.
    Type: Application
    Filed: July 26, 2013
    Publication date: May 12, 2016
    Inventors: Masanori TAKADA, Nobuhiro YOKOI, Sadahiro SUGIMOTO, Akira YAMAMOTO
  • Publication number: 20150317272
    Abstract: In a storage subsystem adopting HDD and PCIe-SSD as storage media, as a method for preventing the complication of having to select a removal method while considering the drive type inserted to the drive slot since the method for removing the HDD differs from the method for removing the PCIe-SSD according to the prior art, the present invention provides an LED for displaying whether it is possible to remove the HDD or the PCIe-SSD inserted to the slot of a drive enclosure, wherein when an HDD is inserted in the drive slot, the LED displays that removal of the HDD is enabled when power supply to the HDD is stopped, and when PCIe-SSD is inserted to the drive slot, the LED displays that removal of the SSD is enabled when Downstream Port Containment (DPC) is triggered in the downstream port of the PCIe switch to which the SSD is connected.
    Type: Application
    Filed: January 23, 2013
    Publication date: November 5, 2015
    Inventors: Katsuya TANAKA, Masanori TAKADA, Naoya OKADA
  • Patent number: 9098202
    Abstract: A storage apparatus comprises a storage unit configured to store data which is read/written by the host apparatus, a compression/expansion unit configured to compress the data using a predetermined algorithm to generate compressed data, and expand the compressed data, and a control unit configured to control writing of data to the storage unit, wherein the control unit is configured to manage, as compression block units, divided compressed data which is obtained by dividing compressed data compressed by the compression/expansion unit into predetermined units, and padding data.
    Type: Grant
    Filed: April 27, 2012
    Date of Patent: August 4, 2015
    Assignee: Hitachi, Ltd.
    Inventors: Nobuhiro Yokoi, Masanori Takada, Nagamasa Mizushima, Hiroshi Hirayama, Akira Yamamoto
  • Patent number: 9075729
    Abstract: An embodiment of the present invention is a storage system including a plurality of non-volatile storage devices for storing user data, and a controller for controlling data transfer between the plurality of non-volatile storage devices and a host. The controller includes a processor core circuit, a processor cache, and a primary storage device including a cache area for temporarily storing user data. The processor core circuit ascertains contents of a command received from the host. The processor core circuit ascertains a retention storage device of data to be transferred in the storage system in operations responsive to the command. The processor core circuit determines whether to transfer the data via the processor cache in the storage system, based on a type of the command and the ascertained retention storage device.
    Type: Grant
    Filed: May 16, 2012
    Date of Patent: July 7, 2015
    Assignee: Hitachi, Ltd.
    Inventors: Naoya Okada, Masanori Takada, Hiroshi Hirayama
  • Patent number: 9009395
    Abstract: The amount of data to be stored in a semiconductor nonvolatile memory can be reduced and overhead associated with data processing can be reduced. When a microprocessor receives a write request from a host computer and data D1 to D3 exist in a cache slot, the microprocessor reads the LBA of each piece of the data, manages each piece of the data D1 to D3 using a bitmap table by associating them with their LBAs, generates a specific command CMD based on the LBAs of the data D1 to D3, adds the data D1 to D3 and addresses ADD1 to ADD3 indicating where the data D1 to D3 are to be stored, to the specific command CMD, and sends it to an FMPK. The FMPK stores each piece of update data in a specified block in the flash memory based on the specific command CMD.
    Type: Grant
    Filed: January 17, 2013
    Date of Patent: April 14, 2015
    Assignee: Hitachi, Ltd.
    Inventors: Yoshiki Kano, Masanori Takada, Akira Yamamoto, Akihiko Araki, Masayuki Yamamoto, Jun Kitahara, Sadahiro Sugimoto
  • Patent number: 8984235
    Abstract: An exemplary storage apparatus of the invention includes storage devices for storing data of block I/O commands and file I/O commands and a controller including a block cache area and a file cache area. The controller creates block I/O commands from file I/O commands and accesses the storage devices in accordance with the created block I/O commands. In a case where the file cache area is lacking an area to cache first data of a received first file I/O command, the controller chooses one of a first cache method that newly creates a free area in the file cache area to cache the first data in the file cache area and a second cache method that caches the first data in the block cache area without caching the first data in the file cache area.
    Type: Grant
    Filed: November 14, 2012
    Date of Patent: March 17, 2015
    Assignee: Hitachi, Ltd.
    Inventors: Shintaro Kudo, Yusuke Nonaka, Masanori Takada
  • Patent number: 8870364
    Abstract: A printer apparatus in the present invention includes a feeding mechanism having a feed roller provided at substantially the same height as an upper face of a medium support means and a plurality of roller assemblies having a pinch roller disposed above the feed roller and a printing medium placed on the medium support means is pinched between the feed roller and the pinch roller to be fed in the front and rear direction. The roller assembly is structured of an assembly main body and a roller member which includes the pinch roller and is attachable/detachable with respect to the assembly main body, and a clamp state can be changed by exchanging the roller member depending on material and/or thickness of the printing medium.
    Type: Grant
    Filed: September 8, 2010
    Date of Patent: October 28, 2014
    Assignee: Mimaki Engineering Co., Ltd.
    Inventors: Eiji Miyashita, Masanori Takada
  • Publication number: 20140304461
    Abstract: The storage system includes a plurality of flash memory devices, each of the flash memory devices including a flash memory controller and flash memory chips, which are configured as a RAID group and a storage controller, coupled to the plurality of flash memory devices, configured to receive data from a computer and send the data to a first flash memory device of the plurality of flash memory devices. The flash memory controller of the flash memory device is configured to receive the data from the storage controller and execute a parity operation using the data.
    Type: Application
    Filed: June 23, 2014
    Publication date: October 9, 2014
    Inventors: Jun KITAHARA, Masanori TAKADA, Sadahiro SUGIMOTO