Abstract: In a semiconductor device, the side walls are made of SiO2, SiN or SiON, and the top insulating film or gate insulating film is made of an oxide including Al, Si, and metal element M so that the number ratio Si/M is set to no less than a number ratio Si/M at a solid solubility limit of SiO2 composition in a composite oxide including metal element M and Al and set to no more than a number ratio Si/M at the condition that the dielectric constant is equal to the dielectric constant of Al2O3 and so that the number ratio Al/M is set to no less than a number ratio Al/M where the crystallization of an oxide of said metal element M is suppressed due to the Al element and set to no more than a number ratio Al/M where the crystallization of the Al2O3 is suppressed due to the metal element M.

Abstract: A semiconductor storage element includes: a source region and a drain region provided in a semiconductor substrate; a tunnel insulating film provided on the semiconductor substrate between the source region and the drain region; a charge storage film provided on the tunnel insulating film; a block insulating film provided on the charge storage film; a gate electrode provided on the block insulating film; and a region containing a gas molecule, the region provided in a neighborhood of an interface between the charge storage film and the block insulating film.

Abstract: A nonvolatile semiconductor memory device includes a source region and a drain region provided apart from each other in a semiconductor substrate, a first insulating film provided on a channel region between the source region and the drain region, a charge storage layer provided on the first insulating film, a second insulating film provided on the charge storage layer and including a stacked structure of a lanthanum aluminum silicate film and a dielectric film made of silicon oxide or silicon oxynitride, and a control gate electrode provided on the second insulating film.

Abstract: According to an aspect of the present invention, there is provided a nonvolatile semiconductor memory element including: a semiconductor substrate including: a source region; a drain region; and a channel region; a lower insulating film that is formed on the channel region; a charge storage film that is formed on the lower insulating film and that stores data; an upper insulating film that is formed on the charge storage film; and a control gate that is formed on the upper insulating film, wherein the upper insulating film includes: a first insulting film; and a second insulating film that is laminated with the first insulating film, and wherein the first insulating film is formed to have a trap level density larger than that of the second insulating film.

Abstract: A semiconductor device having a field effect transistor (FET) with enhanced performance by reduction of electrical contact resistance of electrodes and resistance of the electrodes per se is disclosed. The FET includes an n-type FET having a channel region formed in a semiconductor substrate, a gate electrode insulatively overlying the channel region, and a pair of source and drain electrodes which are formed at both ends of the channel region. The source/drain electrodes are made of silicide of a first metal. An interface layer that contains a second metal is formed in the interface between the substrate and the first metal. The second metal is smaller in work function than silicide of the first metal, and the second metal silicide is less in work function than the first metal silicide. A fabrication method of the semiconductor device is also disclosed.

Abstract: In a semiconductor device, the side walls are made of SiO2, SiN or SiON, and the top insulating film or gate insulating film is made of an oxide including Al, Si, and metal element M so that the number ratio Si/M is set to no less than a number ratio Si/M at a solid solubility limit of SiO2 composition in a composite oxide including metal element M and Al and set to no more than a number ratio Si/M at the condition that the dielectric constant is equal to the dielectric constant of Al2O3 and so that the number ratio Al/M is set to no less than a number ratio Al/M where the crystallization of an oxide of said metal element M is suppressed due to the Al element and set to no more than a number ratio Al/M where the crystallization of the Al2O3 is suppressed due to the metal element M.

Abstract: A semiconductor device having a field effect transistor (FET) with enhanced performance by reduction of electrical contact resistance of electrodes and resistance of the electrodes per se is disclosed. The FET includes an n-type FET having a channel region formed in a semiconductor substrate, a gate electrode insulatively overlying the channel region, and a pair of source and drain electrodes which are formed at both ends of the channel region. The source/drain electrodes are made of silicide of a first metal. An interface layer that contains a second metal is formed in the interface between the substrate and the first metal. The second metal is smaller in work function than silicide of the first metal, and the second metal silicide is less in work function than the first metal silicide. A fabrication method of the semiconductor device is also disclosed.