Patents by Inventor Masatsugu Itahashi

Masatsugu Itahashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10381389
    Abstract: A manufacturing method of a solid state imaging device according to one embodiment includes the steps of forming, on a substrate, a gate electrode of a first transistor and a gate electrode of a second transistor adjacent to the first transistor; forming an insulator film covering the gate electrode of the first transistor and the gate electrode of the second transistor such that a void is formed between the gate electrode of the first transistor and the gate electrode of the second transistor; forming a film on the insulator film; and forming a light shielding member by removing a part of the film by an etching.
    Type: Grant
    Filed: February 15, 2018
    Date of Patent: August 13, 2019
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Mari Isobe, Shunsuke Nakatsuka, Masatsugu Itahashi, Yasuhiro Sekine, Sho Suzuki
  • Publication number: 20190198537
    Abstract: A manufacturing method includes a first process for forming a first gate electrode for a first MOS transistor and a second gate electrode for a second MOS transistor on a substrate including a semiconductor region defined by an insulator region for element isolation, a second process for masking a portion located above the semiconductor region of the first gate electrode to introduce an impurity to a source-drain region of the first MOS transistor, and a third process for forming a first conductor member being in contact with the portion of the first gate electrode through a first hole disposed on an insulator member covering the substrate and a second conductor member being in contact with the second gate electrode through a second hole disposed on the insulator member.
    Type: Application
    Filed: February 26, 2019
    Publication date: June 27, 2019
    Inventors: Mineo Shimotsusa, Masatsugu Itahashi, Yusuke Onuki, Nobuaki Kakinuma, Masato Fujita
  • Patent number: 10304895
    Abstract: A method for manufacturing a solid-state image pickup apparatus includes forming a first insulating film over a substrate after forming a gate electrode of a first transfer transistor and a gate electrode of a second transfer transistor, forming a second insulating film on the first insulating film, forming a first structure and a second structure on side surfaces of the gate electrodes of the first and second transfer transistors, respectively, via the first insulating film by etching the second insulating film in such a manner that the first insulating film remains on a semiconductor region of a photoelectric conversion unit and a semiconductor region of a charge holding unit, and forming a light shielding film that covers the gate electrode of the first transfer transistor, the semiconductor region of the charge holding unit, and the gate electrode of the second transfer transistor.
    Type: Grant
    Filed: December 6, 2017
    Date of Patent: May 28, 2019
    Assignee: Canon Kabushiki Kaisha
    Inventors: Shunsuke Nakatsuka, Kentaro Suzuki, Mari Isobe, Masatsugu Itahashi, Yasuhiro Sekine, Sho Suzuki
  • Patent number: 10263029
    Abstract: A manufacturing method includes a first process for forming a first gate electrode for a first MOS transistor and a second gate electrode for a second MOS transistor on a substrate including a semiconductor region defined by an insulator region for element isolation, a second process for masking a portion located above the semiconductor region of the first gate electrode to introduce an impurity to a source-drain region of the first MOS transistor, and a third process for forming a first conductor member being in contact with the portion of the first gate electrode through a first hole disposed on an insulator member covering the substrate and a second conductor member being in contact with the second gate electrode through a second hole disposed on the insulator member.
    Type: Grant
    Filed: November 30, 2017
    Date of Patent: April 16, 2019
    Assignee: Canon Kabushiki Kaisha
    Inventors: Mineo Shimotsusa, Masatsugu Itahashi, Yusuke Onuki, Nobuaki Kakinuma, Masato Fujita
  • Publication number: 20190068903
    Abstract: Provided is a solid-state imaging apparatus, including pixels each including: a photoelectric conversion unit; a charge accumulation unit; a transistor including a control electrode; a waveguide; and a light-shielding portion. The waveguide includes an incident portion and an output portion, the light-shielding portion includes a first portion that covers the control electrode of the transistor and a second portion that covers a part of the photoelectric conversion unit, the output portion and the photoelectric conversion unit are arranged with an interval therebetween, the interval between the output portion and the photoelectric conversion unit is larger than an interval between a lower end of the second portion of the light-shielding portion and the photoelectric conversion unit, and the interval between the output portion and the photoelectric conversion unit is smaller than an interval between an upper end of the second portion of the light-shielding portion and the photoelectric conversion unit.
    Type: Application
    Filed: October 25, 2018
    Publication date: February 28, 2019
    Inventors: Mineo Shimotsusa, Masatsugu Itahashi, Masahiro Kobayashi, Kazunari Kawabata, Takeshi Ichikawa
  • Publication number: 20190037160
    Abstract: At least one solid-state image pickup element includes a plurality of pixels that are arranged in a two-dimensional manner. Each of the plurality of pixels includes a plurality of photoelectric conversion units each including a pixel electrode, a photoelectric conversion layer disposed on the pixel electrode, and a counter electrode disposed such that the photoelectric conversion layer is sandwiched between the pixel electrode and the counter electrode. In one or more embodiments, each of the plurality of pixels also includes a microlens disposed on the plurality of photoelectric conversion units.
    Type: Application
    Filed: October 1, 2018
    Publication date: January 31, 2019
    Inventors: Toshiaki Ono, Masatsugu Itahashi, Naoki Inatani, Yu Maehashi, Hidekazu Takahashi
  • Patent number: 10158817
    Abstract: Provided is a solid-state imaging apparatus, including pixels each including: a photoelectric conversion unit; a charge accumulation unit; a transistor including a control electrode; a waveguide; and a light-shielding portion. The waveguide includes an incident portion and an output portion, the light-shielding portion includes a first portion that covers the control electrode of the transistor and a second portion that covers a part of the photoelectric conversion unit, the output portion and the photoelectric conversion unit are arranged with an interval therebetween, the interval between the output portion and the photoelectric conversion unit is larger than an interval between a lower end of the second portion of the light-shielding portion and the photoelectric conversion unit, and the interval between the output portion and the photoelectric conversion unit is smaller than an interval between an upper end of the second portion of the light-shielding portion and the photoelectric conversion unit.
    Type: Grant
    Filed: January 4, 2018
    Date of Patent: December 18, 2018
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Mineo Shimotsusa, Masatsugu Itahashi, Masahiro Koboyashi, Kazunari Kawabata, Takeshi Ichikawa
  • Patent number: 10136091
    Abstract: At least one solid-state image pickup element includes a plurality of pixels that are arranged in a two-dimensional manner. Each of the plurality of pixels includes a plurality of photoelectric conversion units each including a pixel electrode, a photoelectric conversion layer disposed on the pixel electrode, and a counter electrode disposed such that the photoelectric conversion layer is sandwiched between the pixel electrode and the counter electrode. In one or more embodiments, each of the plurality of pixels also includes a microlens disposed on the plurality of photoelectric conversion units.
    Type: Grant
    Filed: July 27, 2015
    Date of Patent: November 20, 2018
    Assignee: Canon Kabushiki Kaisha
    Inventors: Toshiaki Ono, Masatsugu Itahashi, Naoki Inatani, Yu Maehashi, Hidekazu Takahashi
  • Publication number: 20180294307
    Abstract: Each of a plurality of pixels arranged in two dimensions includes a photoelectric conversion unit including a pixel electrode, a photoelectric conversion layer provided above the pixel electrode, and a counter electrode provided so as to sandwich the photoelectric conversion layer between the counter electrode and the pixel electrode, and a microlens arranged above the photoelectric conversion unit. The plurality of pixels includes a first pixel and a plurality of second pixels. At least either the pixel electrodes of the plurality of second pixels are smaller than the pixel electrode of the first pixel or the counter electrodes of the plurality of second pixels are smaller than the counter electrode of the first pixel, and a configuration between the counter electrode and the microlens of the first pixel is the same as a configuration between the counter electrode and the microlens of each of the plurality of second pixels.
    Type: Application
    Filed: June 11, 2018
    Publication date: October 11, 2018
    Inventors: Masatsugu Itahashi, Toshiaki Ono, Hidekazu Takahashi, Naoki Inatani, Yu Maehashi
  • Patent number: 10026774
    Abstract: A method of manufacturing a solid-state image sensor including preparing a wafer including a pixel region where a photoelectric conversion element is provided, a peripheral circuit region where a gate electrode of a peripheral MOS transistor for constituting a peripheral circuit is provided, and a scribe region. The method includes forming an insulating film covering the pixel region, the peripheral circuit region, and the scribe region, and forming a sidewall spacer on a side surface of the gate electrode by etching the insulating film so that portions of the insulating film remains to cover the pixel region and the scribe region, and forming a metal silicide layer in the peripheral circuit region by using, as a mask for protection from silicidation, the insulating film covering the pixel region and the scribe region.
    Type: Grant
    Filed: May 27, 2015
    Date of Patent: July 17, 2018
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Yusuke Onuki, Masatsugu Itahashi, Nobuaki Kakinuma, Mineo Shimotsusa, Masato Fujita, Takumi Ogino, Keita Torii
  • Patent number: 10020340
    Abstract: Each of a plurality of pixels arranged in two dimensions includes a photoelectric conversion unit including a pixel electrode, a photoelectric conversion layer provided above the pixel electrode, and a counter electrode provided so as to sandwich the photoelectric conversion layer between the counter electrode and the pixel electrode, and a microlens arranged above the photoelectric conversion unit. The plurality of pixels includes a first pixel and a plurality of second pixels. At least either the pixel electrodes of the plurality of second pixels are smaller than the pixel electrode of the first pixel or the counter electrodes of the plurality of second pixels are smaller than the counter electrode of the first pixel, and a configuration between the counter electrode and the microlens of the first pixel is the same as a configuration between the counter electrode and the microlens of each of the plurality of second pixels.
    Type: Grant
    Filed: July 28, 2015
    Date of Patent: July 10, 2018
    Assignee: Canon Kabushiki Kaisha
    Inventors: Masatsugu Itahashi, Toshiaki Ono, Hidekazu Takahashi, Naoki Inatani, Yu Maehashi
  • Publication number: 20180175088
    Abstract: A manufacturing method of a solid state imaging device according to one embodiment includes the steps of forming, on a substrate, a gate electrode of a first transistor and a gate electrode of a second transistor adjacent to the first transistor; forming an insulator film covering the gate electrode of the first transistor and the gate electrode of the second transistor such that a void is formed between the gate electrode of the first transistor and the gate electrode of the second transistor; forming a film on the insulator film; and forming a light shielding member by removing a part of the film by an etching.
    Type: Application
    Filed: February 15, 2018
    Publication date: June 21, 2018
    Inventors: Mari Isobe, Shunsuke Nakatsuka, Masatsugu Itahashi, Yasuhiro Sekine, Sho Suzuki
  • Publication number: 20180131885
    Abstract: Provided is a solid-state imaging apparatus, including pixels each including: a photoelectric conversion unit; a charge accumulation unit; a transistor including a control electrode; a waveguide; and a light-shielding portion. The waveguide includes an incident portion and an output portion, the light-shielding portion includes a first portion that covers the control electrode of the transistor and a second portion that covers a part of the photoelectric conversion unit, the output portion and the photoelectric conversion unit are arranged with an interval therebetween, the interval between the output portion and the photoelectric conversion unit is larger than an interval between a lower end of the second portion of the light-shielding portion and the photoelectric conversion unit, and the interval between the output portion and the photoelectric conversion unit is smaller than an interval between an upper end of the second portion of the light-shielding portion and the photoelectric conversion unit.
    Type: Application
    Filed: January 4, 2018
    Publication date: May 10, 2018
    Inventors: Mineo Shimotsusa, Masatsugu Itahashi, Masahiro Koboyashi, Kazunari Kawabata, Takeshi Ichikawa
  • Publication number: 20180097032
    Abstract: A method for manufacturing a solid-state image pickup apparatus includes forming a first insulating film over a substrate after forming a gate electrode of a first transfer transistor and a gate electrode of a second transfer transistor, forming a second insulating film on the first insulating film, forming a first structure and a second structure on side surfaces of the gate electrodes of the first and second transfer transistors, respectively, via the first insulating film by etching the second insulating film in such a manner that the first insulating film remains on a semiconductor region of a photoelectric conversion unit and a semiconductor region of a charge holding unit, and forming a light shielding film that covers the gate electrode of the first transfer transistor, the semiconductor region of the charge holding unit, and the gate electrode of the second transfer transistor.
    Type: Application
    Filed: December 6, 2017
    Publication date: April 5, 2018
    Inventors: Shunsuke Nakatsuka, Kentaro Suzuki, Mari Isobe, Masatsugu Itahashi, Yasuhiro Sekine, Sho Suzuki
  • Patent number: 9935140
    Abstract: A manufacturing method of a solid state imaging device according to one embodiment includes the steps of forming, on a substrate, a gate electrode of a first transistor and a gate electrode of a second transistor adjacent to the first transistor; forming an insulator film covering the gate electrode of the first transistor and the gate electrode of the second transistor such that a void is formed between the gate electrode of the first transistor and the gate electrode of the second transistor; forming a film on the insulator film; and forming a light shielding member by removing a part of the film by an etching.
    Type: Grant
    Filed: May 12, 2016
    Date of Patent: April 3, 2018
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Mari Isobe, Shunsuke Nakatsuka, Masatsugu Itahashi, Yasuhiro Sekine, Sho Suzuki
  • Publication number: 20180090527
    Abstract: A manufacturing method includes a first process for forming a first gate electrode for a first MOS transistor and a second gate electrode for a second MOS transistor on a substrate including a semiconductor region defined by an insulator region for element isolation, a second process for masking a portion located above the semiconductor region of the first gate electrode to introduce an impurity to a source-drain region of the first MOS transistor, and a third process for forming a first conductor member being in contact with the portion of the first gate electrode through a first hole disposed on an insulator member covering the substrate and a second conductor member being in contact with the second gate electrode through a second hole disposed on the insulator member.
    Type: Application
    Filed: November 30, 2017
    Publication date: March 29, 2018
    Inventors: Mineo Shimotsusa, Masatsugu Itahashi, Yusuke Onuki, Nobuaki Kakinuma, Masato Fujita
  • Patent number: 9906743
    Abstract: Provided is a solid-state imaging apparatus, including pixels each including: a photoelectric conversion unit; a charge accumulation unit; a transistor including a control electrode; a waveguide; and a light-shielding portion. The waveguide includes an incident portion and an output portion, the light-shielding portion includes a first portion that covers the control electrode of the transistor and a second portion that covers a part of the photoelectric conversion unit, the output portion and the photoelectric conversion unit are arranged with an interval therebetween, the interval between the output portion and the photoelectric conversion unit is larger than an interval between a lower end of the second portion of the light-shielding portion and the photoelectric conversion unit, and the interval between the output portion and the photoelectric conversion unit is smaller than an interval between an upper end of the second portion of the light-shielding portion and the photoelectric conversion unit.
    Type: Grant
    Filed: April 8, 2016
    Date of Patent: February 27, 2018
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Mineo Shimotsusa, Masatsugu Itahashi, Masahiro Kobayashi, Kazunari Kawabata, Takeshi Ichikawa
  • Patent number: 9899445
    Abstract: A method for manufacturing a solid-state image pickup apparatus includes forming a first insulating film over a substrate after forming a gate electrode of a first transfer transistor and a gate electrode of a second transfer transistor, forming a second insulating film on the first insulating film, forming a first structure and a second structure on side surfaces of the gate electrodes of the first and second transfer transistors, respectively, via the first insulating film by etching the second insulating film in such a manner that the first insulating film remains on a semiconductor region of a photoelectric conversion unit and a semiconductor region of a charge holding unit, and forming a light shielding film that covers the gate electrode of the first transfer transistor, the semiconductor region of the charge holding unit, and the gate electrode of the second transfer transistor.
    Type: Grant
    Filed: May 4, 2016
    Date of Patent: February 20, 2018
    Assignee: Canon Kabushiki Kaisha
    Inventors: Shunsuke Nakatsuka, Kentaro Suzuki, Mari Isobe, Masatsugu Itahashi, Yasuhiro Sekine, Sho Suzuki
  • Patent number: 9865637
    Abstract: A manufacturing method includes a first process for forming a first gate electrode for a first MOS transistor and a second gate electrode for a second MOS transistor on a substrate including a semiconductor region defined by an insulator region for element isolation, a second process for masking a portion located above the semiconductor region of the first gate electrode to introduce an impurity to a source-drain region of the first MOS transistor, and a third process for forming a first conductor member being in contact with the portion of the first gate electrode through a first hole disposed on an insulator member covering the substrate and a second conductor member being in contact with the second gate electrode through a second hole disposed on the insulator member.
    Type: Grant
    Filed: October 28, 2015
    Date of Patent: January 9, 2018
    Assignee: Canon Kabushiki Kaisha
    Inventors: Mineo Shimotsusa, Masatsugu Itahashi, Yusuke Onuki, Nobuaki Kakinuma, Masato Fujita
  • Patent number: 9825077
    Abstract: A photoelectric conversion device includes a photoelectric conversion region having a plurality of photoelectric conversion elements and a first MOS transistor configured to read a signal in response to an electric charge of each photoelectric conversion element; and a peripheral circuit region having a second MOS transistor configured to drive the first MOS transistor and/or amplify the signal read from the photoelectric conversion region, the photoelectric conversion region and the peripheral circuit region being located on the same semiconductor substrate, wherein an impurity concentration in a drain of the first MOS transistor is lower than an impurity concentration in a drain of the second MOS transistor.
    Type: Grant
    Filed: July 22, 2015
    Date of Patent: November 21, 2017
    Assignee: Canon Kabushiki Kaisha
    Inventors: Takanori Watanabe, Tetsuya Itano, Hidekazu Takahashi, Shunsuke Takimoto, Kotaro Abukawa, Hiroaki Naruse, Shigeru Nishimura, Masatsugu Itahashi