Patents by Inventor Masaya Tajima

Masaya Tajima has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7855698
    Abstract: A display driving method drives a display to make a gradation display on a screen of the display depending on a length of a light emission time in each of sub fields forming 1 field, where 1 field is a time in which an image is displayed, N sub fields SF1 through SFN form 1 field, and each sub field includes an address display-time in which a wall charge is formed with respect to all pixels which are to emit light within the sub field and a sustain time which is equal to the light emission time and determines a luminance level. The display driving method includes the steps of setting the sustain times of each of the sub fields approximately constant within 1 field, and displaying image data on the display using N+1 gradation levels from a luminance level 0 to a luminance level N.
    Type: Grant
    Filed: August 21, 2006
    Date of Patent: December 21, 2010
    Assignee: Hitachi Limited
    Inventors: Yukio Otobe, Masahiro Yoshida, Nobuaki Otaka, Masaya Tajima, Katsuhiro Ishida, Kiyotaka Ogawa, Toshio Ueda
  • Patent number: 7588962
    Abstract: A method for manufacturing a semiconductor device that includes a housing, formed of a polyamide-series thermoplastic resin, and a semiconductor package sealed in the housing, which is formed of a thermosetting epoxy resin. The surface of the package is modified by UV-irradiation to have adhesive properties to polyamide. A plurality of connector terminals extend from the package and housing in parallel. A portion of the terminals is also sealed in the housing together with the package. Thus, the device is easily produced by insert molding and has excellent moisture resistance.
    Type: Grant
    Filed: September 4, 2008
    Date of Patent: September 15, 2009
    Assignee: Kabushiki Kaisha Tokai Rika Denki Seisakusho
    Inventors: Masaya Tajima, Katsuya Kogiso, Mitsuo Watanabe, Toshiki Matsubara, Kenji Sato
  • Publication number: 20090091519
    Abstract: Image quality deterioration resulting from a dither process is controlled by using a matrix like random pattern as a dither toggle pattern in signal processing for display such as a plasma display. A matrix like random pattern is generated for each frame in a pseudorandom code generator as a dither toggle pattern, or is reused after reversing bits.
    Type: Application
    Filed: August 5, 2008
    Publication date: April 9, 2009
    Inventors: Rei Momose, Masaya Tajima
  • Publication number: 20090091023
    Abstract: A semiconductor device package incorporating a connector that reduces manufacturing operations and enables efficient manufacturing. The semiconductor device package includes a primary molded product and a secondary molded product. The primary molded product includes a semiconductor device, a lead connected to the semiconductor device, and a plug terminal formed by at least part of the lead. The primary molded product envelops the semiconductor device and part of the lead in a first resin material. The secondary molded product envelops the primary molded product in a second resin material and includes a connector guide surrounding the plug terminal and used to guide insertion of a holder holding a socket terminal connectable to the plug terminal.
    Type: Application
    Filed: October 2, 2008
    Publication date: April 9, 2009
    Applicant: KABUSHIKI KAISHI TOKAI RIKA DENKI SEISAKUSHO
    Inventor: Masaya Tajima
  • Publication number: 20090023253
    Abstract: A method for manufacturing a semiconductor device that includes a housing, formed of a polyamide-series thermoplastic resin, and a semiconductor package sealed in the housing, which is formed of a thermosetting epoxy resin. The surface of the package is modified by UV-irradiation to have adhesive properties to polyamide. A plurality of connector terminals extend from the package and housing in parallel. A portion of the terminals is also sealed in the housing together with the package. Thus, the device is easily produced by insert molding and has excellent moisture resistance.
    Type: Application
    Filed: September 4, 2008
    Publication date: January 22, 2009
    Inventors: Masaya Tajima, Katsuya Kogiso, Mitsuo Watanabe, Toshiki Matsubara, Kenji Sato
  • Publication number: 20090002550
    Abstract: An image display apparatus, which converts a video signal in a first video signal format into a video signal in a second video signal format causing an increase in dynamic range, and displays the video signal in the second video format, includes a video signal conversion circuit configured to receive the video signal in the first video signal format and to produce the video signal in the second video signal format, a drive circuit configured to drive an image display panel according to the video signal in the second video signal format, and a signal processing module including signal processing circuits configured to perform signal processing necessary to drive the drive circuit, wherein the video signal conversion circuit is situated inside the signal processing module.
    Type: Application
    Filed: January 31, 2008
    Publication date: January 1, 2009
    Applicant: Hitachi, Ltd.
    Inventors: Yuichiro Kimura, Yutaka Chiaki, Katsunobu Kimura, Hideaki Ohki, Masaya Tajima, Kiyoshi Takata
  • Patent number: 7420576
    Abstract: A display apparatus displaying gray scale by using a subfield method has a gain control circuit, a sub gain control circuit, and an error diffusion circuit. The gain control circuit has the number of gray scale levels of an input signal and outputting a first intermediate image signal with a first number of gray scale levels, and the sub gain control circuit receives the first intermediate image signal, compresses the number of gray scale levels of the first intermediate image signal, and outputs a second intermediate image signal with a second number of gray scale levels. The error diffusion circuit receives the second intermediate image signal and increase the number of gray scale levels by simulating additional gray scale levels through error diffusion.
    Type: Grant
    Filed: March 24, 2004
    Date of Patent: September 2, 2008
    Assignee: Fujitsu Hitachi Plasma Display Limited
    Inventors: Masanori Takeuchi, Masaya Tajima, Yutaka Chiaki, Shunji Ohta, Akira Yamamoto
  • Publication number: 20080165087
    Abstract: The present invention relates to a PDP device, and mainly provides a technique for preventing occurrence of flicker (in particular, line flicker in an interlace display). In the present PDP device, by control operation in a control circuit, in each of odd numbered and even numbered fields of the conventional art, both odd numbered and even numbered display line groups are continuously driven in a first half and a second half based on the same data (data of the odd numbered display line) as a new field structure.
    Type: Application
    Filed: August 29, 2007
    Publication date: July 10, 2008
    Inventors: Ryo Nakano, Masaya Tajima, Yasuji Noguchi
  • Publication number: 20080012883
    Abstract: A display apparatus displaying gray scale by using a subfield method has a main path, a sub path, a switch circuit, a motion region detection circuit, a first judging circuit, a level detection circuit, a motion detection correction circuit, and a second judging circuit. The switch circuit outputs a first image signal generated by the main path or a second image signal generated by the sub path by switching therebetween, and the first judging circuit outputs a first motion signal in accordance with an output of the motion region detection circuit. The motion detection correction circuit receives the first motion signal and a level signal, and outputs a second motion signal in accordance with the level signal, and the second judging circuit receives the second motion signal and the level signal, and outputs a switching control signal to the switch circuit.
    Type: Application
    Filed: July 17, 2007
    Publication date: January 17, 2008
    Applicant: FUJITSU HITACHI PLASMA DISPLAY LIMITED
    Inventors: Shunji OHTA, Masanori Takeuchi, Yutaka Chiaki, Masaya Tajima, Akira Yamamoto
  • Publication number: 20070230813
    Abstract: An error diffusion processing circuit is provided which has a separator dividing digital pixel data of an object pixel into high bits and low bits, and making the low bits error data, multiplier circuits multiplying transmission error data of a plurality of adjacent pixels by adjacent pixel weighting coefficients, and outputting weighted transmission error data, a first adder circuit performing addition on the basis of the error data of the object pixel, and the weighted transmission error data of adjacent pixels, and outputting an added value and a carry value, a second adder circuit adding the high bit pixel data of the object pixel and the carry value, and outputting output pixel data, and a correction circuit correcting transmission error data of an adjacent pixel to the error data of the object pixel or data obtained by performing arithmetic processing of it when the transmission error data of the adjacent pixel is 0, and outputting it to the corresponding multiplier circuit.
    Type: Application
    Filed: February 22, 2006
    Publication date: October 4, 2007
    Applicant: FUJITSU HITACHI PLASMA DISPLAY LIMITED
    Inventors: Akira Yamamoto, Masaya Tajima, Toshio Ueda
  • Patent number: 7256755
    Abstract: A display apparatus displaying gray scale by using a subfield method has a main path, a sub path, a switch circuit, a motion region detection circuit, a first judging circuit, a level detection circuit, a motion detection correction circuit, and a second judging circuit. The switch circuit outputs a first image signal generated by the main path or a second image signal generated by the sub path by switching therebetween, and the first judging circuit outputs a first motion signal in accordance with an output of the motion region detection circuit. The motion detection correction circuit receives the first motion signal and a level signal, and outputs a second motion signal in accordance with the level signal, and the second judging circuit receives the second motion signal and the level signal, and outputs a switching control signal to the switch circuit.
    Type: Grant
    Filed: March 16, 2004
    Date of Patent: August 14, 2007
    Assignee: Fujitsu Hitachi Plasma Display Limited
    Inventors: Shunji Ohta, Masanori Takeuchi, Yutaka Chiaki, Masaya Tajima, Akira Yamamoto
  • Patent number: 7209152
    Abstract: A signal processor for multiple gradations for carrying out coding by replacing an input image signal with a plurality of subfields, comprising a main path for generating a primary color signal having a first number of gradations, a sub-path for generating a primary color signal having a second number of gradations, which is smaller than the first number of gradations, a switch, a movement detection circuit, a level detection circuit, a path switching control circuit for switching the switch based on the amount of movement and the level, plural subfield coding circuits for carrying out subfield coding different from each another, a superposing circuit for selecting one of the outputs of the plural subfield coding circuits, and a superposing control circuit, and thus preventing a moving false contour.
    Type: Grant
    Filed: March 16, 2004
    Date of Patent: April 24, 2007
    Assignee: Fujitsu Hitachi Plasma Display Limited
    Inventors: Yutaka Chiaki, Shunji Ohta, Masanori Takeuchi, Masaya Tajima, Akira Yamamoto, Yuichiro Kimura
  • Publication number: 20070075924
    Abstract: In an image signal processing unit in a PDP device, a noise reducer unit is provided at a former stage of an error diffusion processing unit. The noise reducer unit has an LPF to input display data and an edge determining unit and a level determining unit to the LPF. Switching between an output which has passed through the LPF and an output which has not passed through the LPF is performed in a data selecting unit according to a pixel region in display data based upon respective determination results, and the selected signal is outputted as output display data. Noise contained in the input display data is reduced by the noise reducer unit while maintaining the fineness of an image. Accordingly, a technology capable of eliminating or reducing noise in display data while maintaining fineness of a display image is provided for digital display.
    Type: Application
    Filed: October 5, 2006
    Publication date: April 5, 2007
    Inventors: Rei Momose, Masaya Tajima, Ayahito Kojima
  • Publication number: 20070001932
    Abstract: Aiming at more exactly correcting luminance degradation in a color-wise manner, a plasma display device proposed herein has a gain correction section color-wisely correcting gains of video signals for a plurality of colors; and a plasma display panel presenting display corresponding to the gain-corrected video signals while being supplied with sustain pulses, wherein the gain correction section color-wisely corrects gains of the video signals, corresponding to time corresponded to the operation time, video load ratio, and the number of the sustain pulses or values relevant thereto.
    Type: Application
    Filed: June 15, 2006
    Publication date: January 4, 2007
    Applicant: FUJITSU HITACHI PLASMA DISPLAY LIMITED
    Inventors: Yoshinori Miyazaki, Yasuji Noguchi, Masaya Tajima, Ayahito Kojima
  • Publication number: 20060279482
    Abstract: A display driving method drives a display to make a gradation display on a screen of the display depending on a length of a light emission time in each of sub fields forming 1 field, where 1 field is a time in which an image is displayed, N sub fields SF1 through SFN form 1 field, and each sub field includes an address display-time in which a wall charge is formed with respect to all pixels which are to emit light within the sub field and a sustain time which is equal to the light emission time and determines a luminance level. The display driving method includes the steps of setting the sustain times of each of the sub fields approximately constant within 1 field, and displaying image data on the display using N+1 gradation levels from a luminance level 0 to a luminance level N.
    Type: Application
    Filed: August 21, 2006
    Publication date: December 14, 2006
    Applicant: HITACHI, LTD
    Inventors: Yukio Otobe, Masahiro Yoshida, Nobuaki Otaka, Masaya Tajima, Katsuhiro Ishida, Kiyotaka Ogawa, Toshio Ueda
  • Patent number: 7119766
    Abstract: A display driving method drives a display to make a gradation display on a screen of the display depending on a length of a light emission time in each of sub fields forming 1 field, where 1 field is a time in which an image is displayed, N sub fields SF1 through SFN form 1 field, and each sub field includes an address display-time in which a wall charge is formed with respect to all pixels which are to emit light within the sub field and a sustain time which is equal to the light emission time and determines a luminance level. The display driving method includes the steps of setting the sustain times of each of the sub fields approximately constant within 1 field, and displaying image data on the display using N+1 gradation levels from a luminance level 0 to a luminance level N.
    Type: Grant
    Filed: May 17, 2004
    Date of Patent: October 10, 2006
    Assignee: Hitachi, Ltd.
    Inventors: Yukio Otobe, Masahiro Yoshida, Nobuaki Otaka, Masaya Tajima, Katsuhiro Ishida
  • Patent number: 7095390
    Abstract: A display driving method drives a display to make a gradation display on a screen of the display depending on a length of a light emission time in each of sub fields forming 1 field, where 1 field is a time in which an image is displayed, N sub fields SF1 through SFN form 1 field, and each sub field includes an address display-time in which a wall charge is formed with respect to all pixels which are to emit light within the sub field and a sustain time which is equal to the light emission time and determines a luminance level. The display driving method includes the steps of setting the sustain times of each of the sub fields approximately constant within 1 field, and displaying image data on the display using N+1 gradation levels from a luminance level 0 to a luminance level N.
    Type: Grant
    Filed: April 12, 2000
    Date of Patent: August 22, 2006
    Assignee: Fujitsu Limited
    Inventors: Yukio Otobe, Masahiro Yoshida, Nobuaki Otaka, Masaya Tajima, Katsuhiro Ishida
  • Publication number: 20040263539
    Abstract: A signal processor for multiple gradations for carrying out coding by replacing an input image signal with a plurality of subfields, comprising a main path for generating a primary color signal having a first number of gradations, a sub-path for generating a primary color signal having a second number of gradations, which is smaller than the first number of gradations, a switch, a movement detection circuit for detecting the amount of movement from the change in primary color signal between the current field and the preceding field, a level detection circuit for detecting the level indicating the tendency for a moving image false contour to occur, a path switching control circuit for switching the switch based on the amount of movement and the level, plural subfield coding circuits for carrying out subfield coding different from each another, a superposing circuit for selecting one of the outputs of the plural subfield coding circuits, and a superposing control circuit, and thus preventing a moving false cont
    Type: Application
    Filed: March 16, 2004
    Publication date: December 30, 2004
    Applicant: FUJITSU HITACHI PLASMA DISPLAY LIMITED
    Inventors: Yutaka Chiaki, Shunji Ohta, Masanori Takeuchi, Masaya Tajima, Akira Yamamoto, Yuichiro Kimura
  • Publication number: 20040263538
    Abstract: A display apparatus displaying gray scale by using a subfield method has a main path, a sub path, a switch circuit, a motion region detection circuit, a first judging circuit, a level detection circuit, a motion detection correction circuit, and a second judging circuit. The switch circuit outputs a first image signal generated by the main path or a second image signal generated by the sub path by switching therebetween, and the first judging circuit outputs a first motion signal in accordance with an output of the motion region detection circuit. The motion detection correction circuit receives the first motion signal and a level signal, and outputs a second motion signal in accordance with the level signal, and the second judging circuit receives the second motion signal and the level signal, and outputs a switching control signal to the switch circuit.
    Type: Application
    Filed: March 16, 2004
    Publication date: December 30, 2004
    Applicant: FUJITSU HITACHI PLASMA DISPLAY LIMITED
    Inventors: Shunji Ohta, Masanori Takeuchi, Yutaka Chiaki, Masaya Tajima, Akira Yamamoto
  • Patent number: RE40769
    Abstract: A method of controlling the gray scale of a plasma display device has a forming step of forming a frame for an image by a plurality of subframes each having a different brightness, a setting step of setting the number of sustain emissions of each subframe in an anti-geometrical progression corresponding to the brightness of each subframe, and a displaying step of displaying the image on the plasma display device by a gray scale display having a specific brightness. The number of sustain emissions in each subframe is set individually by the each subframe, and this establishes a linear relation between the gray level and the corresponding brightness Therefore, an enhancement of display quality of the plasma display device can be realized.
    Type: Grant
    Filed: August 24, 2001
    Date of Patent: June 23, 2009
    Assignee: Hitachi, Ltd.
    Inventors: Keishin Nagaoka, Masaya Tajima, Yoshimasa Awata, Yoshikazu Kanazawa, Toshio Ueda