Patents by Inventor Masayuki Itou

Masayuki Itou has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7968837
    Abstract: An object is to provide a separated sensor capable of synchronizing a light transmitting unit with a light receiving unit, without using a control line. There is provided a separated sensor including a light transmitting unit that transmits detection light to a monitoring area, and a light receiving unit that receives detection light transmitted by the light transmitting unit, the light transmitting unit and the light receiving unit laid out separately from each other. On one of the light transmitting unit and the light receiving unit, there is provided a synchronization-light transmitting unit that transmits, by wireless, synchronization light to synchronize the light transmitting unit with the light receiving unit.
    Type: Grant
    Filed: February 23, 2006
    Date of Patent: June 28, 2011
    Assignee: Hochiki Corporation
    Inventors: Satoshi Nakajima, Masayuki Itou
  • Publication number: 20090026354
    Abstract: [Object] An object is to provide a separated sensor capable of synchronizing a light transmitting unit with a light receiving unit, without using a control line. [Solving means] There is provided a separated sensor including a light transmitting unit that transmits detection light to a monitoring area, and a light receiving unit that receives detection light transmitted by the light transmitting unit, the light transmitting unit and the light receiving unit laid out separately from each other. On one of the light transmitting unit and the light receiving unit, there is provided a synchronization-light transmitting unit that transmits, by wireless, synchronization light to synchronize the light transmitting unit with the light receiving unit.
    Type: Application
    Filed: February 23, 2006
    Publication date: January 29, 2009
    Applicant: Hochiki Corporation
    Inventors: Satoshi Nakajima, Masayuki Itou
  • Publication number: 20070275514
    Abstract: Semiconductor device is prevented from undergoing decline in characteristics and reliability even if width of isolation trench is reduced. Semiconductor device includes: substrate obtained by building up second silicon substrate on first silicon substrate via silicon oxide film; element-forming region in which elements (gate electrode and source/drain region) have been formed; substrate-contact aperture region in which substrate-contact aperture has been formed; isolation trench region in which an isolation trench isolating elements on the second silicon substrate has been formed; polysilicon filling the isolation trench; a prepared hole penetrating silicon oxide films of the substrate-contact aperture region and leading to the first silicon substrate; and a wiring layer connected to the first silicon substrate within the prepared hole.
    Type: Application
    Filed: May 24, 2007
    Publication date: November 29, 2007
    Applicant: NEC ELECTRONICS CORPORATION
    Inventor: Masayuki Itou
  • Patent number: 7259073
    Abstract: A method of manufacturing a semiconductor device that suppresses emergence of a waste in an isolation trench formation process is to be provided. The method comprises forming an isolation trench having a predetermined depth from a surface of a semiconductor substrate; forming a dielectric layer on the surface of the semiconductor substrate including the isolation trench; filling the isolation trench with a CVD layer; removing the dielectric layer except a portion in the isolation trench by an etching; sequentially forming an insulating layer and a conductive layer; forming a resist defining a pattern which covers via the conductive layer a portion of the insulating layer in contact with the dielectric layer; and performing an anisotropic etching on the resist to thereby remove a portion of the conductive layer exposing a surface thereof.
    Type: Grant
    Filed: November 9, 2004
    Date of Patent: August 21, 2007
    Assignee: NEC Electronics Corporation
    Inventor: Masayuki Itou
  • Publication number: 20070018276
    Abstract: A method of manufacturing a semiconductor device that suppresses emergence of a waste in an isolation trench formation process is to be provided. The method comprises forming an isolation trench having a predetermined depth from a surface of a semiconductor substrate; forming a dielectric layer on the surface of the semiconductor substrate including the isolation trench; filling the isolation trench with a CVD layer; removing the dielectric layer except a portion in the isolation trench by an etching; sequentially forming an insulating layer and a conductive layer; forming a resist defining a pattern which covers via the conductive layer a portion of the insulating layer in contact with the dielectric layer; and performing an anisotropic etching on the resist to thereby remove a portion of the conductive layer exposing a surface thereof.
    Type: Application
    Filed: September 25, 2006
    Publication date: January 25, 2007
    Applicant: NEC ELECTRONICS CORPORATION
    Inventor: Masayuki Itou
  • Publication number: 20050101074
    Abstract: A method of manufacturing a semiconductor device that suppresses emergence of a waste in an isolation trench formation process is to be provided. The method comprises forming an isolation trench having a predetermined depth from a surface of a semiconductor substrate; forming a dielectric layer on the surface of the semiconductor substrate including the isolation trench; filling the isolation trench with a CVD layer; removing the dielectric layer except a portion in the isolation trench by an etching; sequentially forming an insulating layer and a conductive layer; forming a resist defining a pattern which covers via the conductive layer a portion of the insulating layer in contact with the dielectric layer; and performing an anisotropic etching on the resist to thereby remove a portion of the conductive layer exposing a surface thereof.
    Type: Application
    Filed: November 9, 2004
    Publication date: May 12, 2005
    Inventor: Masayuki Itou
  • Patent number: 5264844
    Abstract: An apparatus for detecting the angular position for an internal combustion engine is capable of accurately detecting the angular position by a simple structure without being influenced by changes in the period of angular position signals due to inaccuracy of rotor contour and a change in rotational speed. Up-down counters up and down count clock pulses in response to the pulse train from a rotation sensor for determining information on unequal interval corresponding to a reference position in the pulse train. The frequency of the angular position is divided by a frequency dividing circuit. Up-down counting of clock pulses by the first and second up-down counters is terminated within two periods of the angular position signal. The outputs of the first and second up-down counters are alternatively up counted and down counted every one period of the angular position signal to determine the reference angular position based upon any one of determination outputs from up-down counters.
    Type: Grant
    Filed: September 2, 1992
    Date of Patent: November 23, 1993
    Assignee: Nippondenso Co., Ltd.
    Inventors: Masayuki Itou, Hidehito Mori