Patents by Inventor Massimiliano Picca
Massimiliano Picca has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20220045604Abstract: According to an aspect, a non-regulated power converter includes a plurality of switching tank converter (STC) modules configured to be connected in parallel and to a load. The plurality of STC modules includes a first STC module configured to generate a first output current and a second STC module configured to generate a second output current. The first STC module includes an output current (OC) measuring circuit configured to measure a value of the first output current, and a dead time (DT) adjustor configured to compare the value of the first output current with a value of a minimum output current provided by the plurality of STC modules. The DT adjustor is configured to adjust a dead time in response to the value of the first output current being greater than the value of the minimum output current.Type: ApplicationFiled: October 14, 2021Publication date: February 10, 2022Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Michele SBLANO, Saverio DE PALMA, Massimiliano PICCA, Stefano CASULA
-
Patent number: 11165335Abstract: According to an aspect, a non-regulated power converter includes a plurality of switching tank converter (STC) modules configured to be connected in parallel and to a load. The plurality of STC modules includes a first STC module configured to generate a first output current and a second STC module configured to generate a second output current. The first STC module includes an output current (OC) measuring circuit configured to measure a value of the first output current, and a dead time (DT) adjustor configured to compare the value of the first output current with a value of a minimum output current provided by the plurality of STC modules. The DT adjustor is configured to adjust a dead time in response to the value of the first output current being greater than the value of the minimum output current.Type: GrantFiled: December 13, 2019Date of Patent: November 2, 2021Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Michele Sblano, Saverio De Palma, Massimiliano Picca, Stefano Casula
-
Publication number: 20210184571Abstract: According to an aspect, a non-regulated power converter includes a plurality of switching tank converter (STC) modules configured to be connected in parallel and to a load. The plurality of STC modules includes a first STC module configured to generate a first output current and a second STC module configured to generate a second output current. The first STC module includes an output current (OC) measuring circuit configured to measure a value of the first output current, and a dead time (DT) adjustor configured to compare the value of the first output current with a value of a minimum output current provided by the plurality of STC modules. The DT adjustor is configured to adjust a dead time in response to the value of the first output current being greater than the value of the minimum output current.Type: ApplicationFiled: December 13, 2019Publication date: June 17, 2021Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventors: Michele SBLANO, Saverio DE PALMA, Massimiliano PICCA, Stefano CASULA
-
Patent number: 10250150Abstract: A driving module of a resonant converter receives an enabling signal and a voltage across a switch of a secondary side, and generates a control signal for first and second switches of the secondary side. The driving module cyclically controls switches of a primary full-bridge switching stage and both switches of the secondary side. After a fixed time, the driving module turns off the low-side switch and turns on the high-side switch, waits for a rising edge of the enabling signal, waits for zero current in the secondary side switches, turns off the first switch via the control signal after a variable delay relative to the rising edge of the enabling signal, keeps the second switch on, waits for zero voltage across the first switch, switches back on the first switch via the control signal when the voltage measured across the first switch drops below a variable threshold.Type: GrantFiled: January 9, 2018Date of Patent: April 2, 2019Assignee: STMicroelectronics S.r.l.Inventors: Roberto Cardu, Massimiliano Picca, Lorenzo Trevisan, Cristian Porta
-
Patent number: 10084385Abstract: A resonant converter includes a primary switching circuit including a primary winding and upper and lower switching half-bridge circuits alternately activated during switching cycles of the resonant converter responsive to switching control signals. The switching half-bridge circuits each include a phase node to drive the primary winding. A resonance inductor is coupled to the primary winding. A secondary resonant circuit has a secondary winding magnetically coupled to the primary winding and a resonance capacitor electrically coupled to the secondary winding. A driving circuit generates the switching control signals and senses if a voltage on the phase node of one of the upper and lower switching half-bridge circuits is a negative voltage. The driving circuit adjusts the switching control signals for the switching half-bridge circuit to be activated next switching cycle by a shift time reduced each switching cycle until the negative voltage is less than a negligible under-voltage value.Type: GrantFiled: June 23, 2017Date of Patent: September 25, 2018Assignee: STMicroelectronics S.r.l.Inventors: Lorenzo Trevisan, Massimiliano Picca, Roberto Cardu, Cristian Porta
-
Publication number: 20180131287Abstract: A driving module of a resonant converter receives an enabling signal and a voltage across a switch of a secondary side, and generates a control signal for first and second switches of the secondary side. The driving module cyclically controls switches of a primary full-bridge switching stage and both switches of the secondary side. After a fixed time, the driving module turns off the low-side switch and turns on the high-side switch, waits for a rising edge of the enabling signal, waits for zero current in the secondary side switches, turns off the first switch via the control signal after a variable delay relative to the rising edge of the enabling signal, keeps the second switch on, waits for zero voltage across the first switch, switches back on the first switch via the control signal when the voltage measured across the first switch drops below a variable threshold.Type: ApplicationFiled: January 9, 2018Publication date: May 10, 2018Inventors: Roberto Cardu, Massimiliano Picca, Lorenzo Trevisan, Cristian Porta
-
Patent number: 9882501Abstract: A driving module of a resonant converter receives an enabling signal and a voltage across a switch of a secondary side, and generates a control signal for first and second switches of the secondary side. The driving module cyclically controls switches of a primary full-bridge switching stage and both switches of the secondary side. After a fixed time, the driving module turns off the low-side switch and turns on the high-side switch, waits for a rising edge of the enabling signal, waits for zero current in the secondary side switches, turns off the first switch via the control signal after a variable delay relative to the rising edge of the enabling signal, keeps the second switch on, waits for zero voltage across the first switch, switches back on the first switch via the control signal when the voltage measured across the first switch drops below a variable threshold.Type: GrantFiled: March 31, 2017Date of Patent: January 30, 2018Assignee: STMICROELECTRONICS S.R.L.Inventors: Roberto Cardu, Massimiliano Picca, Lorenzo Trevisan, Cristian Porta
-
Publication number: 20170288555Abstract: A resonant converter includes a primary switching circuit including a primary winding and upper and lower switching half-bridge circuits alternately activated during switching cycles of the resonant converter responsive to switching control signals. The switching half-bridge circuits each include a phase node to drive the primary winding. A resonance inductor is coupled to the primary winding. A secondary resonant circuit has a secondary winding magnetically coupled to the primary winding and a resonance capacitor electrically coupled to the secondary winding. A driving circuit generates the switching control signals and senses if a voltage on the phase node of one of the upper and lower switching half-bridge circuits is a negative voltage. The driving circuit adjusts the switching control signals for the switching half-bridge circuit to be activated next switching cycle by a shift time reduced each switching cycle until the negative voltage is less than a negligible under-voltage value.Type: ApplicationFiled: June 23, 2017Publication date: October 5, 2017Inventors: Lorenzo Trevisan, Massimiliano Picca, Roberto Cardu, Cristian Porta
-
Patent number: 9780670Abstract: A resonant converter includes a primary switching circuit with a primary winding and a primary full-bridge switching stage that drives the primary winding. A resonance inductor is in series with the primary winding. A secondary resonant circuit has a secondary winding magnetically coupled to the primary winding and a resonance capacitor electrically connected in parallel with the secondary winding. A secondary rectification stage is electrically connected in parallel to the resonance capacitor. A driving module receives a signal representing the voltage measured across an upper or lower switching half-bridge. The drive module detects a negative voltage in the signal. At each cycle, the drive module anticipates a control signal for control of the switches of the lower or upper switching half-bridge that is to be activated the next switching cycle by a shift time that is reduced cycle until the condition of absence of negative voltage in the signal is satisfied.Type: GrantFiled: April 28, 2016Date of Patent: October 3, 2017Assignee: STMICROELECTRONICS S.R.L.Inventors: Lorenzo Trevisan, Massimiliano Picca, Roberto Cardu, Cristian Porta
-
Publication number: 20170207709Abstract: A driving module of a resonant converter receives an enabling signal and a voltage across a switch of a secondary side, and generates a control signal for first and second switches of the secondary side. The driving module cyclically controls switches of a primary full-bridge switching stage and both switches of the secondary side. After a fixed time, the driving module turns off the low-side switch and turns on the high-side switch, waits for a rising edge of the enabling signal, waits for zero current in the secondary side switches, turns off the first switch via the control signal after a variable delay relative to the rising edge of the enabling signal, keeps the second switch on, waits for zero voltage across the first switch, switches back on the first switch via the control signal when the voltage measured across the first switch drops below a variable threshold.Type: ApplicationFiled: March 31, 2017Publication date: July 20, 2017Inventors: Roberto Cardu, Massimiliano Picca, Lorenzo Trevisan, Cristian Porta
-
Patent number: 9647565Abstract: A driving module of a resonant converter receives an enabling signal and a voltage across a switch of a secondary side, and generates a control signal for first and second switches of the secondary side. The driving module cyclically controls switches of a primary full-bridge switching stage and both switches of the secondary side. After a fixed time, the driving module turns off the low-side switch and turns on the high-side switch, waits for a rising edge of the enabling signal, waits for zero current in the secondary side switches, turns off the first switch via the control signal after a variable delay relative to the rising edge of the enabling signal, keeps the second switch on, waits for zero voltage across the first switch, switches back on the first switch via the control signal when the voltage measured across the first switch drops below a variable threshold.Type: GrantFiled: April 28, 2016Date of Patent: May 9, 2017Assignee: STMICROELECTRONICS S.R.L.Inventors: Roberto Cardu, Massimiliano Picca, Lorenzo Trevisan, Cristian Porta
-
Publication number: 20170099001Abstract: A driving module of a resonant converter receives an enabling signal and a voltage across a switch of a secondary side, and generates a control signal for first and second switches of the secondary side. The driving module cyclically controls switches of a primary full-bridge switching stage and both switches of the secondary side. After a fixed time, the driving module turns off the low-side switch and turns on the high-side switch, waits for a rising edge of the enabling signal, waits for zero current in the secondary side switches, turns off the first switch via the control signal after a variable delay relative to the rising edge of the enabling signal, keeps the second switch on, waits for zero voltage across the first switch, switches back on the first switch via the control signal when the voltage measured across the first switch drops below a variable threshold.Type: ApplicationFiled: April 28, 2016Publication date: April 6, 2017Inventors: Roberto Cardu, Massimiliano Picca, Lorenzo Trevisan, Cristian Porta
-
Publication number: 20170099002Abstract: A resonant converter includes a primary switching circuit with a primary winding and a primary full-bridge switching stage that drives the primary winding. A resonance inductor is in series with the primary winding. A secondary resonant circuit has a secondary winding magnetically coupled to the primary winding and a resonance capacitor electrically connected in parallel with the secondary winding. A secondary rectification stage is electrically connected in parallel to the resonance capacitor. A driving module receives a signal representing the voltage measured across an upper or lower switching half-bridge. The drive module detects a negative voltage in the signal. At each cycle, the drive module anticipates a control signal for control of the switches of the lower or upper switching half-bridge that is to be activated the next switching cycle by a shift time that is reduced cycle until the condition of absence of negative voltage in the signal is satisfied.Type: ApplicationFiled: April 28, 2016Publication date: April 6, 2017Inventors: Lorenzo Trevisan, Massimiliano Picca, Roberto Cardu, Cristian Porta
-
Patent number: 9018046Abstract: An area efficient distributed device for integrated voltage regulators comprising at least one filler cell coupled between a pair of PADS on I/O rail of a chip and at least one additional filler cell having small size portion of said device is coupled to said I/O rails for distributing portions of said device on the periphery of said chip. The device is coupled as small size portion on the lower portion of said second filler cell for distributing said device on the periphery of said chip and providing maximal area utilization.Type: GrantFiled: March 15, 2013Date of Patent: April 28, 2015Assignees: STMicroelectronics International N.V., STMicroelectronics S.r.l.Inventors: Joshipura Jwalant, Nitin Bansal, Amit Katyal, Massimiliano Picca
-
Patent number: 8426924Abstract: An area efficient distributed device for integrated voltage regulators comprising at least one filler cell coupled between a pair of PADS on I/O rail of a chip and at least one additional filler cell having small size replica of said device is coupled to said I/O rails for distributing replicas of said device on the periphery of said chip. The device is coupled as small size replica on the lower portion of said second filler cell for distributing said device on the periphery of said chip and providing maximal area utilization.Type: GrantFiled: March 24, 2011Date of Patent: April 23, 2013Assignee: STMicroelectronics Pvt. Ltd.Inventors: Joshipura Jwalant, Nitin Bansal, Amit Katyal, Massimiliano Picca
-
Publication number: 20110167629Abstract: An area efficient distributed device for integrated voltage regulators comprising at least one filler cell connected between a pair of PADS on I/O rail of a chip and at least one additional filler cell having small size replica of said device is coupled to said I/O rails for distributing replicas of said device on the periphery of said chip. The device is connected as small size replica on the lower portion of said second filler cell for distributing said device on the periphery of said chip and providing maximal area utilization.Type: ApplicationFiled: March 24, 2011Publication date: July 14, 2011Applicant: STMICROELECTRONICS PVT. LTD.Inventors: Joshipura JWALANT, Nitin BANSAL, Amit KATYAL, Massimiliano PICCA
-
Patent number: 7939856Abstract: An area efficient distributed device for integrated voltage regulators comprising at least one filler cell connected between a pair of PADS on I/O rail of a chip and at least one additional filler cell having small size replica of said device is coupled to said I/O rails for distributing replicas of said device on the periphery of said chip. The device is connected as small size replica on the lower portion of said second filler cell for distributing said device on the periphery of said chip and providing maximal area utilization.Type: GrantFiled: January 3, 2006Date of Patent: May 10, 2011Assignee: STMicroelectronics Pvt. Ltd.Inventors: Joshipura Jwalant, Nitin Bansal, Amit Katyal, Massimiliano Picca
-
Patent number: 7733697Abstract: An electrically programmable memory including: an array of a plurality of memory cells arranged accordingly to a NAND architecture, said memory cells grouped into a plurality of memory blocks and each memory block including a plurality of memory pages; means for receiving an address corresponding to a respective memory block; selecting means for selecting the addressed memory block; and means for detecting a failure of the addressed memory block, wherein the means for detecting a failure includes: a plurality of registers, each register corresponding to a respective memory block and storing an indication of the failure of the respective memory block; and means for reading the register corresponding to the addressed memory block in response to the receiving of the address, and wherein the programmable memory further includes at least one redundant memory block of memory cells including a plurality of redundant memory pages, the selecting means selecting the at least one redundant memory block in place of the aType: GrantFiled: July 14, 2005Date of Patent: June 8, 2010Inventors: Massimiliano Picca, Stefano Zanardi
-
Patent number: 7622997Abstract: An oscillator system may include an oscillator block having a plurality of inputs and outputting a clock signal, a frequency divider block receiving the clock signal and outputting a divided clock signal, a tuning block receiving the divided clock signal and outputting a comparison signal, and a control block coupled to the tuning block. The control block may receive the comparison signal. The control block may include a configuration block for producing a plurality of outputs for the corresponding inputs of the oscillator block, and an Up/Down counter having outputs applied to the configuration block.Type: GrantFiled: June 28, 2007Date of Patent: November 24, 2009Assignee: STMicroelectronics S.r.L.Inventors: Stefano Amato, Francesco Mannino, Massimiliano Picca, Mirko Scapin
-
Publication number: 20080042720Abstract: An oscillator system may include an oscillator block having a plurality of inputs and outputting a clock signal, a frequency divider block receiving the clock signal and outputting a divided clock signal, a tuning block receiving the divided clock signal and outputting a comparison signal, and a control block coupled to the tuning block. The control block may receive the comparison signal. The control block may include a configuration block for producing a plurality of outputs for the corresponding inputs of the oscillator block, and an Up/Down counter having outputs applied to the configuration block.Type: ApplicationFiled: June 28, 2007Publication date: February 21, 2008Applicant: STMicroelectronics S.r.l.Inventors: Stefano AMATO, Francesco Mannino, Massimiliano Picca, Mirko Scapin