Patents by Inventor Matthew Donofrio

Matthew Donofrio has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200361121
    Abstract: Silicon carbide (SiC) wafers and related methods are disclosed that include intentional or imposed wafer shapes that are configured to reduce manufacturing problems associated with deformation, bowing, or sagging of such wafers due to gravitational forces or from preexisting crystal stress. Intentional or imposed wafer shapes may comprise SiC wafers with a relaxed positive bow from silicon faces thereof. In this manner, effects associated with deformation, bowing, or sagging for SiC wafers, and in particular for large area SiC wafers, may be reduced. Related methods for providing SiC wafers with relaxed positive bow are disclosed that provide reduced kerf losses of bulk crystalline material. Such methods may include laser-assisted separation of SiC wafers from bulk crystalline material.
    Type: Application
    Filed: February 7, 2020
    Publication date: November 19, 2020
    Inventors: Simon Bubel, Matthew Donofrio, John Edmond, Ian Currier
  • Publication number: 20200316724
    Abstract: A method for processing a crystalline substrate to form multiple patterns of subsurface laser damage facilitates subsequent fracture of the substrate to yield first and second substrate portions of reduced thickness. Multiple (e.g., two, three, or more) groups of parallel lines of multiple subsurface laser damage patterns may be sequentially interspersed with one another, with at least some lines of different groups not crossing one another. Certain implementations include formation of multiple subsurface laser damage patterns including groups of parallel lines that are non-parallel to one another, but with each line remaining within ±5 degrees of perpendicular to the <1120> direction of a hexagonal crystal structure of a material of the substrate.
    Type: Application
    Filed: June 23, 2020
    Publication date: October 8, 2020
    Inventors: Matthew Donofrio, John Edmond, Harshad Golakia
  • Patent number: 10797201
    Abstract: Monolithic LED chips are disclosed comprising a plurality of active regions on submount, wherein the submount comprises integral electrically conductive interconnect elements in electrical contact with the active regions and electrically connecting at least some of the active regions in series. The submount also comprises an integral insulator element electrically insulating at least some of the interconnect elements and active regions from other elements of the submount. The active regions are mounted in close proximity to one another with at least some of the active regions having a space between adjacent ones of the active regions that is 10 percent or less of the width of one or more of the active regions. The space is substantially not visible when the LED chip is emitting, such that the LED chips emits light similar to a filament.
    Type: Grant
    Filed: October 29, 2018
    Date of Patent: October 6, 2020
    Assignee: CREE, INC.
    Inventors: Kevin W. Haberern, Matthew Donofrio, Bennett Langsdorf, Thomas Place, Michael John Bergmann
  • Publication number: 20200211850
    Abstract: A method for removing a portion of a crystalline material (e.g., SiC) substrate includes joining a surface of the substrate to a rigid carrier (e.g., >800 ?m thick), with a subsurface laser damage region provided within the substrate at a depth relative to the surface. Adhesive material having a glass transition temperature above 25° C. may bond the substrate to the carrier. The crystalline material is fractured along the subsurface laser damage region to produce a bonded assembly including the carrier and a portion of the crystalline material. Fracturing of the crystalline material may be promoted by (i) application of a mechanical force proximate to at least one carrier edge to impart a bending moment in the carrier; (ii) cooling the carrier when the carrier has a greater coefficient of thermal expansion than the crystalline material; and/or (iii) applying ultrasonic energy to the crystalline material.
    Type: Application
    Filed: February 12, 2019
    Publication date: July 2, 2020
    Inventors: Matthew Donofrio, John Edmond, Hua-Shuang Kong, Elif Balkas
  • Patent number: 10658546
    Abstract: Simplified LED chip architectures or chip builds are disclosed that can result in simpler manufacturing processes using fewer steps. The LED structure can have fewer layers than conventional LED chips with the layers arranged in different ways for efficient fabrication and operation. The LED chips can comprise an active LED structure. A dielectric reflective layer is included adjacent to one of the oppositely doped layers. A metal reflective layer is on the dielectric reflective layer, wherein the dielectric and metal reflective layers extend beyond the edge of said active region. By extending the dielectric layer, the LED chips can emit with more efficiency by reflecting more LED light to emit in the desired direction. By extending the metal reflective layer beyond the edge of the active region, the metal reflective layer can serve as a current spreading layer and barrier, in addition to reflecting LED light to emit in the desired direction.
    Type: Grant
    Filed: January 21, 2015
    Date of Patent: May 19, 2020
    Assignee: Cree, Inc.
    Inventors: Matthew Donofrio, Pritish Kar, Sten Heikman, Harshad Golakia, Rajeev Acharya, Yuvaraj Dora
  • Patent number: 10611052
    Abstract: Silicon carbide (SiC) wafers and related methods are disclosed that include intentional or imposed wafer shapes that are configured to reduce manufacturing problems associated with deformation, bowing, or sagging of such wafers due to gravitational forces or from preexisting crystal stress. Intentional or imposed wafer shapes may comprise SiC wafers with a relaxed positive bow from silicon faces thereof. In this manner, effects associated with deformation, bowing, or sagging for SiC wafers, and in particular for large area SiC wafers, may be reduced. Related methods for providing SiC wafers with relaxed positive bow are disclosed that provide reduced kerf losses of bulk crystalline material. Such methods may include laser-assisted separation of SiC wafers from bulk crystalline material.
    Type: Grant
    Filed: May 17, 2019
    Date of Patent: April 7, 2020
    Assignee: Cree, Inc.
    Inventors: Simon Bubel, Matthew Donofrio, John Edmond, Ian Currier
  • Patent number: 10576585
    Abstract: A method for processing a crystalline substrate to form multiple patterns of subsurface laser damage facilitates subsequent fracture of the substrate to yield first and second substrate portions of reduced thickness. Multiple (e.g., two, three, or more) groups of parallel lines of multiple subsurface laser damage patterns may be sequentially interspersed with one another, with at least some lines of different groups not crossing one another. Certain implementations include formation of multiple subsurface laser damage patterns including groups of parallel lines that are non-parallel to one another, but with each line remaining within ±5 degrees of perpendicular to the <1120> direction of a hexagonal crystal structure of a material of the substrate.
    Type: Grant
    Filed: February 12, 2019
    Date of Patent: March 3, 2020
    Assignee: CREE, INC.
    Inventors: Matthew Donofrio, John Edmond, Harshad Golakia
  • Patent number: 10562130
    Abstract: A crystalline material processing method includes forming subsurface laser damage at a first average depth position to form cracks in the substrate interior propagating outward from at least one subsurface laser damage pattern, followed by imaging the substrate top surface, analyzing the image to identify a condition indicative of presence of uncracked regions within the substrate, and taking one or more actions responsive to the analyzing. One potential action includes changing an instruction set for producing subsequent laser damage formation (at second or subsequent average depth positions), without necessarily forming additional damage at the first depth position. Another potential action includes forming additional subsurface laser damage at the first depth position.
    Type: Grant
    Filed: May 13, 2019
    Date of Patent: February 18, 2020
    Assignee: CREE, INC.
    Inventors: Matthew Donofrio, John Edmond, Harshad Golakia, Eric Mayer
  • Patent number: 10529696
    Abstract: At least one array of LEDs (e.g., in a flip chip configuration) is supported by a substrate having a light extraction surface overlaid with at least one lumiphoric material. Light segregation elements registered with gaps between LEDs are configured to reduce interaction between emissions of different LEDs and/or lumiphoric material regions to reduce scattering and/or optical crosstalk, thereby preserving pixel-like resolution of the resulting emissions. Light segregation elements may be formed by mechanical sawing or etching to define grooves or recesses in a substrate, and filling the grooves or recesses with light-reflective or light-absorptive material. Light segregation elements external to a substrate may be defined by photolithographic patterning and etching of a sacrificial material, and/or by 3D printing.
    Type: Grant
    Filed: January 5, 2017
    Date of Patent: January 7, 2020
    Assignee: Cree, Inc.
    Inventors: John Edmond, Matthew Donofrio, Jesse Reiherzer, Peter Scott Andrews, Joseph G. Clark, Kevin Haberern
  • Patent number: 10439107
    Abstract: This disclosure relates to light emitting devices and methods of manufacture thereof, including side and/or multi-surface light emitting devices. Embodiments according to the present disclosure include the use of a functional layer, which can comprise a stand-off distance with one or more portions of the light emitter to improve the functional layer's stability during further device processing. The functional layer can further comprise winged portions allowing for the coating of the lower side portions of the light emitter to further interact with emitted light and a reflective layer coating on the functional layer to further improve light extraction and light emission uniformity. Methods of manufacture including methods utilizing virtual wafer structures are also disclosed.
    Type: Grant
    Filed: October 14, 2013
    Date of Patent: October 8, 2019
    Assignee: Cree, Inc.
    Inventors: Sten Heikman, James Ibbetson, Zhimin Jamie Yao, Fan Zhang, Matthew Donofrio, Christopher P. Hussell, John A. Edmond
  • Patent number: 10421158
    Abstract: A method for processing a crystalline substrate to form multiple patterns of subsurface laser damage facilitates subsequent fracture of the substrate to yield first and second substrate portions of reduced thickness. Multiple (e.g., two, three, or more) groups of parallel lines of multiple subsurface laser damage patterns may be sequentially interspersed with one another, with at least some lines of different groups not crossing one another. Certain implementations include formation of multiple subsurface laser damage patterns including groups of parallel lines that are non-parallel to one another, but with each line remaining within ±5 degrees of perpendicular to the <1120> direction of a hexagonal crystal structure of a material of the substrate.
    Type: Grant
    Filed: February 12, 2019
    Date of Patent: September 24, 2019
    Assignee: CREE, INC.
    Inventors: Matthew Donofrio, John Edmond, Harshad Golakia
  • Publication number: 20190273070
    Abstract: At least one array of LEDs (e.g., in a flip chip configuration) is supported by a substrate having a light extraction surface overlaid with at least one lumiphoric material. Light segregation elements registered with gaps between LEDs are configured to reduce interaction between emissions of different LEDs and/or lumiphoric material regions to reduce scattering and/or optical crosstalk, thereby preserving pixel-like resolution of the resulting emissions. Light segregation elements may be formed by mechanical sawing or etching to define grooves or recesses in a substrate, and filling the grooves or recesses with light-reflective or light-absorptive material. Light segregation elements external to a substrate may be defined by photolithographic patterning and etching of a sacrificial material, and/or by 3D printing.
    Type: Application
    Filed: May 16, 2019
    Publication date: September 5, 2019
    Inventors: John Edmond, Matthew Donofrio, Jesse Reiherzer, Peter Scott Andrews, Joseph G. Clark, Kevin Haberern
  • Patent number: 10312224
    Abstract: At least one array of LEDs (e.g., in a flip chip configuration) is supported by a substrate having a light extraction surface overlaid with at least one lumiphoric material. Light segregation elements registered with gaps between LEDs are configured to reduce interaction between emissions of different LEDs and/or lumiphoric material regions to reduce scattering and/or optical crosstalk, thereby preserving pixel-like resolution of the resulting emissions. Light segregation elements may be formed by mechanical sawing or etching to define grooves or recesses in a substrate, and filling the grooves or recesses with light-reflective or light-absorptive material. Light segregation elements external to a substrate may be defined by photolithographic patterning and etching of a sacrificial material, and/or by 3D printing.
    Type: Grant
    Filed: January 9, 2017
    Date of Patent: June 4, 2019
    Assignee: Cree, Inc.
    Inventors: John Edmond, Matthew Donofrio, Jesse Reiherzer, Peter Scott Andrews, Joseph G. Clark, Kevin Haberern
  • Patent number: 10283681
    Abstract: A phosphor-converted light emitting device includes a light emitting diode (LED) on a substrate, where the LED comprises a stack of epitaxial layers comprising a p-n junction. A wavelength conversion material is in optical communication with the LED. According to one embodiment of the phosphor-converted light emitting device, a selective filter is adjacent to the wavelength conversion material, and the selective filter comprises a plurality of nanoparticles for absorbing light from the LED not down-converted by the wavelength conversion material. According to another embodiment of the phosphor-converted light emitting device, a perpendicular distance between a perimeter of the LED on the substrate and an edge of the substrate is at least about 24 microns. According to another embodiment of the phosphor-converted light emitting device, the LED comprises a mirror layer on one or more sidewalls thereof for reducing light leakage through the sidewalls.
    Type: Grant
    Filed: May 14, 2014
    Date of Patent: May 7, 2019
    Assignee: Cree, Inc.
    Inventors: Brian T. Collins, Matthew Donofrio, Kevin W. Haberern, Bennett Langsdorf, Anoop Mathew, Harry A. Seibel, Iliya Todorov, Bradley E. Williams
  • Publication number: 20190074407
    Abstract: Monolithic LED chips are disclosed comprising a plurality of active regions on submount, wherein the submount comprises integral electrically conductive interconnect elements in electrical contact with the active regions and electrically connecting at least some of the active regions in series. The submount also comprises an integral insulator element electrically insulating at least some of the interconnect elements and active regions from other elements of the submount. The active regions are mounted in close proximity to one another with at least some of the active regions having a space between adjacent ones of the active regions that is 10 percent or less of the width of one or more of the active regions. The space is substantially not visible when the LED chip is emitting, such that the LED chips emits light similar to a filament.
    Type: Application
    Filed: October 29, 2018
    Publication date: March 7, 2019
    Inventors: Kevin W. Haberern, Matthew Donofrio, Bennett Langsdorf, Thomas Place, Michael John Bergmann
  • Patent number: 10135877
    Abstract: This disclosure relates to enforcing restrictions on data collected from a first set of systems and disseminated to a second set of systems. For example, enforcing a set of restrictions includes receiving a first trait and a second trait that include data describing a user that has interacted with an online service. The first trait is labelled with a first usage restriction and the second trait is labelled with a second usage restriction different from the first usage restriction. The first trait and the second trait are combined into a segment. The segment preserves labelling of the first trait with the first usage restriction and the second trait with the second usage restriction. Use of the segment is controlled based on the first usage restriction and the second usage restriction.
    Type: Grant
    Filed: February 13, 2018
    Date of Patent: November 20, 2018
    Assignee: Adobe Systems Incorporated
    Inventors: David Weinstein, Harleen Sahni, Matthew Donofrio, Edward Schuchardt, Vinay Goel, Rafaat Hossain
  • Patent number: 10115860
    Abstract: Monolithic LED chips are disclosed comprising a plurality of active regions on submount, wherein the submount comprises integral electrically conductive interconnect elements in electrical contact with the active regions and electrically connecting at least some of the active regions in series. The submount also comprises an integral insulator element electrically insulating at least some of the interconnect elements and active regions from other elements of the submount. The active regions are mounted in close proximity to one another with at least some of the active regions having a space between adjacent ones of the active regions that is 10 percent or less of the width of one or more of the active regions. The space is substantially not visible when the LED chip is emitting, such that the LED chips emits light similar to a filament.
    Type: Grant
    Filed: July 12, 2017
    Date of Patent: October 30, 2018
    Assignee: CREE, INC.
    Inventors: Kevin W. Haberern, Matthew Donofrio, Bennett Langsdorf, Thomas Place, Michael John Bergmann
  • Patent number: 10083885
    Abstract: An electronics module, such as driver modules for LED-based lighting fixtures and the like, includes a printed circuit board (PCB), a stress mitigation layer, and a potting layer. The PCB has a plurality of vias, which extend through the printed circuit board. A plurality of electronic components may each have a body and a plurality of leads extending from the body and through corresponding ones of the plurality of vias, wherein solder joints electrically and mechanically affix the plurality of leads within the corresponding ones of the plurality of vias. The stress mitigation layer is applied over a top surface of the printed circuit board. The potting layer is applied over the stress mitigation layer and the plurality of electronic components.
    Type: Grant
    Filed: June 6, 2017
    Date of Patent: September 25, 2018
    Assignee: Cree, Inc.
    Inventor: Matthew Donofrio
  • Publication number: 20180176263
    Abstract: This disclosure relates to enforcing restrictions on data collected from a first set of systems and disseminated to a second set of systems. For example, enforcing a set of restrictions includes receiving a first trait and a second trait that include data describing a user that has interacted with an online service. The first trait is labelled with a first usage restriction and the second trait is labelled with a second usage restriction different from the first usage restriction. The first trait and the second trait are combined into a segment. The segment preserves labelling of the first trait with the first usage restriction and the second trait with the second usage restriction. Use of the segment is controlled based on the first usage restriction and the second usage restriction.
    Type: Application
    Filed: February 13, 2018
    Publication date: June 21, 2018
    Inventors: David Weinstein, Harleen Sahni, Matthew Donofrio, Edward Schuchardt, Vinay Goel, Rafaat Hossain
  • Patent number: 9948683
    Abstract: This disclosure relates to enforcing restrictions on data collected from a first set of systems and disseminated to a second set of systems. For example, a method for enforcing a set of restrictions includes receiving a first trait and a second trait that include data describing a user that has interacted with an online service. The first trait is labelled with a first usage restriction and the second trait is labelled with a second usage restriction different from the first usage restriction. The method further includes combining the first trait and the second trait into a segment. The segment preserves labelling of the first trait with the first usage restriction and the second trait with the second usage restriction. The method further includes controlling use of the segment based on the first usage restriction and the second usage restriction.
    Type: Grant
    Filed: September 15, 2015
    Date of Patent: April 17, 2018
    Assignee: Adobe Systems Incorporated
    Inventors: David Weinstein, Harleen Sahni, Matthew Donofrio, Edward Schuchardt, Vinay Goel, Rafaat Hossain