Patents by Inventor Matthew Donofrio

Matthew Donofrio has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220271017
    Abstract: At least one array of LEDs (e.g., in a flip chip configuration) is supported by a substrate having a light extraction surface overlaid with at least one lumiphoric material. Light segregation elements registered with gaps between LEDs are configured to reduce interaction between emissions of different LEDs and/or lumiphoric material regions to reduce scattering and/or optical crosstalk, thereby preserving pixel-like resolution of the resulting emissions. Light segregation elements may be formed by mechanical sawing or etching to define grooves or recesses in a substrate, and filling the grooves or recesses with light-reflective or light-absorptive material. Light segregation elements external to a substrate may be defined by photolithographic patterning and etching of a sacrificial material, and/or by 3D printing.
    Type: Application
    Filed: May 10, 2022
    Publication date: August 25, 2022
    Inventors: John Edmond, Matthew Donofrio, Jesse Reiherzer, Peter Scott Andrews, Joseph G. Clark, Kevin Haberern
  • Patent number: 11387221
    Abstract: At least one array of LEDs (e.g., in a flip chip configuration) is supported by a substrate having a light extraction surface overlaid with at least one lumiphoric material. Light segregation elements registered with gaps between LEDs are configured to reduce interaction between emissions of different LEDs and/or lumiphoric material regions to reduce scattering and/or optical crosstalk, thereby preserving pixel-like resolution of the resulting emissions. Light segregation elements may be formed by mechanical sawing or etching to define grooves or recesses in a substrate, and filling the grooves or recesses with light-reflective or light-absorptive material. Light segregation elements external to a substrate may be defined by photolithographic patterning and etching of a sacrificial material, and/or by 3D printing.
    Type: Grant
    Filed: November 17, 2020
    Date of Patent: July 12, 2022
    Assignee: CREELED, INC.
    Inventors: John Edmond, Matthew Donofrio, Jesse Reiherzer, Peter Scott Andrews, Joseph G. Clark, Kevin Haberern
  • Patent number: 11342313
    Abstract: At least one array of LEDs (e.g., in a flip chip configuration) is supported by a substrate having a light extraction surface overlaid with at least one lumiphoric material. Light segregation elements registered with gaps between LEDs are configured to reduce interaction between emissions of different LEDs and/or lumiphoric material regions to reduce scattering and/or optical crosstalk, thereby preserving pixel-like resolution of the resulting emissions. Light segregation elements may be formed by mechanical sawing or etching to define grooves or recesses in a substrate, and filling the grooves or recesses with light-reflective or light-absorptive material. Light segregation elements external to a substrate may be defined by photolithographic patterning and etching of a sacrificial material, and/or by 3D printing.
    Type: Grant
    Filed: November 17, 2020
    Date of Patent: May 24, 2022
    Assignee: CREELED, INC.
    Inventors: John Edmond, Matthew Donofrio, Jesse Reiherzer, Peter Scott Andrews, Joseph G. Clark, Kevin Haberern
  • Publication number: 20220126395
    Abstract: A crystalline material processing method includes forming subsurface laser damage at a first average depth position to form cracks in the substrate interior propagating outward from at least one subsurface laser damage pattern, followed by imaging the substrate top surface, analyzing the image to identify a condition indicative of presence of uncracked regions within the substrate, and taking one or more actions responsive to the analyzing. One potential action includes changing an instruction set for producing subsequent laser damage formation (at second or subsequent average depth positions), without necessarily forming additional damage at the first depth position. Another potential action includes forming additional subsurface laser damage at the first depth position.
    Type: Application
    Filed: January 10, 2022
    Publication date: April 28, 2022
    Inventors: Matthew Donofrio, John Edmond, Harshad Golakia, Eric Mayer
  • Patent number: 11219966
    Abstract: A crystalline material processing method includes forming subsurface laser damage at a first average depth position to form cracks in the substrate interior propagating outward from at least one subsurface laser damage pattern, followed by imaging the substrate top surface, analyzing the image to identify a condition indicative of presence of uncracked regions within the substrate, and taking one or more actions responsive to the analyzing. One potential action includes changing an instruction set for producing subsequent laser damage formation (at second or subsequent average depth positions), without necessarily forming additional damage at the first depth position. Another potential action includes forming additional subsurface laser damage at the first depth position.
    Type: Grant
    Filed: February 16, 2020
    Date of Patent: January 11, 2022
    Assignee: WOLFSPEED, INC.
    Inventors: Matthew Donofrio, John Edmond, Harshad Golakia, Eric Mayer
  • Publication number: 20210225652
    Abstract: A method for removing a portion of a crystalline material (e.g., SiC) substrate includes joining a surface of the substrate to a rigid carrier (e.g., >800 ?m thick), with a subsurface laser damage region provided within the substrate at a depth relative to the surface. Adhesive material having a glass transition temperature above 25° C. may bond the substrate to the carrier. The crystalline material is fractured along the subsurface laser damage region to produce a bonded assembly including the carrier and a portion of the crystalline material. Fracturing of the crystalline material may be promoted by (i) application of a mechanical force proximate to at least one carrier edge to impart a bending moment in the carrier; (ii) cooling the carrier when the carrier has a greater coefficient of thermal expansion than the crystalline material; and/or (iii) applying ultrasonic energy to the crystalline material.
    Type: Application
    Filed: April 8, 2021
    Publication date: July 22, 2021
    Inventors: Matthew Donofrio, John Edmond, Hua-Shuang Kong, Elif Balkas
  • Patent number: 11034056
    Abstract: Silicon carbide (SiC) wafers and related methods are disclosed that include intentional or imposed wafer shapes that are configured to reduce manufacturing problems associated with deformation, bowing, or sagging of such wafers due to gravitational forces or from preexisting crystal stress. Intentional or imposed wafer shapes may comprise SiC wafers with a relaxed positive bow from silicon faces thereof. In this manner, effects associated with deformation, bowing, or sagging for SiC wafers, and in particular for large area SiC wafers, may be reduced. Related methods for providing SiC wafers with relaxed positive bow are disclosed that provide reduced kerf losses of bulk crystalline material. Such methods may include laser-assisted separation of SiC wafers from bulk crystalline material.
    Type: Grant
    Filed: February 7, 2020
    Date of Patent: June 15, 2021
    Assignee: Cree, Inc.
    Inventors: Simon Bubel, Matthew Donofrio, John Edmond, Ian Currier
  • Publication number: 20210170632
    Abstract: Silicon carbide (SiC) wafers and related methods are disclosed that include intentional or imposed wafer shapes that are configured to reduce manufacturing problems associated with deformation, bowing, or sagging of such wafers due to gravitational forces or from preexisting crystal stress. Intentional or imposed wafer shapes may comprise SiC wafers with a relaxed positive bow from silicon faces thereof. In this manner, effects associated with deformation, bowing, or sagging for SiC wafers, and in particular for large area SiC wafers, may be reduced. Related methods for providing SiC wafers with relaxed positive bow are disclosed that provide reduced kerf losses of bulk crystalline material. Such methods may include laser-assisted separation of SiC wafers from bulk crystalline material.
    Type: Application
    Filed: February 18, 2021
    Publication date: June 10, 2021
    Inventors: Simon Bubel, Matthew Donofrio, John Edmond, Ian Currier
  • Patent number: 11024501
    Abstract: A method for removing a portion of a crystalline material (e.g., SiC) substrate includes joining a surface of the substrate to a rigid carrier (e.g., >800 ?m thick), with a subsurface laser damage region provided within the substrate at a depth relative to the surface. Adhesive material having a glass transition temperature above 25° C. may bond the substrate to the carrier. The crystalline material is fractured along the subsurface laser damage region to produce a bonded assembly including the carrier and a portion of the crystalline material. Fracturing of the crystalline material may be promoted by (i) application of a mechanical force proximate to at least one carrier edge to impart a bending moment in the carrier; (ii) cooling the carrier when the carrier has a greater coefficient of thermal expansion than the crystalline material; and/or (iii) applying ultrasonic energy to the crystalline material.
    Type: Grant
    Filed: February 12, 2019
    Date of Patent: June 1, 2021
    Assignee: CREE, INC.
    Inventors: Matthew Donofrio, John Edmond, Hua-Shuang Kong, Elif Balkas
  • Patent number: 10991861
    Abstract: Flip chip LEDs incorporate multi-layer reflectors and light transmissive substrates patterned along an internal surface adjacent to semiconductor layers. A multi-layer reflector may include a metal layer and a dielectric layer containing conductive vias. Portions of a multi-layer reflector may wrap around a LED mesa including an active region, while being covered with passivation material. A substrate patterned along an internal surface together with a multi-layer reflector enables reduction of optical losses. A light transmissive fillet material proximate to edge emitting surfaces of an emitter chip may enable adequate coverage with lumiphoric material. An emitter chip may be elevated with increased thickness of solder material and/or contacts, and may reduce luminous flux loss when reflective materials are present on a submount.
    Type: Grant
    Filed: September 29, 2016
    Date of Patent: April 27, 2021
    Assignee: Cree, Inc.
    Inventors: Michael John Bergmann, Matthew Donofrio, Peter Scott Andrews, Colin Blakely, Troy Gould, Jack Vu
  • Publication number: 20210074687
    Abstract: At least one array of LEDs (e.g., in a flip chip configuration) is supported by a substrate having a light extraction surface overlaid with at least one lumiphoric material. Light segregation elements registered with gaps between LEDs are configured to reduce interaction between emissions of different LEDs and/or lumiphoric material regions to reduce scattering and/or optical crosstalk, thereby preserving pixel-like resolution of the resulting emissions. Light segregation elements may be formed by mechanical sawing or etching to define grooves or recesses in a substrate, and filling the grooves or recesses with light-reflective or light-absorptive material. Light segregation elements external to a substrate may be defined by photolithographic patterning and etching of a sacrificial material, and/or by 3D printing.
    Type: Application
    Filed: November 17, 2020
    Publication date: March 11, 2021
    Inventors: John Edmond, Matthew Donofrio, Jesse Reiherzer, Peter Scott Andrews, Joseph G. Clark, Kevin Haberern
  • Patent number: 10910352
    Abstract: At least one array of LEDs (e.g., in a flip chip configuration) is supported by a substrate having a light extraction surface overlaid with at least one lumiphoric material. Light segregation elements registered with gaps between LEDs are configured to reduce interaction between emissions of different LEDs and/or lumiphoric material regions to reduce scattering and/or optical crosstalk, thereby preserving pixel-like resolution of the resulting emissions. Light segregation elements may be formed by mechanical sawing or etching to define grooves or recesses in a substrate, and filling the grooves or recesses with light-reflective or light-absorptive material. Light segregation elements external to a substrate may be defined by photolithographic patterning and etching of a sacrificial material, and/or by 3D printing.
    Type: Grant
    Filed: May 16, 2019
    Date of Patent: February 2, 2021
    Assignee: Cree, Inc.
    Inventors: John Edmond, Matthew Donofrio, Jesse Reiherzer, Peter Scott Andrews, Joseph G. Clark, Kevin Haberern
  • Publication number: 20210020805
    Abstract: Monolithic LED chips are disclosed comprising a plurality of active regions on a submount, wherein the submount comprises integral electrically conductive interconnect elements in electrical contact with the active regions and electrically connecting at least some of the active regions in series. The submount also comprises an integral insulator element electrically insulating at least some of the interconnect elements and active regions from other elements of the submount. The active regions are mounted in close proximity to one another with at least some of the active regions having a space between adjacent ones of the active regions that is 10 percent or less of the width of one or more of the active regions. The space is substantially not visible when the LED chip is emitting, such that the LED chips emits light similar to a filament.
    Type: Application
    Filed: October 2, 2020
    Publication date: January 21, 2021
    Inventors: Kevin W. Haberern, Matthew Donofrio, Bennett Langsdorf, Thomas Place, Michael John Bergmann
  • Publication number: 20200361121
    Abstract: Silicon carbide (SiC) wafers and related methods are disclosed that include intentional or imposed wafer shapes that are configured to reduce manufacturing problems associated with deformation, bowing, or sagging of such wafers due to gravitational forces or from preexisting crystal stress. Intentional or imposed wafer shapes may comprise SiC wafers with a relaxed positive bow from silicon faces thereof. In this manner, effects associated with deformation, bowing, or sagging for SiC wafers, and in particular for large area SiC wafers, may be reduced. Related methods for providing SiC wafers with relaxed positive bow are disclosed that provide reduced kerf losses of bulk crystalline material. Such methods may include laser-assisted separation of SiC wafers from bulk crystalline material.
    Type: Application
    Filed: February 7, 2020
    Publication date: November 19, 2020
    Inventors: Simon Bubel, Matthew Donofrio, John Edmond, Ian Currier
  • Publication number: 20200316724
    Abstract: A method for processing a crystalline substrate to form multiple patterns of subsurface laser damage facilitates subsequent fracture of the substrate to yield first and second substrate portions of reduced thickness. Multiple (e.g., two, three, or more) groups of parallel lines of multiple subsurface laser damage patterns may be sequentially interspersed with one another, with at least some lines of different groups not crossing one another. Certain implementations include formation of multiple subsurface laser damage patterns including groups of parallel lines that are non-parallel to one another, but with each line remaining within ±5 degrees of perpendicular to the <1120> direction of a hexagonal crystal structure of a material of the substrate.
    Type: Application
    Filed: June 23, 2020
    Publication date: October 8, 2020
    Inventors: Matthew Donofrio, John Edmond, Harshad Golakia
  • Patent number: 10797201
    Abstract: Monolithic LED chips are disclosed comprising a plurality of active regions on submount, wherein the submount comprises integral electrically conductive interconnect elements in electrical contact with the active regions and electrically connecting at least some of the active regions in series. The submount also comprises an integral insulator element electrically insulating at least some of the interconnect elements and active regions from other elements of the submount. The active regions are mounted in close proximity to one another with at least some of the active regions having a space between adjacent ones of the active regions that is 10 percent or less of the width of one or more of the active regions. The space is substantially not visible when the LED chip is emitting, such that the LED chips emits light similar to a filament.
    Type: Grant
    Filed: October 29, 2018
    Date of Patent: October 6, 2020
    Assignee: CREE, INC.
    Inventors: Kevin W. Haberern, Matthew Donofrio, Bennett Langsdorf, Thomas Place, Michael John Bergmann
  • Publication number: 20200211850
    Abstract: A method for removing a portion of a crystalline material (e.g., SiC) substrate includes joining a surface of the substrate to a rigid carrier (e.g., >800 ?m thick), with a subsurface laser damage region provided within the substrate at a depth relative to the surface. Adhesive material having a glass transition temperature above 25° C. may bond the substrate to the carrier. The crystalline material is fractured along the subsurface laser damage region to produce a bonded assembly including the carrier and a portion of the crystalline material. Fracturing of the crystalline material may be promoted by (i) application of a mechanical force proximate to at least one carrier edge to impart a bending moment in the carrier; (ii) cooling the carrier when the carrier has a greater coefficient of thermal expansion than the crystalline material; and/or (iii) applying ultrasonic energy to the crystalline material.
    Type: Application
    Filed: February 12, 2019
    Publication date: July 2, 2020
    Inventors: Matthew Donofrio, John Edmond, Hua-Shuang Kong, Elif Balkas
  • Patent number: 10658546
    Abstract: Simplified LED chip architectures or chip builds are disclosed that can result in simpler manufacturing processes using fewer steps. The LED structure can have fewer layers than conventional LED chips with the layers arranged in different ways for efficient fabrication and operation. The LED chips can comprise an active LED structure. A dielectric reflective layer is included adjacent to one of the oppositely doped layers. A metal reflective layer is on the dielectric reflective layer, wherein the dielectric and metal reflective layers extend beyond the edge of said active region. By extending the dielectric layer, the LED chips can emit with more efficiency by reflecting more LED light to emit in the desired direction. By extending the metal reflective layer beyond the edge of the active region, the metal reflective layer can serve as a current spreading layer and barrier, in addition to reflecting LED light to emit in the desired direction.
    Type: Grant
    Filed: January 21, 2015
    Date of Patent: May 19, 2020
    Assignee: Cree, Inc.
    Inventors: Matthew Donofrio, Pritish Kar, Sten Heikman, Harshad Golakia, Rajeev Acharya, Yuvaraj Dora
  • Patent number: 10611052
    Abstract: Silicon carbide (SiC) wafers and related methods are disclosed that include intentional or imposed wafer shapes that are configured to reduce manufacturing problems associated with deformation, bowing, or sagging of such wafers due to gravitational forces or from preexisting crystal stress. Intentional or imposed wafer shapes may comprise SiC wafers with a relaxed positive bow from silicon faces thereof. In this manner, effects associated with deformation, bowing, or sagging for SiC wafers, and in particular for large area SiC wafers, may be reduced. Related methods for providing SiC wafers with relaxed positive bow are disclosed that provide reduced kerf losses of bulk crystalline material. Such methods may include laser-assisted separation of SiC wafers from bulk crystalline material.
    Type: Grant
    Filed: May 17, 2019
    Date of Patent: April 7, 2020
    Assignee: Cree, Inc.
    Inventors: Simon Bubel, Matthew Donofrio, John Edmond, Ian Currier
  • Patent number: 10576585
    Abstract: A method for processing a crystalline substrate to form multiple patterns of subsurface laser damage facilitates subsequent fracture of the substrate to yield first and second substrate portions of reduced thickness. Multiple (e.g., two, three, or more) groups of parallel lines of multiple subsurface laser damage patterns may be sequentially interspersed with one another, with at least some lines of different groups not crossing one another. Certain implementations include formation of multiple subsurface laser damage patterns including groups of parallel lines that are non-parallel to one another, but with each line remaining within ±5 degrees of perpendicular to the <1120> direction of a hexagonal crystal structure of a material of the substrate.
    Type: Grant
    Filed: February 12, 2019
    Date of Patent: March 3, 2020
    Assignee: CREE, INC.
    Inventors: Matthew Donofrio, John Edmond, Harshad Golakia