Patents by Inventor Matthew W. Copel

Matthew W. Copel has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20030046041
    Abstract: A method, computer readable medium and a structure for real-time simulation, which allows the user to manipulate model parameters and see the simulated result in real-time as the model is changed. The simulated result is visually compared with the data, allowing the user to refine the model. In one embodiment, the invention is used for evaluating medium energy ion scattering (MEIS) data, as well as conventional Rutherford backscattering data. It is important to realize that the invention is not limited to ion beam analysis, or to scientific data analysis. The invention can be used for evaluating any type of complex system where a well-defined simulation procedure exists. The model evaluation must proceed quickly enough to provide a real-time, visual display for the user.
    Type: Application
    Filed: June 15, 2001
    Publication date: March 6, 2003
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventor: Matthew W. Copel
  • Patent number: 6528374
    Abstract: A method of forming a dielectric stack device having a plurality of layers comprises the steps of providing a silicon substrate, forming a metal-oxide layer on a silicon oxide layer which is formed on the silicon substrate, and performing an annealing with respect to the metal-oxide layer and the silicon oxide layer until a silicate layer is formed to replace the metal-oxide layer and the silicon oxide layer is removed, wherein the annealing is performed at a temperature between about 800° C. and about 1000° C. for a time period between about 1 second and about 10 minutes. After forming the silicon oxide layer on the silicon substrate, the metal-oxide layer may be deposited on the silicon oxide layer. Alternatively, the metal-oxide layer may be deposited on the silicon substrate, and the silicon oxide layer grows between the metal-oxide layer and the silicon substrate. The metal-based oxide is preferably an Yttrium-based oxide.
    Type: Grant
    Filed: February 5, 2001
    Date of Patent: March 4, 2003
    Assignee: International Business Machines Corporation
    Inventors: Nestor A. Bojarczuk, Jr., Eduard A. Cartier, Matthew W. Copel, Supratik Guha
  • Publication number: 20020145168
    Abstract: A method of forming a dielectric stack device having a plurality of layers comprises the steps of providing a silicon substrate, forming a metal-oxide layer on a silicon oxide layer which is formed on the silicon substrate, and performing an annealing with respect to the metal-oxide layer and the silicon oxide layer until a silicate layer is formed to replace the metal-oxide layer and the silicon oxide layer is removed, wherein the annealing is performed at a temperature between about 800° C. and about 1000° C. for a time period between about 1 second and about 10 minutes. After forming the silicon oxide layer on the silicon substrate, the metal-oxide layer may be deposited on the silicon oxide layer. Alternatively, the metal-oxide layer may be deposited on the silicon substrate, and the silicon oxide layer grows between the metal-oxide layer and the silicon substrate. The metal-based oxide is preferably an Yttrium-based oxide.
    Type: Application
    Filed: February 5, 2001
    Publication date: October 10, 2002
    Applicant: International Business Machines Corporation
    Inventors: Nestor A. Bojarczuk, Eduard A. Cartier, Matthew W. Copel, Supratik Guha
  • Patent number: 6444592
    Abstract: A method for integrating a high-k material into CMOS processing schemes is provided. The method includes forming an interfacial oxide, oxynitride and/or nitride layer on a device region of a semiconductor substrate, said interfacial layer having a thickness of less than 10 Å; and (b) forming a high-k dielectric material on said interfacial oxide, oxynitride and/or, nitride layer, said high-k dielectric having a dielectric constant, k, of greater than 8.
    Type: Grant
    Filed: June 20, 2000
    Date of Patent: September 3, 2002
    Assignee: International Business Machines Corporation
    Inventors: Arne W. Ballantine, Douglas A. Buchanan, Eduard A. Cartier, Kevin K. Chan, Matthew W. Copel, Christopher P. D'Emic, Evgeni P. Gousev, Fenton Read McFeely, Joseph S. Newbury, Harald F. Okorn-Schmidt, Patrick R. Varekamp, Theodore H. Zabel
  • Patent number: 5628834
    Abstract: The present invention broadly concerns layered structures of substantially-crystalline materials and processes for making such structures. More particularly, the invention concerns epitaxial growth of a substantially-crystalline layer of a first material on a substantially-crystalline second material different from the first material utilizing an approximately one monolayer thick monovalent surfactant element.
    Type: Grant
    Filed: May 9, 1995
    Date of Patent: May 13, 1997
    Assignee: International Business Machines Corporation
    Inventors: Matthew W. Copel, Rudolf M. Tromp
  • Patent number: 5624869
    Abstract: A method and a device directed to the same, for stabilizing cobalt di-silicide/single crystal silicon, amorphous silicon, polycrystalline silicon, germanide/crystalline germanium, polycrystalline germanium structures or other semiconductor material structures so that high temperature processing steps (above 750.degree. C.) do not degrade the structural quality of the cobalt di-silicide/silicon structure. The steps of the method include forming a di-silicide or germanide by either reacting cobalt with the substrate material and/or the codeposition of the di-silicide or germanide on a substrate, adding a selective element, either platinum or nitrogen, into the cobalt and forming the di-silicide or germanide by a standard annealing treatment. Alternatively, the cobalt di-silicide or cobalt germanide can be formed after the formation of the di-silicide or germanide respectively. As a result, the upper limit of the annealing temperature at which the di-silicide or germanide will structurally degrade is increased.
    Type: Grant
    Filed: April 13, 1994
    Date of Patent: April 29, 1997
    Assignee: International Business Machines Corporation
    Inventors: Paul D. Agnello, Cyril Cabral, Jr., Lawrence A. Clevenger, Matthew W. Copel, Francois M. d'Heurle, Qi-Zhong Hong
  • Patent number: 5608266
    Abstract: A method and a device directed to the same, for stabilizing cobalt silicide/single crystal silicon, amorphous silicon, polycrystalline silicon, germanide/crystalline germanium, polycrystalline germanium structures or other semiconductor material structures so that high temperature processing steps (above 750.degree. C.) do not degrade the structural quality of the cobalt silicide/silicon structure. The steps of the method include forming a silicide or germanide by either reacting cobalt with the substrate material and/or the codeposition of the silicide or germanide on a substrate, adding a selective element, either platinum or nitrogen, into the cobalt and forming the silicide germanide by a standard annealing treatment. Alternatively, the cobalt silicide or cobalt germanide can be formed after the formation of the silicide or germanide respectively. As a result, the upper limit of the annealing temperature at which the silicide or germanide will structurally degrade is increased.
    Type: Grant
    Filed: June 2, 1995
    Date of Patent: March 4, 1997
    Assignee: International Business Machines Corporation
    Inventors: Paul D. Agnello, Cyril Cabral, Jr., Lawrence A. Clevenger, Matthew W. Copel, Francois M. d'Heurle, Qi-Zong Hong
  • Patent number: 5316615
    Abstract: The present invention broadly concerns layered structures of substantially-crystalline materials and processes for making such structures. More particularly, the invention concerns epitaxial growth of a substantially-crystalline layer of a first material on a substantially-crystalline second material different from the first material.
    Type: Grant
    Filed: March 9, 1993
    Date of Patent: May 31, 1994
    Assignee: International Business Machines Corporation
    Inventors: Matthew W. Copel, Rudolf M. Tromp