Patents by Inventor Matthew Warren Copel
Matthew Warren Copel has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Artificial neural networks (ANN) including a resistive element based on doped semiconductor elements
Patent number: 11227996Abstract: A resistive element in an artificial neural network, the resistive element includes a Silicon-on-insulator (SOI) substrate, and a Silicon layer formed on the Silicon-on-insulator substrate. The Silicon layer includes dopants derived from a thin film dopant layer, and the thin film dopant layer includes a programmed amount of dopant including at least one of Boron and Phosphorus.Type: GrantFiled: February 28, 2019Date of Patent: January 18, 2022Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Ali Afzali-Ardakani, Matthew Warren Copel, James Bowler Hannon, Satoshi Oida -
Patent number: 11024803Abstract: A method of forming a resistive random access memory (RRAM) element, the method includes forming a Silicon layer on an oxide layer, depositing a thin film dopant layer on the Silicon layer, and controlling a concentration of the dopant in the thin film dopant layer.Type: GrantFiled: February 28, 2019Date of Patent: June 1, 2021Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Ali Afzali-Ardakani, Matthew Warren Copel, James Bowler Hannon, Satoshi Oida
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Patent number: 10748059Abstract: A resistive element in an electrochemical artificial neural network, includes a transition metal oxide thin film forming a working electrode, a pair of first electrodes connected to the working electrode, and a reference electrode for electrochemical doping of the working electrode. The biasing of the pair of first electrodes with respect to the reference electrode according to a determination of conductivity between the pair of first electrodes controls the resistance of the working electrode.Type: GrantFiled: April 5, 2017Date of Patent: August 18, 2020Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Matthew Warren Copel, James Bowler Hannon, Satoshi Oida, John Jacob Yurkas
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Publication number: 20190198761Abstract: A resistive element in an artificial neural network, the resistive element includes a Silicon-on-insulator (SOI) substrate, and a Silicon layer formed on the Silicon-on-insulator substrate. The Silicon layer includes dopants derived from a thin film dopant layer, and the thin film dopant layer includes a programmed amount of dopant including at least one of Boron and Phosphorus.Type: ApplicationFiled: February 28, 2019Publication date: June 27, 2019Applicant: International Business Machines CorporationInventors: Ali Afzali-Ardakani, Matthew Warren Copel, James Bowler Hannon, Satoshi Oida
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Publication number: 20190198762Abstract: A method of forming a resistive random access memory (RRAM) element, the method includes forming a Silicon layer on an oxide layer, depositing a thin film dopant layer on the Silicon layer, and controlling a concentration of the dopant in the thin film dopant layer.Type: ApplicationFiled: February 28, 2019Publication date: June 27, 2019Applicant: International Business Machines CorporationInventors: Ali AFZALI-ARDAKANI, Matthew Warren COPEL, James Bowler HANNON, Satoshi OIDA
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Patent number: 10256405Abstract: A method of forming semiconductor elements in an artificial neural network, the method including forming a substrate including an oxide layer, forming a Silicon layer on the oxide layer, depositing a thin film dopant layer on the Silicon layer, and controlling a concentration of the dopant in the thin film dopant layer.Type: GrantFiled: April 5, 2017Date of Patent: April 9, 2019Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Ali Afzali-Ardakani, Matthew Warren Copel, James Bowler Hannon, Satoshi Oida
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Publication number: 20180294410Abstract: A method of forming semiconductor elements in an artificial neural network, the method including forming a substrate including an oxide layer, forming a Silicon layer on the oxide layer, depositing a thin film dopant layer on the Silicon layer, and controlling a concentration of the dopant in the thin film dopant layer.Type: ApplicationFiled: April 5, 2017Publication date: October 11, 2018Inventors: Ali AFZALI-ARDAKANI, Matthew Warren COPEL, James Bowler HANNON, Satoshi OIDA
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Publication number: 20180293487Abstract: A resistive element in an electrochemical artificial neural network, includes a transition metal oxide thin film forming a working electrode, a pair of first electrodes connected to the working electrode, and a reference electrode for electrochemical doping of the working electrode. The biasing of the pair of first electrodes with respect to the reference electrode according to a determination of conductivity between the pair of first electrodes controls the resistance of the working electrode.Type: ApplicationFiled: April 5, 2017Publication date: October 11, 2018Inventors: Matthew Warren COPEL, James Bowler Hannon, Satoshi Oida, John Jacob Yurkas
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Patent number: 7348226Abstract: A method (and resultant structure) of forming a semiconductor structure, includes processing an oxide to have a crystalline arrangement, and depositing an amorphous semiconductor layer on the oxide by one of evaporation and chemical vapor deposition (CVD).Type: GrantFiled: July 6, 2005Date of Patent: March 25, 2008Assignee: International Business Machines CorporationInventors: Nestor Alexander Bojarczuk, Jr., Matthew Warren Copel, Supratik Guha, Vijay Narayanan
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Patent number: 6933566Abstract: A method (and resultant structure) of forming a semiconductor structure, includes processing an oxide to have a crystalline arrangement, and depositing an amorphous semiconductor layer on the oxide by one of evaporation and chemical vapor deposition (CVD).Type: GrantFiled: January 31, 2002Date of Patent: August 23, 2005Assignee: International Business Machines CorporationInventors: Nestor Alexander Bojarczuk, Jr., Matthew Warren Copel, Supratik Guha, Vijay Narayanan
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Patent number: 6756646Abstract: A method for forming an oxynitride gate dielectric in a semiconductor device and gate dielectric structure formed by the method are disclosed. In the method, an oxynitride layer is first formed on a silicon surface and then re-oxidized with a gas mixture containing oxygen and at least one halogenated species such that an oxynitride layer with a controlled nitrogen profile and a layer of substantially silicon dioxide formed underneath the oxynitride film is obtained. The oxynitride film layer can be formed by either contacting a surface of silicon with at least one gas that contains. nitrogen and/or oxygen at a temperature of not less than 500° C. or by a chemical vapor deposition technique. The re-oxidation process may be carried out by a thermal process in an oxidizing halogenated atmosphere containing oxygen and a halogenated species such as HCl, CH2Cl2, C2H3Cl3, C2H2Cl2. CH3Cl and CHCl3.Type: GrantFiled: May 22, 2001Date of Patent: June 29, 2004Assignee: International Business Machines CorporationInventors: Douglas Andrew Buchanan, Matthew Warren Copel, Patrick Ronald Varekamp
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Patent number: 6753556Abstract: A method of forming a silicate dielectric having superior electrical properties comprising forming a metal oxide layer on a Si-containing semiconductor material and reacting the metal oxide with the underlying Si-containing material in the presence of an oxidizing gas is provided. Semiconductor structures comprising the metal silicate formed over a SiO2 layer are also disclosed herein.Type: GrantFiled: October 6, 1999Date of Patent: June 22, 2004Assignee: International Business Machines CorporationInventors: Eduard Albert Cartier, Matthew Warren Copel, Frances Mary Ross
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Publication number: 20030203653Abstract: The present invention discloses a method for forming a layer of nitrogen and silicon containing material on a substrate by first providing a heated substrate and then flowing a gas which has silicon and nitrogen atoms but no carbon atoms in the same molecule over said heated substrate at a pressure of not higher than 500 Torr, such that a layer of nitrogen and silicon containing material is formed on the surface. The present invention is further directed to a composite structure that includes a substrate and a layer of material containing nitrogen and silicon but not carbon overlying the substrate for stopping chemical species from reaching the substrate. The present invention is further directed to a structure that includes a semiconducting substrate, a gate insulator on the substrate, a nitrogen-rich layer on top of the gate insulator, and a gate electrode on the nitrogen-rich layer, wherein the nitrogen-rich layer blocks diffusion of contaminating species from the gate electrode to the gate insulator.Type: ApplicationFiled: May 2, 2003Publication date: October 30, 2003Applicant: International Business Machines CorporationInventors: Douglas Andrew Buchanan, Matthew Warren Copel, Fenton Read McFeely, Patrick Ronald Varekamp, Mark Monroe Banaszak Holl, Kyle Erik Litz
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Publication number: 20030190821Abstract: The present invention discloses a method for forming a layer of nitrogen and silicon containing material on a substrate by first providing a heated substrate and then flowing a gas which has silicon and nitrogen atoms but no carbon atoms in the same molecule over said heated substrate at a pressure of not higher than 500 Torr, such that a layer of nitrogen and silicon containing material is formed on the surface. The present invention is further directed to a composite structure that includes a substrate and a layer of material containing nitrogen and silicon but not carbon overlying the substrate for stopping chemical species from reaching the substrate. The present invention is further directed to a structure that includes a semiconducting substrate, a gate insulator on the substrate, a nitrogen-rich layer on top of the gate insulator, and a gate electrode on the nitrogen-rich layer, wherein the nitrogen-rich layer blocks diffusion of contaminating species from the gate electrode to the gate insulator.Type: ApplicationFiled: May 2, 2003Publication date: October 9, 2003Applicant: International Business Machines CorporationInventors: Douglas Andrew Buchanan, Matthew Warren Copel, Fenton Read McFeely, Patrick Ronald Varekamp, Mark Monroe Banaszak Holl, Kyle Erik Litz
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Publication number: 20030190780Abstract: A method for forming an oxynitride gate dielectric in a semiconductor device and gate dielectric structure formed by the method are disclosed. In the method, an oxynitride layer is first formed on a silicon surface and then re-oxidized with a gas mixture containing oxygen and at least one halogenated species such that an oxynitride layer with a controlled nitrogen profile and a layer of substantially silicon dioxide formed underneath the oxynitride film is obtained. The oxynitride film layer can be formed by either contacting a surface of silicon with at least one gas that contains nitrogen and/or oxygen at a temperature of not less than 500° C. or by a chemical vapor deposition technique. The re-oxidation process may be carried out by a thermal process in an oxidizing halogenated atmosphere containing oxygen and a halogenated species such as HCl, CH2Cl2, C2H3Cl3, C2H2Cl2. CH3Cl and CHCl3.Type: ApplicationFiled: May 22, 2001Publication date: October 9, 2003Applicant: International Business Machines CorporationInventors: Douglas Andrew Buchanan, Matthew Warren Copel, Patrick Ronald Varekamp
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Patent number: 6566281Abstract: The present invention discloses a method for forming a layer of nitrogen and silicon containing material on a substrate by first providing a heated substrate and then flowing a gas which has silicon and nitrogen atoms but no carbon atoms in the same molecule over said heated substrate at a pressure of not higher than 500 Torr, such that a layer of nitrogen and silicon containing material is formed on the surface. The present invention is further directed to a composite structure that includes a substrate and a layer of material containing nitrogen and silicon but not carbon overlying the substrate for stopping chemical species from reaching the substrate. The present invention is further directed to a structure that includes a semiconducting substrate, a gate insulator on the substrate, a nitrogen-rich layer on top of the gate insulator, and a gate electrode on the nitrogen-rich layer, wherein the nitrogen-rich layer blocks diffusion of contaminating species from the gate electrode to the gate insulator.Type: GrantFiled: December 1, 1997Date of Patent: May 20, 2003Assignee: International Business Machines CorporationInventors: Douglas Andrew Buchanan, Matthew Warren Copel, Fenton Read McFeely, Patrick Ronald Varekamp, Mark Monroe Banaszak Holl, Kyle Erik Litz
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Publication number: 20030008521Abstract: A method (and resultant structure) of forming a semiconductor structure, includes processing an oxide to have a crystalline arrangement, and depositing an amorphous semiconductor layer on the oxide by one of evaporation and chemical vapor deposition (CVD).Type: ApplicationFiled: January 31, 2002Publication date: January 9, 2003Applicant: International Business Machines CorporationInventors: Nestor Alexander Bojarczuk, Matthew Warren Copel, Supratik Guha, Vijay Narayanan
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Publication number: 20020005556Abstract: A method of forming a silicate dielectric having superior electrical properties comprising forming a metal oxide layer on a Si-containing semiconductor material and reacting the metal oxide with the underlying Si-containing material in the presence of an oxidizing gas is provided. Semiconductor structures comprising the metal silicate formed over a SiO2 layer are also disclosed herein.Type: ApplicationFiled: October 6, 1999Publication date: January 17, 2002Inventors: EDUARD ALBERT CARTIER, MATTHEW WARREN COPEL, FRANCES MARY ROSS
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Patent number: 6245616Abstract: A method for forming an oxynitride gate dielectric in a semiconductor device and gate dielectric structure formed by the method are disclosed. In the method, an oxynitride layer is first formed on a silicon surface and then re-oxidized with a gas mixture containing oxygen and at least one halogenated species such that an oxynitride layer with a controlled nitrogen profile and a layer of substantially silicon dioxide formed underneath the oxynitride film is obtained. The oxynitride film layer can be formed by either contacting a surface of silicon with at least one gas that contains nitrogen and/or oxygen at a temperature of not less than 500° C. or by a chemical vapor deposition technique. The re-oxidation process may be carried out by a thermal process in an oxidizing halogenated atmosphere containing oxygen and a halogenated species such as HCl, CH2Cl2, C2H3Cl3, C2H2Cl2, CH3Cl and CHCl3.Type: GrantFiled: January 6, 1999Date of Patent: June 12, 2001Assignee: International Business Machines CorporationInventors: Douglas Andrew Buchanan, Matthew Warren Copel, Patrick Ronald Varekamp
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Patent number: 5997638Abstract: The present invention is a layered structures of substantially-crystalline semiconductor materials and processes for making such structures. More particularly, the invention epitaxial grows a substantially-crystalline layer of a second elemental semiconductor material on a substantially-crystalline first semiconductor material different from the second material in which there is a significant mismatch in at least one dimension between the crystal-lattice structures of the two materials.Type: GrantFiled: May 9, 1995Date of Patent: December 7, 1999Assignee: International Business Machines CorporationInventors: Matthew Warren Copel, Michael Horn von Hoegen, Francoise Isabelle Kolmer Le Goues, Rudolf Maria Tromp