Patents by Inventor Maurice Heathcote Norcott
Maurice Heathcote Norcott has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20080116915Abstract: The present invention is directed to a high density test probe which provides a means for testing a high density and high performance integrated circuits in wafer form or as discrete chips. The test probe is formed from a dense array of elongated electrical conductors which are embedded in an compliant or high modulus elastomeric material. A standard packaging substrate, such as a ceramic integrated circuit chip packaging substrate is used to provide a space transformer. Wires are bonded to an array of contact pads on the surface of the space transformer. The space transformer formed from a multilayer integrated circuit chip packaging substrate. The wires are as dense as the contact location array. A mold is disposed surrounding the array of outwardly projecting wires. A liquid elastomer is disposed in the mold to fill the spaces between the wires.Type: ApplicationFiled: October 30, 2007Publication date: May 22, 2008Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Brian Samuel Beaman, Keith Edward Fogel, Paul Alfred Lauro, Maurice Heathcote Norcott, Da-Yuan Shih, George Frederick Walker
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Publication number: 20080117612Abstract: The present invention is directed to a high density test probe which provides a means for testing a high density and high performance integrated circuits in wafer form or as discrete chips. The test probe is formed from a dense array of elongated electrical conductors which are embedded in an compliant or high modulus elastomeric material. A standard packaging substrate, such as a ceramic integrated circuit chip packaging substrate is used to provide a space transformer Wires are bonded to an array of contact pads on the surface of the space transformer. The space transformer formed from a multilayer integrated circuit chip packaging substrate. The wires are as dense as the contact location array. A mold is disposed surrounding the array of outwardly projecting wires. A liquid elastomer is disposed in the mold to fill the spaces between the wires.Type: ApplicationFiled: October 30, 2007Publication date: May 22, 2008Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Brian Samuel Beaman, Keith Edward Fogel, Paul Alfred Lauro, Maurice Heathcote Norcott, Da-Yuan Shih, George Frederick Walker
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Publication number: 20080117611Abstract: The present invention is directed to a high density test probe which provides a means for testing a high density and high performance integrated circuits in wafer form or as discrete chips. The test probe is formed from a dense array of elongated electrical conductors which are embedded in an compliant or high modulus elastomeric material. A standard packaging substrate, such as a ceramic integrated circuit chip packaging substrate is used to provide a space transformer. Wires are bonded to an array of contact pads on the surface of the space transformer. The space transformer formed from a multilayer integrated circuit chip packaging substrate. The wires are as dense as the contact location array. A mold is disposed surrounding the array of outwardly projecting wires. A liquid elastomer is disposed in the mold to fill the spaces between the wires.Type: ApplicationFiled: October 30, 2007Publication date: May 22, 2008Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Brian Samuel Beaman, Keith Edward Fogel, Paul Alfred Lauro, Maurice Heathcote Norcott, Da-Yuan Shih, George Frederick Walker
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Publication number: 20080117613Abstract: The present invention is directed to a high density test probe which provides a means for testing a high density and high performance integrated circuits in wafer form or as discrete chips. The test probe is formed from a dense array of elongated electrical conductors which are embedded in an compliant or high modulus elastomeric material. A standard packaging substrate, such as a ceramic integrated circuit chip packaging substrate is used to provide a space transformer. Wires are bonded to an array of contact pads on the surface of the space transformer. The space transformer formed from a multilayer integrated circuit chip packaging substrate. The wires are as dense as the contact location array. A mold is disposed surrounding the array of outwardly projecting wires. A liquid elastomer is disposed in the mold to fill the spaces between the wires.Type: ApplicationFiled: February 1, 2008Publication date: May 22, 2008Applicant: International Business Machines CorporationInventors: Brian Samuel Beaman, Keith Edward Fogel, Paul Alfred Lauro, Maurice Heathcote Norcott, Da-Yuan Shih, George Frederick Walker
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Publication number: 20080111568Abstract: The present invention is directed to a high density test probe which provides a means for testing a high density and high performance integrated circuits in wafer form or as discrete chips. The test probe is formed from a dense array of elongated electrical conductors which are embedded in an compliant or high modulus elastomeric material. A standard packaging substrate, such as a ceramic integrated circuit chip packaging substrate is used to provide a space transformer. Wires are bonded to an array of contact pads on the surface of the space transformer. The space transformer formed from a multilayer integrated circuit chip packaging substrate. The wires are as dense as the contact location array. A mold is disposed surrounding the array of outwardly projecting wires. A liquid elastomer is disposed in the mold to fill the spaces between the wires.Type: ApplicationFiled: October 30, 2007Publication date: May 15, 2008Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Brian Samuel Beaman, Keith Edward Fogel, Paul Alfred Lauro, Maurice Heathcote Norcott, Da-Yuan Shih, George Frederick Walker
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Publication number: 20080112147Abstract: The present invention is directed to a high density test probe which provides a means for testing a high density and high performance integrated circuits in wafer form or as discrete chips. The test probe is formed from a dense array of elongated electrical conductors which are embedded in an compliant or high modulus elastomeric material. A standard packaging substrate, such as a ceramic integrated circuit chip packaging substrate is used to provide a space transformer. Wires are bonded to an array of contact pads on the surface of the space transformer. The space transformer formed from a multilayer integrated circuit chip packaging substrate. The wires are as dense as the contact location array. A mold is disposed surrounding the array of outwardly projecting wires. A liquid elastomer is disposed in the mold to fill the spaces between the wires.Type: ApplicationFiled: October 30, 2007Publication date: May 15, 2008Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Brian Samuel Beaman, Keith Edward Fogel, Paul Alfred Lauro, Maurice Heathcote Norcott, Da-Yuan Shih, George Frederick Walker
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Publication number: 20080112145Abstract: The present invention is directed to a high density test probe which provides a means for testing a high density and high performance integrated circuits in wafer form or as discrete chips. The test probe is formed from a dense array of elongated electrical conductors which are embedded in an compliant or high modulus elastomeric material. A standard packaging substrate, such as a ceramic integrated circuit chip packaging substrate is used to provide a space transformer. Wires are bonded to an array of contact pads on the surface of the space transformer. The space transformer formed from a multilayer integrated circuit chip packaging substrate. The wires are as dense as the contact location array. A mold is disposed surrounding the array of outwardly projecting wires. A liquid elastomer is disposed in the mold to fill the spaces between the wires.Type: ApplicationFiled: October 30, 2007Publication date: May 15, 2008Applicant: International Business Machines CorporationInventors: Brian Samuel Beaman, Keith Edward Fogel, Paul Alfred Lauro, Maurice Heathcote Norcott, Da-Yuan Shih, George Frederick Walker
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Publication number: 20080112148Abstract: The present invention is directed to a high density test probe which provides a means for testing a high density and high performance integrated circuits in wafer form or as discrete chips. The test probe is formed from a dense array of elongated electrical conductors which are embedded in an compliant or high modulus elastomeric material. A standard packaging substrate, such as a ceramic integrated circuit chip packaging substrate is used to provide a space transformer. Wires are bonded to an array of contact pads on the surface of the space transformer. The space transformer formed from a multilayer integrated circuit chip packaging substrate. The wires are as dense as the contact location array. A mold is disposed surrounding the array of outwardly projecting wires. A liquid elastomer is disposed in the mold to fill the spaces between the wires.Type: ApplicationFiled: October 30, 2007Publication date: May 15, 2008Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Brian Samuel Beaman, Keith Edward Fogel, Paul Alfred Lauro, Maurice Heathcote Norcott, Da-Yuan Shih, George Frederick Walker
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Publication number: 20080112149Abstract: The present invention is directed to a high density test probe which provides a means for testing a high density and high performance integrated circuits in wafer form or as discrete chips. The test probe is formed from a dense array of elongated electrical conductors which are embedded in an compliant or high modulus elastomeric material. A standard packaging substrate, such as a ceramic integrated circuit chip packaging substrate is used to provide a space transformer. Wires are bonded to an array of contact pads on the surface of the space transformer. The space transformer formed from a multilayer integrated circuit chip packaging substrate. The wires are as dense as the contact location array. A mold is disposed surrounding the array of outwardly projecting wires. A liquid elastomer is disposed in the mold to fill the spaces between the wires.Type: ApplicationFiled: October 30, 2007Publication date: May 15, 2008Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Brian Samuel Beaman, Keith Edward Fogel, Paul Alfred Lauro, Maurice Heathcote Norcott, Da-Yuan Shih, George Frederick Walker
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Publication number: 20080112146Abstract: The present invention is directed to a high density test probe which provides a means for testing a high density and high performance integrated circuits in wafer form or as discrete chips. The test probe is formed from a dense array of elongated electrical conductors which are embedded in an compliant or high modulus elastomeric material. A standard packaging substrate, such as a ceramic integrated circuit chip packaging substrate is used to provide a space transformer. Wires are bonded to an array of contact pads on the surface of the space transformer. The space transformer formed from a multilayer integrated circuit chip packaging substrate. The wires are as dense as the contact location array. A mold is disposed surrounding the array of outwardly projecting wires. A liquid elastomer is disposed in the mold to fill the spaces between the wires.Type: ApplicationFiled: October 30, 2007Publication date: May 15, 2008Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Brian Samuel Beaman, Keith Edward Fogel, Paul Alfred Lauro, Maurice Heathcote Norcott, Da-Yuan Shih, George Frederick Walker
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Publication number: 20080112144Abstract: The present invention is directed to a high density test probe which provides a means for testing a high density and high performance integrated circuits in wafer form or as discrete chips. The test probe is formed from a dense array of elongated electrical conductors which are embedded in an compliant or high modulus elastomeric material. A standard packaging substrate, such as a ceramic integrated circuit chip packaging substrate is used to provide a space transformer Wires are bonded to an array of contact pads on the surface of the space transformer. The space transformer formed from a multilayer integrated circuit chip packaging substrate. The wires are as dense as the contact location array. A mold is disposed surrounding the array of outwardly projecting wires. A liquid elastomer is disposed in the mold to fill the spaces between the wires.Type: ApplicationFiled: October 30, 2007Publication date: May 15, 2008Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Brian Samuel Beaman, Keith Edward Fogel, Paul Alfred Lauro, Maurice Heathcote Norcott, Da-Yuan Shih, George Frederick Walker
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Publication number: 20080111569Abstract: The present invention is directed to a high density test probe which provides a means for testing a high density and high performance integrated circuits in wafer form or as discrete chips. The test probe is formed from a dense array of elongated electrical conductors which are embedded in an compliant or high modulus elastomeric material. A standard packaging substrate, such as a ceramic integrated circuit chip packaging substrate is used to provide a space transformer. Wires are bonded to an array of contact pads on the surface of the space transformer. The space transformer formed from a multilayer integrated circuit chip packaging substrate. The wires are as dense as the contact location array. A mold is disposed surrounding the array of outwardly projecting wires. A liquid elastomer is disposed in the mold to fill the spaces between the wires.Type: ApplicationFiled: October 30, 2007Publication date: May 15, 2008Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Brian Samuel Beaman, Keith Edward Fogel, Paul Alfred Lauro, Maurice Heathcote Norcott, Da-Yuan Shih, George Frederick Walker
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Publication number: 20080111570Abstract: The present invention is directed to a high density test probe which provides a means for testing a high density and high performance integrated circuits in wafer form or as discrete chips. The test probe is formed from a dense array of elongated electrical conductors which are embedded in an compliant or high modulus elastomeric material. A standard packaging substrate, such as a ceramic integrated circuit chip packaging substrate is used to provide a space transformer. Wires are bonded to an array of contact pads on the surface of the space transformer. The space transformer formed from a multilayer integrated circuit chip packaging substrate. The wires are as dense as the contact location array. A mold is disposed surrounding the array of outwardly projecting wires. A liquid elastomer is disposed in the mold to fill the spaces between the wires.Type: ApplicationFiled: October 30, 2007Publication date: May 15, 2008Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Brian Samuel Beaman, Keith Edward Fogel, Paul Alfred Lauro, Maurice Heathcote Norcott, Da-Yuan Shih, George Frederick Walker
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Patent number: 7332922Abstract: Probes for electronic devices are described. The probe is formed by ball bonding a plurality of wires to contact locations on a fan out substrate surface. The wires are cut off leaving stubs. A patterned polymer sheet having electrical conductor patterns therein is disposed over the stubs which extend through holes in the sheet. The ends of the wires are flattened to remit the polymer sheet in place. The wire is connected to an electrical conductor on the polymer sheet which is converted to a contact pad on the polymer sheet. A second wire is ball bonded to the pad on the polymer sheet and cut to leave a second stub. The polymer sheet is laser cut so that each second stub is free to move independently of the other second studs. The ends of the second stubs are disposed against contact locations of an electronic device, such as an FC chip, to test the electronic device.Type: GrantFiled: April 7, 2005Date of Patent: February 19, 2008Assignee: International Business Machines CorporationInventors: Brian Samuel Beaman, Keith Edward Fogel, Paul Alfred Lauro, Maurice Heathcote Norcott, Da-Yuan Shih
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Patent number: 6880245Abstract: Probes for electronic devices are described. The probe is formed by ball bonding a plurality of wires to contact locations on a fan out substrate surface. The wires are cut off leaving stubs. A patterned polymer sheet having electrical conductor patterns therein is disposed over the stubs which extend through holes in the sheet. The ends of the wires are flattened to remit the polymer sheet in place. The wire is connected to an electrical conductor on the polymer sheet which is converted to a contact pad on the polymer sheet. A second wire is ball bonded to the pad on the polymer sheet and cut to leave a second stub. The polymer sheet is laser cut so that each second stub is free to move independently of the other second studs. The ends of the second stubs are disposed against contact locations of an electronic device, such as an FC chip, to test the electronic device.Type: GrantFiled: December 19, 2003Date of Patent: April 19, 2005Assignee: International Business Machines CorporationInventors: Brian Samuel Beaman, Keith Edward Fogel, Paul Alfred Lauro, Maurice Heathcote Norcott, Da-Yuan Shih
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Patent number: 6784072Abstract: A method for forming a semiconductor-on-insulator (SOI) substrate is described incorporating the steps of heating a substrate, implanting oxygen into a heated substrate, cooling the substrate, implanting into a cooled substrate and annealing. The steps of implanting may be at several energies to provide a plurality of depths and corresponding buried damaged regions. Prior to implanting, the step of cleaning the substrate surface and/or forming a patterned mask thereon may be performed. The invention overcomes the problem of raising the quality of buried oxide and its properties such as surface roughness, uniform thickness and breakdown voltage Vbd.Type: GrantFiled: July 22, 2002Date of Patent: August 31, 2004Assignee: International Business Machines CorporationInventors: Stephen Richard Fox, Neena Garg, Kenneth John Giewont, Junedong Lee, Siegfried Lutz Maurer, Dan Moy, Maurice Heathcote Norcott, Devendra Kumar Sadana
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Publication number: 20040130343Abstract: Probes for electronic devices are described. The probe is formed by ball bonding a plurality of wires to contact locations on a fan out substrate surface. The wires are cut off leaving stubs. A patterned polymer sheet having electrical conductor patterns therein is disposed over the stubs which extend through holes in the sheet. The ends of the wires are flattened to remit the polymer sheet in place. The wire is connected to an electrical conductor on the polymer sheet which is converted to a contact pad on the polymer sheet. A second wire is ball bonded to the pad on the polymer sheet and cut to leave a second stub. The polymer sheet is laser cut so that each second stub is free to move independently of the other second studs. The ends of the second stubs are disposed against contact locations of an electronic device, such as an FC chip, to test the electronic device.Type: ApplicationFiled: December 19, 2003Publication date: July 8, 2004Inventors: Brian Samuel Beaman, Keith Edward Fogel, Paul Alfred Lauro, Maurice Heathcote Norcott, Da-Yuan Shih
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Patent number: 6722032Abstract: Probes for electronic devices are described. The probe is formed by ball bonding a plurality of wires to contact locations on a fan out substrate surface. The wires are cut off leaving stubs. A patterned polymer sheet having electrical conductor patterns therein is disposed over the stubs which extend through holes in the sheet. The ends of the wires are flattened to remit the polymer sheet in place. The wire is connected to an electrical conductor on the polymer sheet which is converted to a contact pad on the polymer sheet. A second wire is ball bonded to the pad on the polymer sheet and cut to leave a second stub. The polymer sheet is laser cut so that each second stub is free to move independently of the other second studs. The ends of the second stubs are disposed against contact locations of an electronic device, such as an FC chip, to test the electronic device.Type: GrantFiled: August 10, 2001Date of Patent: April 20, 2004Assignee: International Business Machines CorporationInventors: Brian Samuel Beaman, Keith Edward Fogel, Paul Alfred Lauro, Maurice Heathcote Norcott, Da-Yuan Shih
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Publication number: 20040013886Abstract: A method for forming a semiconductor-on-insulator (SOI) substrate is described incorporating the steps of heating a substrate, implanting oxygen into a heated substrate, cooling the substrate, implanting into a cooled substrate and annealing. The steps of implanting may be at several energies to provide a plurality of depths and corresponding buried damaged regions. Prior to implanting, the step of cleaning the substrate surface and/or forming a patterned mask thereon may be performed. The invention overcomes the problem of raising the quality of buried oxide and its properties such as surface roughness, uniform thickness and breakdown voltage Vbd.Type: ApplicationFiled: July 22, 2002Publication date: January 22, 2004Applicant: International Business Machines CorporationInventors: Stephen Richard Fox, Neena Garg, Kenneth John Giewont, Junedong Lee, Siegfried Lutz Maurer, Dan Moy, Maurice Heathcote Norcott, Devendra Kumar Sadana
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Publication number: 20020014004Abstract: The present invention is directed to a high density test probe which provides a means for testing a high density and high performance integrated circuits in wafer form or as discrete chips. The test probe is formed from a dense array of elongated electrical conductors which are embedded in an compliant or high modulus elastomeric material. A standard packaging substrate, such as a ceramic integrated circuit chip packaging substrate is used to provide a space transformer. Wires are bonded to an array of contact pads on the surface of the space transformer. The space transformer formed from a multilayer integrated circuit chip packaging substrate. The wires are as dense as the contact location array. A mold is disposed surrounding the array of outwardly projecting wires. A liquid elastomer is disposed ion the mold to fill the spaces between the wires.Type: ApplicationFiled: August 3, 2001Publication date: February 7, 2002Inventors: Brian Samuel Beaman, Keith Edward Fogel, Paul Alfred Lauro, Maurice Heathcote Norcott, Da-Yuan Shih, George Frederick Walker