Patents by Inventor Meiyin YANG

Meiyin YANG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11930720
    Abstract: The present disclosure provides a storage unit, a data writing method and a data reading method thereof, a memory and an electronic device. The storage unit includes a semiconductor substrate, a first insulating medium layer, a ferroelectric thin film layer, a bottom electrode, a tunnel junction, a first metal interconnection portion, a second metal interconnection portion, a third metal interconnection portion and a fourth metal interconnection portion. The first insulating medium layer is formed on the semiconductor substrate, the ferroelectric thin film layer is disposed on the first insulating medium layer, the bottom electrode is formed on the ferroelectric thin film layer, and the tunnel junction is formed on the bottom electrode. The first metal interconnection portion is connected to a first end of the bottom electrode, and the third metal interconnection portion is connected to a second end of the bottom electrode.
    Type: Grant
    Filed: October 6, 2021
    Date of Patent: March 12, 2024
    Assignee: INSTITUTE OF MICROELECTRONICS, CHINESE ACADEMY OF SCIENCES
    Inventors: Meiyin Yang, Jun Luo, Yan Cui, Jing Xu
  • Publication number: 20230178133
    Abstract: An in-memory computing circuit having reconfigurable logic, including: an input stage and N output stages which are cascaded. The input stage includes 2N STT-MTJs. Each output stage includes STT-MTJs, of which a quantity is equal to a half of a quantity of STT-MTJs in a just previous stage. Two STT-MTJs in the previous stage and one STT-MTJ in the subsequent stage form a double-input single-output in-memory computing unit. Each double-input single-output in-memory computing unit can implement the four logical operations, i.e., NAND, NOR, AND, and OR, under different configurations. Data storage and logical operations can be realized under the same circuit architecture, and reconfigurations among different logic can be achieved.
    Type: Application
    Filed: October 14, 2022
    Publication date: June 8, 2023
    Inventors: Yan Cui, Jun Luo, Meiyin Yang, Jing Xu
  • Publication number: 20230125211
    Abstract: The present application discloses a spin Hall device, a method for obtaining a Hall voltage, and a max pooling method. The spin Hall device includes a cobalt ferroboron layer. A top view and a bottom view of the spin Hall device are completely the same as a cross-shaped graph that has two axes of symmetry perpendicular to each other and equally divided by each other. The spin Hall device of the present application has non-volatility and analog polymorphic characteristics, can be used for obtaining a Hall voltage and applied to various circuits, is simple in structure and small in size, can save on-chip resources, and can meet computation requirements.
    Type: Application
    Filed: September 12, 2022
    Publication date: April 27, 2023
    Applicant: INSTITUTE OF MICROELECTRONICS, CHINESE ACADEMY OF SCIENCES
    Inventors: Yan CUI, Jun LUO, Meiyin YANG, Jing XU
  • Publication number: 20220352460
    Abstract: The present disclosure provides a storage unit, a data writing method and a data reading method thereof, a memory and an electronic device. The storage unit includes a semiconductor substrate, a first insulating medium layer, a ferroelectric thin film layer, a bottom electrode, a tunnel junction, a first metal interconnection portion, a second metal interconnection portion, a third metal interconnection portion and a fourth metal interconnection portion. The first insulating medium layer is formed on the semiconductor substrate, the ferroelectric thin film layer is disposed on the first insulating medium layer, the bottom electrode is formed on the ferroelectric thin film layer, and the tunnel junction is formed on the bottom electrode. The first metal interconnection portion is connected to a first end of the bottom electrode, and the third metal interconnection portion is connected to a second end of the bottom electrode.
    Type: Application
    Filed: October 6, 2021
    Publication date: November 3, 2022
    Applicant: INSTITUTE OF MICROELECTRONICS, CHINESE ACADEMY OF SCIENCES
    Inventors: Meiyin YANG, Jun LUO, Yan CUI, Jing XU
  • Patent number: 10991877
    Abstract: A multi-state memory and a method for manufacturing the same. A magnetoresistive tunnel junction is disposed on a spin-orbit coupling layer, and thermal annealing is performed after dopant ions are injected from a side of the magnetoresistive tunnel junction. The concentration of dopant ions in the magnetoresistive tunnel junction has a gradient variation along the direction that is perpendicular to the direction of the current and within the plane in which the spin-orbit coupling layer is located. Symmetry along the direction perpendicular to the direction of the current is broken. In a case a current flows into the spin-orbit coupling layer, resistance are outputted in multiple states in linearity with the current. The multi-state storage is achieved. It can meet a requirement on hardware of neural network synapses, and is applicable to calculation in a neural network.
    Type: Grant
    Filed: September 4, 2019
    Date of Patent: April 27, 2021
    Assignee: Institute of Microelectronics, Chinese Academy of Sciences
    Inventors: Meiyin Yang, Jun Luo, Sumei Wang, Jing Xu, Yanru Li, Junfeng Li, Yan Cui, Wenwu Wang, Tianchun Ye
  • Patent number: 10978121
    Abstract: A voltage controlled magnetic random memory unit, a memory, and a logic device thereof. The memory unit includes: a ferroelectric layer applied with a first positive or negative voltage to control a directional switching of magnetization; a spin-orbit coupling layer located above the ferroelectric layer and applied with a second voltage to produce a spin current in a direction perpendicular to the spin-orbit coupling layer; a first magnetic layer located above the spin-orbit coupling layer, wherein, the spin current induces a random up and down magnetic switching of the first magnetic layer. The spin current may induce a directional switching of the first magnetic layer in conjunction with the first voltage applied to the ferroelectric layer.
    Type: Grant
    Filed: December 23, 2016
    Date of Patent: April 13, 2021
    Assignee: INSTITUTE OF SEMICONDUCTORS, CHINESE ACADEMY OF SCIENCES
    Inventors: Kaiyou Wang, Meiyin Yang, Kaiming Cai
  • Publication number: 20200303635
    Abstract: A multi-state memory and a method for manufacturing the same. A magnetoresistive tunnel junction is disposed on a spin-orbit coupling layer, and thermal annealing is performed after dopant ions are injected from a side of the magnetoresistive tunnel junction. The concentration of dopant ions in the magnetoresistive tunnel junction has a gradient variation along the direction that is perpendicular to the direction of the current and within the plane in which the spin-orbit coupling layer is located. Symmetry along the direction perpendicular to the direction of the current is broken. In a case a current flows into the spin-orbit coupling layer, resistance are outputted in multiple states in linearity with the current. The multi-state storage is achieved. It can meet a requirement on hardware of neural network synapses, and is applicable to calculation in a neural network.
    Type: Application
    Filed: September 4, 2019
    Publication date: September 24, 2020
    Inventors: Meiyin YANG, Jun Luo, Sumei Wang, Jing Xu, Yanru Li, Junfeng Li, Yan Cui, Wenwu Wang, Tianchun Ye
  • Patent number: 10756256
    Abstract: A magnetoresistive random access memory and a method for manufacturing the same are provided, with which a stress layer covers a part of the protective layer along a direction of a current in the spin-orbit coupling layer, so that a stress is generated on the part of the magnetic layer locally due to the stress layer, thus a lateral asymmetric structure is formed in a direction perpendicular to the current source. In a case that a current is supplied to the spin-orbit coupling layer, the spin-orbit coupling effect in the magnetic layer is asymmetric due to the stress on the part of the magnetic layer, thereby realizing a deterministic switching of the magnetic moment under the function of the stress.
    Type: Grant
    Filed: May 14, 2019
    Date of Patent: August 25, 2020
    Assignee: Institute of Microelectronics, Chinese Academy of Sciences
    Inventors: Meiyin Yang, Jun Luo, Tengzhi Yang, Jing Xu
  • Publication number: 20200211609
    Abstract: A voltage controlled magnetic random memory unit, a memory, and a logic device thereof. The memory unit includes: a ferroelectric layer applied with a first positive or negative voltage to control a directional switching of magnetization; a spin-orbit coupling layer located above the ferroelectric layer and applied with a second voltage to produce a spin current in a direction perpendicular to the spin-orbit coupling layer; a first magnetic layer located above the spin-orbit coupling layer, wherein, the spin current induces a random up and down magnetic switching of the first magnetic layer. The spin current may induce a directional switching of the first magnetic layer in conjunction with the first voltage applied to the ferroelectric layer.
    Type: Application
    Filed: December 23, 2016
    Publication date: July 2, 2020
    Inventors: Kaiyou WANG, Meiyin YANG, Kaiming CAI
  • Publication number: 20200212293
    Abstract: A magnetoresistive random access memory and a method for manufacturing the same are provided, with which a stress layer covers a part of the protective layer along a direction of a current in the spin-orbit coupling layer, so that a stress is generated on the part of the magnetic layer locally due to the stress layer, thus a lateral asymmetric structure is formed in a direction perpendicular to the current source. In a case that a current is supplied to the spin-orbit coupling layer, the spin-orbit coupling effect in the magnetic layer is asymmetric due to the stress on the part of the magnetic layer, thereby realizing a deterministic switching of the magnetic moment under the function of the stress.
    Type: Application
    Filed: May 14, 2019
    Publication date: July 2, 2020
    Inventors: Meiyin YANG, Jun LUO, Tengzhi YANG, Jing XU
  • Publication number: 20200212103
    Abstract: A spin-orbit torque magnetoresistive random access memory, and a method for manufacturing a spin-orbit torque magnetoresistive random access memory are provided. The spin-orbit torque magnetoresistive random access memory includes a spin-orbit coupling layer and a magnetoresistive tunnel junction located on the spin-orbit coupling layer. The magnetoresistive tunnel junction includes a first magnetic layer, a tunneling layer, and a second magnetic layer that are sequentially stacked from bottom to top, and each of the first magnetic layer and the second magnetic layer has perpendicular anisotropy. In a direction of a current in the spin-orbit coupling layer, defects are generated in a part of the magnetoresistive tunnel junction by an ion implantation process.
    Type: Application
    Filed: May 14, 2019
    Publication date: July 2, 2020
    Inventors: Meiyin YANG, Jun LUO, Tengzhi YANG, Jing XU
  • Patent number: 10700124
    Abstract: A spin-orbit torque magnetoresistive random access memory, and a method for manufacturing a spin-orbit torque magnetoresistive random access memory are provided. The spin-orbit torque magnetoresistive random access memory includes a spin-orbit coupling layer and a magnetoresistive tunnel junction located on the spin-orbit coupling layer. The magnetoresistive tunnel junction includes a first magnetic layer, a tunneling layer, and a second magnetic layer that are sequentially stacked from bottom to top, and each of the first magnetic layer and the second magnetic layer has perpendicular anisotropy. In a direction of a current in the spin-orbit coupling layer, defects are generated in a part of the magnetoresistive tunnel junction by an ion implantation process.
    Type: Grant
    Filed: May 14, 2019
    Date of Patent: June 30, 2020
    Assignee: Institute of Microelectronics, Chinese Academy of Sciences
    Inventors: Meiyin Yang, Jun Luo, Tengzhi Yang, Jing Xu
  • Publication number: 20200152252
    Abstract: A spin-orbit torque magnetoresistive random access memory, and a method and an apparatus for writing the same. A magnetoresistive tunnel junction is provided on a spin-orbit coupling layer. In a case that a current is applied to the spin-orbit coupling layer, a spin current is generated in the spin-orbit coupling layer, so that a magnetic moment in the magnetoresistive tunnel junction is oriented into a plane of the spin-orbit coupling layer. At such time, there is a temperature difference between one end of the magnetoresistive tunnel junction and another end of the magnetoresistive tunnel junction. An deterministic switching of the magnetic moment is achieved under the temperature difference, and a switching direction can be controlled based on the direction of the current direction or the direction of the temperature difference. Thereby, the deterministic switching of the magnetic moment is achieved in the SOT-MRAM.
    Type: Application
    Filed: June 25, 2019
    Publication date: May 14, 2020
    Inventors: Meiyin YANG, Jun LUO