Patents by Inventor Michael E. Thomas
Michael E. Thomas has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 5904507Abstract: Disclosed is a method of fabricating a programmable antifuse structure wherein programming of the antifuse structure results in conducting paths which are confined within a finite predictable area. The method includes depositing an insulating layer over a field. Additionally, the method includes creating a via through a via area of the insulating layer to expose a programmable surface area of the field. The method also includes depositing an interlayer over the exposed programmable surface of the field, over sidewalls of the via, and over an extended surface region of the insulating layer, the extended surface region including the via area. The method includes depositing a first conducting layer over the interlayer. The method also includes etching in the extended surface region to the insulating layer; the etching is for confining formation of conductive paths to within the via area upon programming of the programmable antifuse structure.Type: GrantFiled: February 23, 1998Date of Patent: May 18, 1999Assignee: National Semiconductor CorporationInventor: Michael E. Thomas
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Patent number: 5783363Abstract: An improvement in a method of charged-particle lithography includes the step of spinning an electrically-conductive layer on a substrate. In one embodiment, an electrically-conductive transfer layer is applied on a substrate. In another embodiment, an electrically-conductive planarizing layer is applied on a substrate. In another embodiment, an electrically-conductive imageable layer is applied on a substrate. In another embodiment, a separate electrically-conductive layer is applied. In another embodiment, a planarizing layer, a transfer layer, or an imageable layer is bombarded with ions to form a thin electrically-conductive carbonized layer.Type: GrantFiled: January 21, 1997Date of Patent: July 21, 1998Assignee: National Semiconductor CorporationInventor: Michael E. Thomas
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Patent number: 5748523Abstract: Integrated circuit memory elements are fabricated by disposing a first layer of electrically conductive material on the surface of an electrically insulating substrate. The first layer of electrically conductive material is formed into a first predetermined pattern. A second layer of electrically insulating material is disposed on the surface of the electrically insulating substrate and the patterned first layer of electrically conductive material. A first layer of magnetizable material is disposed on the second insulating layer and is formed into a predetermined pattern having a predetermined positional relationship with respect to the underlying patterned first layer of electrically conductive material. A third layer of electrically insulating material is disposed over the second layer of insulating material and the patterned first layer of magnetizable material.Type: GrantFiled: January 22, 1997Date of Patent: May 5, 1998Assignee: National Semiconductor CorporationInventors: Michael E. Thomas, Irfan Saadat
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Patent number: 5713774Abstract: An integrated circuit electronic grid device includes first and second metal layers wherein the metal layers are vertically disposed within a substitute. A layer of a dielectric medium is disposed between the metal layers and a third metal layer is spaced apart from the second metal layer and insulated from the second metal layer by another layer of a dielectric medium. The first and second metal layers are biased with respect to each other to cause a flow electrons from the first metal layer toward the second metal layer. The second metal layer is provided with a large plurality of holes adapted for permitting the flow of electrons to substantially pass therethrough and to travel toward the third metal layer. A fourth metal layer is spaced apart from the third metal layer to collect the electrons wherein the third metal layer is also provided with a large plurality of holes to permit the electrons to flow therethrough and continue toward the fourth metal layer.Type: GrantFiled: June 7, 1995Date of Patent: February 3, 1998Assignee: National Semiconductor CorporationInventors: Michael E. Thomas, Irfan Saadat
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Patent number: 5688724Abstract: A dielectric structure on a substrate includes a primary dielectric layer on the substrate, the primary dielectric being a metal oxide, such as tantalum pentoxide, having a high dielectric constant, and a secondary dielectric layer, such as an oxide or nitride of silicon, on the primary dielectric layer. In one embodiment, a multi-layer structure includes a second primary dielectric layer disposed on the secondary dielectric layer, and a second secondary dielectric layer disposed on the second primary dielectric layer, each primary dielectric layer being in a first crystalline state characterized by low leakage current for a given applied electrical field. A method of forming a dielectric structure on a substrate includes forming a layer of a primary dielectric, which is a metal oxide having a high dielectric constant, forming a secondary dielectric layer on the primary dielectric layer, and annealing the primary dielectric layer.Type: GrantFiled: December 23, 1994Date of Patent: November 18, 1997Assignee: National Semiconductor CorporationInventors: Euisik Yoon, Ronald P. Kovacs, Michael E. Thomas
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Patent number: 5679405Abstract: A suitable inert thermal gas such as argon is introduced onto the backside of wafers being processed in a CVD reactor during the deposition of tungsten or other metals and silicides, to avoid deposition of material on the backside of the wafers being processed. Each process station includes a gas dispersion head disposed over a platen. The platen has a circular depression for receiving a wafer, and an annular groove provided in the floor of the depression, near the wall thereof. Heated and pressurized backside gas is introduced into the groove so that the wafer is maintained in a position above the floor of the depression but still within it. In this manner, backside gas vents from beneath the edge of the wafer on the platen and prevents the process gases from contacting the wafer backside. The backside gas is also used for levitating the wafer in a transfer region above the platen, so that the wafer can be transported to or from the platen with a suitable wafer transfer mechanism.Type: GrantFiled: July 24, 1995Date of Patent: October 21, 1997Assignees: National Semiconductor Corp., Novellus Systems, Inc.Inventors: Michael E. Thomas, Everhardus P. van de Van, Eliot K. Broadbent
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Patent number: 5604881Abstract: A method and apparatus are disclosed for emulating a rotating disk drive using a removable ferroelectric solid state storage device having a multiplexed optical data interface in a microprocessor controlled storage system. The removable ferroelectric solid state storage device has non-volatile memory integrated circuit components in a ferroelectric random access memory (FRAM) pack. The ferroelectric memory pack utilizes the same read/write recording techniques as those for transferring data between a host computer and a rotating disk drive. The optical read and write data pass via a fiber optic read/write data multiplexor through a write data input buffer to a fiber optic light receiver, and a read data output buffer to a fiber optic light transmitter, and are thereby sent out on an ST506/SASI/ESDI/SCSI bus to a RAM memory pack controller.Type: GrantFiled: October 19, 1994Date of Patent: February 18, 1997Assignee: FramdriveInventor: Michael E. Thomas
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Patent number: 5592646Abstract: A method and apparatus are disclosed for emulating a rotating disk drive using a removable ferroelectric solid state storage device having a parallel and multiplexed optical data interface in a microprocessor controlled storage system. The removable ferroelectric solid state storage device has non-volatile memory integrated circuit components in a ferroelectric random access memory (FRAM) pack. The ferroelectric memory pack utilizes the same read/write recording techniques as those for transferring data between a host computer and a rotating disk drive. The optical parallel read and write data pass via a fiber optic read/write data multiplexor through a write data input buffer to a fiber optic light receiver, and a read data output buffer to a fiber optic light transmitter, and are thereby sent out on an ST506/SASI/ESDI/SCSI bus to a RAM memory pack controller.Type: GrantFiled: October 19, 1994Date of Patent: January 7, 1997Assignee: FramdriveInventor: Michael E. Thomas
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Patent number: 5592643Abstract: A method and apparatus are disclosed for emulating a rotating disk drive using a removable ferroelectric solid state storage device having a parallel data interface in a microprocessor controlled storage system. The removable ferroelectric solid state storage device has non-volatile memory integrated circuit components in a ferroelectric random access memory (FRAM) pack. The ferroelectric memory pack utilizes read/write recording techniques as those for transferring data between a host computer and a rotating disk drive.Type: GrantFiled: October 19, 1994Date of Patent: January 7, 1997Assignee: FramdriveInventor: Michael E. Thomas
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Patent number: 5592642Abstract: A method and apparatus are disclosed for emulating a rotating disk drive using a removable ferroelectric solid state storage device having an optical and parallel data interface in a microprocessor controlled storage system. The removable ferroelectric solid state storage device has non-volatile memory integrated circuit components in a ferroelectric random access memory (FRAM) pack. The ferroelectric memory pack utilizes the same read/write recording techniques as those for transferring data between a host computer and a rotating disk drive. The optical parallel read and write data pass through a write data input buffer to a fiber optic light receiver, and a read data output buffer to a fiber optic light transmitter, and are thereby sent out on an ST506/SASI/ESDI/SCSI bus to a RAM memory pack controller.Type: GrantFiled: October 19, 1994Date of Patent: January 7, 1997Assignee: FramdriveInventor: Michael E. Thomas
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Patent number: 5592644Abstract: A method and apparatus are disclosed for emulating a rotating disk drive using a removable ferroelectric solid state storage device having an optical data interface in a microprocessor controlled storage system. The removable ferroelectric solid state storage device has non-volatile memory integrated circuit components in a ferroelectric random access memory (FRAM) pack. The ferroelectric memory pack utilizes the same read/write recording techniques as those for transferring data between a host computer and a rotating disk drive. The optical read and write data pass through a write data input buffer to a fiber optic light receiver, and a read data output buffer to a fiber optic light transmitter, and are thereby sent out on an ST506/SASI/ESDI/SCSI bus to a RAM memory pack controller.Type: GrantFiled: October 19, 1994Date of Patent: January 7, 1997Assignee: FramdriveInventor: Michael E. Thomas
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Patent number: 5592645Abstract: A method and apparatus are disclosed for emulating a rotating disk drive using a removable ferroelectric solid state storage device having a frequency modulated (FM) data interface in a microprocessor controlled storage system. The removable ferroelectric solid state storage device has non-volatile memory integrated circuit components in a ferroelectric random access memory (FRAM) pack. The ferroelectric memory pack utilizes the same read/write recording techniques as those for transferring data between a host computer and a rotating disk drive. The frequency modulated read and write data pass via an antenna to a receiver through a write data input buffer, and a read data output buffer to a transmitter to an antenna, and are thereby sent out on an ST506/SASI/ESDI/SCSI bus to a RAM memory pack controller.Type: GrantFiled: October 19, 1994Date of Patent: January 7, 1997Assignee: FramdriveInventor: Michael E. Thomas
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Patent number: 5572042Abstract: An integrated circuit electronic grid device includes first and second metal layers wherein the metal layers are vertically disposed within a substitute. A layer of a dielectric medium is disposed between the metal layers and a third metal layer is spaced apart from the second metal layer and insulated from the second metal layer by another layer of a dielectric medium. The first and second metal layers are biased with respect to each other to cause a flow electrons from the first metal layer toward the second metal layer. The second metal layer is provided with a large plurality of holes adapted for permitting the flow of electrons to substantially pass therethrough and to travel toward the third metal layer. A fourth metal layer is spaced apart from the third metal layer to collect the electrons wherein the third metal layer is also provided with a large plurality of holes to permit the electrons to flow therethrough and continue toward the fourth metal layer.Type: GrantFiled: April 11, 1994Date of Patent: November 5, 1996Assignee: National Semiconductor CorporationInventors: Michael E. Thomas, Irfan Saadat
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Patent number: 5539936Abstract: A sports helmet transparent guard assembly adapted for use in association with a sports helmet having opposing side regions with C-shaped recesses positioned therein, the apparatus comprising: a transparent guard device fabricated of transparent materials, the guard device including a support bar formed in a generally semicircular configuration with two ends, coupling devices being positioned along the support bar, a side flap being formed in an arcuate generally circular configuration, each side flap having a linear upper end coupled to an end of the support bar, each side flap adapted to be positioned in the C-shaped recesses of the helmet in an operative orientation, the support bar being coupled to the upper cross bar of the face mask to secure the guard device in place, the transparent face guard providing users with increased peripheral visibility to avoid injuries while participating in contact sports.Type: GrantFiled: November 3, 1995Date of Patent: July 30, 1996Inventor: Michael E. Thomas
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Patent number: 5453154Abstract: An integrated circuit microwave interconnect is formed upon a surface by disposing a dielectric layer over the surface and patterning the dielectric layer to form a dielectric region. The dielectric region is then surrounded by a surrounding metal layer. In one embodiment the surface may be a non-metal upon which a metal layer is disposed prior to disposing the dielectric layer. In this embodiment an additional metal layer is disposed adjoining the first metal surface on both sides of the dielectric region after patterning the layer to form the dielectric region. Thus, the two metal layers thereby form the surrounding metal layer around the dielectric region. The microwave interconnect may be formed upon the surface of the substrate, above the surface of the substrate in a floating configuration, or in a trench within the substrate.Type: GrantFiled: November 15, 1993Date of Patent: September 26, 1995Assignee: National Semiconductor CorporationInventors: Michael E. Thomas, Irfan A. Saadat, Michael A. Glenn
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Patent number: 5414301Abstract: A semiconductor integrated circuit device is provided with an electrical interconnect system which is stable at high temperatures. The interconnect system employs refractory metal compounds which are electrically conductive, which form stable couples with silicon and compounds thereof, and which remain stable at temperatures exceeding approximately 500.degree. C.Type: GrantFiled: February 16, 1994Date of Patent: May 9, 1995Assignee: National Semiconductor CorporationInventor: Michael E. Thomas
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Patent number: 5410799Abstract: The first electrical switch contact of an electrostatic switch is formed over a substrate. A layer of electrically insulating material is interposed between the first switch contact and the substrate where the substrate is a silicon substrate having active regions. In that case, contact holes are formed in the insulating layer where desired to form electrical contact between the first switch contact and an underlying active region. An electrically insulating layer is formed over the first switch contact. A second switch contact is formed over the electrically insulating layer in a position such that a middle portion of the second electrical contact overlies a middle portion of the first electrical contact. A void is then created between the middle portions of the two electrical contacts by removing a portion of the electrically insulating material there between.Type: GrantFiled: March 17, 1993Date of Patent: May 2, 1995Assignee: National Semiconductor CorporationInventor: Michael E. Thomas
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Patent number: 5359726Abstract: A method and apparatus are disclosed for emulating a rotating disk drive using a removable ferroelectric solid state storage device in a microprocessor controlled storage system. The removable ferroelectric solid state storage device has non-volatile memory integrated circuit components in a ferroelectric random access memory (FRAM) pack. The ferroelectric memory pack utilizes the same read/write recording techniques as those for transferring data between a host computer and a rotating disk drive.Type: GrantFiled: June 8, 1992Date of Patent: October 25, 1994Inventor: Michael E. Thomas
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Patent number: 5317141Abstract: A method of alignment of a first object with a second object includes the steps of determining the location of a feature on a surface of the second object using a probe of a scanned probe microscope, and positioning the first object in preselected spatial relationship with respect to the located feature. In an apparatus for performing lithography on a substrate, having a mask and a mask holder supporting the mask, an improvement includes an apparatus having a probe of a scanned probe microscope, for determining the location of a feature on a surface of the substrate.Type: GrantFiled: August 14, 1992Date of Patent: May 31, 1994Assignee: National Semiconductor CorporationInventor: Michael E. Thomas
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Patent number: 5279988Abstract: A process for fabricating discrete electrical microcomponents, such as microtransformers, microautotransformers and microinductors, on a semiconductor substrate in which two patterned layers of electrically conductive material are electrically connected through vias in two interposed layers of electrically insulating material to form electrically conductive coils around a magnetic core formed by a patterned layer of magnetic material interposed between the two insulating layers. Laminated magnetic cores may be formed by patterning multiple layers of magnetic material. The microcomponents can also be formed without magnetic cores and can be formed on insulating substrates.Type: GrantFiled: March 31, 1992Date of Patent: January 18, 1994Inventors: Irfan Saadat, Michael E. Thomas