Patents by Inventor Michael Francis Lamy

Michael Francis Lamy has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Parallel backplane architecture providing asymmetric bus time slot cross-connect capability
    Patent number: 6522648
    Abstract: A channel interface architecture for a time division multiplexed (TDM) data communication system has a plurality of TDM communication ports coupled to serial TDM communication channels. The channel interface architecture interfaces data from any channel of any TDM communication port with any TDM communication channel of any other TDM communication port, on a per time slot/channel basis. The architecture includes a parallel data bus portion, an address bus portion, and a control portion. Each of a plurality of TDM communication channel interface units, associated with the ports, includes a multipage memory that stores data received from an associated serial communication link. The memory also selectively stores data that has been asserted onto the data bus portion of the bus architecture from another interface unit.
    Type: Grant
    Filed: January 26, 2000
    Date of Patent: February 18, 2003
    Assignee: Adtran Inc.
    Inventors: Kevin Paul Heering, Robert David Deaton, John Robert Coffman, III, Michael Francis Lamy
  • Parallel backplane architecture providing asymmetric bus time slot cross-connect capability
    Patent number: 6067296
    Abstract: A channel interface architecture for a time division multiplexed (TDM) data communication system has a plurality of TDM communication ports coupled to serial TDM communication channels. The channel interface architecture interfaces data from any channel of any TDM communication port with any TDM communication channel of any other TDM communication port, on a per time slot/channel basis. The architecture includes a parallel data bus portion, an address bus portion, and a control portion. Each of a plurality of TDM communication channel interface units, associated with the ports, includes a multipage memory that stores data received from an associated serial communication link. The memory also selectively stores data that has been asserted onto the data bus portion of the bus architecture from another interface unit.
    Type: Grant
    Filed: March 28, 1997
    Date of Patent: May 23, 2000
    Assignee: Adtran, Inc.
    Inventors: Kevin Paul Heering, Robert David Deaton, John Robert Coffman, III, Michael Francis Lamy