Abstract: A digital micro-mirror device (20) for imaging applications, having an array (21) of mirror elements for forming the image, and having data loading circuitry (22, 23) for loading data for addressing the mirror elements. The data loading circuitry (22, 23) has a row of shift registers (23), which receive data and pass the data to latches (22). Each output of the shift registers (23) is connected to a number of latches (22). For loading a row of data, the row is divided into portions, and the shift registers (23) receive the row of data in sequential portions. It delivers each portion to a different set of latches, each set comprised of a latch from each shift register output. Each set of latches holds its portion of the row of data on bit-lines while the remaining portions of the row are input to the shift registers (23) and passed to other sets of latches (22).

Abstract: A digital micro-mirror device (20) for imaging applications, having an array (21) of mirror elements for forming the image and data loading circuitry (22, 23, 24) for loading data for addressing the mirror elements. The data loading circuitry (22, 23, 24) has a row of shift registers (24), which receive one row of data at a time, which they deliver to latches (23). The latches (23) hold the data on bit-lines, which run down columns of the array (21). The row to be loaded is selected with a row decoder (25). A block load circuit (22), comprised of a shift register (35) and logic gates (33) divides each row of memory cells into blocks (31) and ensures that each block of a row of memory cells is sequentially loaded.