Patents by Inventor Michael RIZZOLO

Michael RIZZOLO has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10150323
    Abstract: An anti-counterfeiting method, system, and non-transitory computer readable medium, include a production circuit configured to produce a Directed Self-Assembly (DSA) pattern including a unique pattern, an analysis circuit configured to analyze the unique pattern, an embedding circuit configured to embed the unique pattern on a document, and a verification circuit configured to verify that the unique pattern embedded on the document corresponds to the document.
    Type: Grant
    Filed: February 29, 2016
    Date of Patent: December 11, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Benjamin David Briggs, Lawrence A. Clevenger, Bartlet H. DeProspo, Michael Rizzolo
  • Publication number: 20180349220
    Abstract: Methods and systems for printing accurate three-dimensional structures include printing a three-dimensional structure according to an original three-dimensional model. The original three-dimensional model is adjusted to reduce measured differences between the printed three-dimensional structure and the original three-dimensional model. A three-dimensional structure is printed according to the adjusted three-dimensional model.
    Type: Application
    Filed: June 5, 2017
    Publication date: December 6, 2018
    Inventors: Benjamin D. Briggs, Lawrence A. Clevenger, Leigh Anne H. Clevenger, Christopher J. Penny, Michael Rizzolo, Aldis G. Sipolins
  • Publication number: 20180349535
    Abstract: A method of electrical device manufacturing that includes measuring a first plurality of dimensions and electrical performance from back end of the line (BEOL) structures; and comparing the first plurality of dimensions with a second plurality of dimensions from a process assumption model to determine dimension variations by machine vision image processing. The method further includes providing a plurality of scenarios for process modifications by applying machine image learning to the dimension variations and electrical variations in the in line electrical measurements from the process assumption model. The method further includes receiving production dimension measurements and electrical measurements at a manufacturing prediction actuator. The at least one of the dimensions or electrical measurements received match one of the plurality of scenarios the manufacturing prediction actuator using the plurality of scenarios for process modifications effectuates a process change.
    Type: Application
    Filed: May 31, 2017
    Publication date: December 6, 2018
    Inventors: Prasad Bhosale, Michael Rizzolo, Chih-Chao Yang
  • Publication number: 20180349538
    Abstract: A method of electrical device manufacturing that includes measuring a first plurality of dimensions and electrical performance from back end of the line (BEOL) structures; and comparing the first plurality of dimensions with a second plurality of dimensions from a process assumption model to determine dimension variations by machine vision image processing. The method further includes providing a plurality of scenarios for process modifications by applying machine image learning to the dimension variations and electrical variations in the in line electrical measurements from the process assumption model. The method further includes receiving production dimension measurements and electrical measurements at a manufacturing prediction actuator. The at least one of the dimensions or electrical measurements received match one of the plurality of scenarios the manufacturing prediction actuator using the plurality of scenarios for process modifications effectuates a process change.
    Type: Application
    Filed: December 7, 2017
    Publication date: December 6, 2018
    Inventors: Prasad Bhosale, Michael Rizzolo, Chih-Chao Yang
  • Publication number: 20180351596
    Abstract: A system for a touch screen interface that includes a coating including a plurality of a touch activated microchips; and a projector for projecting a light image onto the coating that is applied to a touch screen substrate. The system also includes an image calibrator that calibrates touch activated microchips in the coating to features of the light image projected onto the coating. The system further includes a receiver for receiving signal from the touch activated microchips when said feature of the light image is activated.
    Type: Application
    Filed: May 30, 2017
    Publication date: December 6, 2018
    Inventors: Maryam Ashoori, Benjamin D. Briggs, Justin A. Canaperi, Lawrence A. Clevenger, Leigh Anne H. Clevenger, Michael Rizzolo, Spyridon Skordas
  • Patent number: 10134674
    Abstract: A method of fabricating a metallization layer of a semiconductor device in which copper is used for an interconnect material and cobalt is used to encapsulate the copper. A material is introduced that will interact with the cobalt to cause a hexagonal-close-packed (HCP) crystal structure of cobalt to change to a face-centered-cubic (FCC) crystal structure of cobalt, the FCC crystal structure providing a resistance of the cobalt to migrate.
    Type: Grant
    Filed: August 14, 2017
    Date of Patent: November 20, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Benjamin David Briggs, James J. Kelly, Koichi Motoyama, Roger Allan Quon, Michael Rizzolo, Theodorus Eduardus Standaert
  • Publication number: 20180328979
    Abstract: Embodiments of the invention are directed to a semiconductor wafer test system. A non-limiting example of the test system includes a controller, a sensing system communicatively coupled to the controller, and a stress source communicatively coupled to the controller. The controller is configured to control the stress source to deliver an applied stress to a targeted stress area of a semiconductor wafer. The sensing system is configured to detect the applied stress and provide data of the applied stress to the controller. The controller is further configured to control the stress source based at least in part on the data of the applied stress.
    Type: Application
    Filed: November 6, 2017
    Publication date: November 15, 2018
    Inventors: Benjamin D. Briggs, Lawrence A. Clevenger, Nicholas A. Lanzillo, Michael Rizzolo, Theodorus E. Standaert, James H. Stathis
  • Publication number: 20180328977
    Abstract: Embodiments of the invention are directed to a semiconductor wafer test system. A non-limiting example of the test system includes a controller, a sensing system communicatively coupled to the controller, and a stress source communicatively coupled to the controller. The controller is configured to control the stress source to deliver an applied stress to a targeted stress area of a semiconductor wafer. The sensing system is configured to detect the applied stress and provide data of the applied stress to the controller. The controller is further configured to control the stress source based at least in part on the data of the applied stress.
    Type: Application
    Filed: May 10, 2017
    Publication date: November 15, 2018
    Inventors: Benjamin D. Briggs, Lawrence A. Clevenger, Nicholas A. Lanzillo, Michael Rizzolo, Theodorus E. Standaert, James H. Stathis
  • Publication number: 20180315094
    Abstract: A computer implemented method and system for identifying advertisements targeted to individuals based on analysis of audio recordings. The method includes recording audio input from at least one media transmission, analyzing the recorded media audio to identify content of the at least one media transmission, recording audio input from at least one individual, analyzing the recorded individual audio to classify the at least one individual into at least one segment, analyzing the recorded individual audio to identify at least one sentiment related to the identified media content, analyzing the at least one sentiment in context with the identified media content and identifying at least one advertisement targeted to the at least one segment based on the contextual analysis.
    Type: Application
    Filed: November 29, 2017
    Publication date: November 1, 2018
    Inventors: Maryam Ashoori, Benjamin D. Briggs, Lawrence A. Clevenger, Leigh Anne H. Clevenger, Michael Rizzolo
  • Publication number: 20180315093
    Abstract: A computer implemented method and system for identifying advertisements targeted to individuals based on analysis of audio recordings. The method includes recording audio input from at least one media transmission, analyzing the recorded media audio to identify content of the at least one media transmission, recording audio input from at least one individual, analyzing the recorded individual audio to classify the at least one individual into at least one segment, analyzing the recorded individual audio to identify at least one sentiment related to the identified media content, analyzing the at least one sentiment in context with the identified media content and identifying at least one advertisement targeted to the at least one segment based on the contextual analysis.
    Type: Application
    Filed: May 1, 2017
    Publication date: November 1, 2018
    Inventors: Maryam Ashoori, Benjamin D. Briggs, Lawrence A. Clevenger, Leigh Anne H. Clevenger, Michael Rizzolo
  • Patent number: 10109579
    Abstract: A method of forming a semiconductor device, includes forming a conductive layer in a recessed portion of a porous dielectric layer, partially removing a top portion of the conductive layer while maintaining a height of the porous dielectric layer, forming a conformal cap layer on the porous dielectric layer and the conductive layer in the recessed portion, polishing the conformal cap layer to form a gap in the conformal cap layer, such that an upper surface of the porous dielectric layer is exposed through the gap and an upper surface of the conductive layer is protected by the cap layer, and performing a heat treatment to burn out a pore filler of the porous dielectric layer through the exposed upper surface of the porous dielectric layer.
    Type: Grant
    Filed: February 28, 2018
    Date of Patent: October 23, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Benjamin David Briggs, Lawrence A. Clevenger, Bartlet H. Deprospo, Huai Huang, Christopher J. Penny, Michael Rizzolo
  • Patent number: 10099108
    Abstract: Embodiments are directed to a support apparatus. The support apparatus might comprise a body configured to support an entity. The body might comprise a material that has a physical property. The support apparatus might further comprise a coupler system configured to couple electric current from a power source to the material. The material is arranged such that coupling an electric current to the material changes the physical property of the material. Embodiments are further directed to a method. The method might comprise forming one or more cavities in a support apparatus. The method might further comprise providing one or more couplers in electrical contact with each of the one or more channels. The method further comprises filling each of the one or more cavities with a fluid that has electrically changeable rigidity. Finally, the method might comprise connecting a power source to each of the one or more couplers.
    Type: Grant
    Filed: June 20, 2016
    Date of Patent: October 16, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Benjamin D. Briggs, Lawrence A. Clevenger, Bartlet H. DeProspo, Michael Rizzolo
  • Patent number: 10096769
    Abstract: A substantially flat bottom electrode for magnetoresistive random access memory (MRAM) devices includes three components: a recessed bulk conductive material such as copper, a conductive liner lining the recess, and a cap layer, wherein the conductive liner is a harder material than the cap layer. The cap layer and the dielectric layer are coplanar having a height differential of less than 3 nanometers. The conductive liner has a lower chemical mechanical planarization removal rate. Also provided are processes for forming the bottom electrode.
    Type: Grant
    Filed: March 10, 2017
    Date of Patent: October 9, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Prasad Bhosale, Raghuveer R. Patlolla, Michael Rizzolo, Chih-Chao Yang
  • Publication number: 20180287051
    Abstract: A substantially flat bottom electrode for magnetoresistive random access memory (MRAM) devices includes three components: a recessed bulk conductive material such as copper, a conductive liner lining the recess, and a cap layer, wherein the conductive liner is a harder material than the cap layer. The cap layer and the dielectric layer are coplanar having a height differential of less than 3 nanometers. The conductive liner has a lower chemical mechanical planarization removal rate. Also provided are processes for forming the bottom electrode.
    Type: Application
    Filed: June 5, 2018
    Publication date: October 4, 2018
    Inventors: Prasad Bhosale, Raghuveer R. Patlolla, Michael Rizzolo, Chih-Chao Yang
  • Publication number: 20180277482
    Abstract: Methods are provided for fabricating metallic interconnect structures having reduced electrical resistivity that is obtained by applying mechanical strain to the metallic interconnect structures, as well as semiconductor structures having metallic interconnect structures formed with permanent mechanical strain to provide reduced electrical resistivity. For example, a method includes forming a metallic interconnect structure in an interlevel dielectric (ILD) layer of a back-end-of-line (BEOL) structure of a semiconductor structure, and forming a stress layer in contact with the metallic interconnect structure. A thermal anneal process is performed to cause the stress layer to expand and apply compressive strain to the metallic interconnect structure and permanently deform at least a portion of the metallic interconnect structure into a stress memorized state of compressive strain.
    Type: Application
    Filed: November 13, 2017
    Publication date: September 27, 2018
    Inventors: Benjamin D. Briggs, Lawrence A. Clevenger, Nicholas A. Lanzillo, Michael Rizzolo, Theodorus E. Standaert
  • Patent number: 10083905
    Abstract: A method of forming a skip-via, including, forming a first dielectric layer on a first metallization layer, forming a second metallization layer on the first dielectric layer and a second dielectric layer on the second metallization layer, removing a section of the second dielectric layer to form a via to the second metallization layer, removing a portion of the second metallization layer to form an aperture, and removing an additional portion of the second metallization layer to form an exclusion zone.
    Type: Grant
    Filed: February 7, 2017
    Date of Patent: September 25, 2018
    Assignee: International Business Machines Corporation
    Inventors: Benjamin D. Briggs, Lawrence A. Clevenger, Bartlet H. DeProspo, Huai Huang, Christopher J. Penny, Michael Rizzolo
  • Publication number: 20180269383
    Abstract: Techniques for preventing switching of spins in a magnetic tunnel junction by stray magnetic fields using a thin film magnetic shield are provided. In one aspect, a method of forming a magnetic tunnel junction includes: forming a stack on a substrate, having a first magnetic layer, a tunnel barrier, and a second magnetic layer; etching the stack to partially pattern the magnetic tunnel junction in the stack, wherein the etching includes patterning the magnetic tunnel junction through the second magnetic layer, the tunnel barrier, and partway through the first magnetic layer; depositing a first spacer and a magnetic shield film onto the partially patterned magnetic tunnel junction; etching back the magnetic shield film and first spacer; complete etching of the magnetic tunnel junction through the first magnetic layer to form a fully patterned magnetic tunnel junction; and depositing a second spacer onto the fully patterned magnetic tunnel junction.
    Type: Application
    Filed: May 7, 2018
    Publication date: September 20, 2018
    Inventors: Benjamin D. Briggs, Lawrence A. Clevenger, Nicholas A. Lanzillo, Michael Rizzolo, Theodorus E. Standaert
  • Publication number: 20180261759
    Abstract: A substantially flat bottom electrode for magnetoresistive random access memory (MRAM) devices includes three components: a recessed bulk conductive material such as copper, a conductive liner lining the recess, and a cap layer, wherein the conductive liner is a harder material than the cap layer. The cap layer and the dielectric layer are coplanar having a height differential of less than 3 nanometers. The conductive liner has a lower chemical mechanical planarization removal rate. Also provided are processes for forming the bottom electrode.
    Type: Application
    Filed: March 10, 2017
    Publication date: September 13, 2018
    Inventors: Prasad Bhosale, Raghuveer R. Patlolla, Michael Rizzolo, Chih-Chao Yang
  • Publication number: 20180254242
    Abstract: A method of forming a self-aligned pattern of vias in a semiconductor device comprises etching a pattern of lines that contain notches that are narrower than other parts of the line. Thereafter, vias are created where the notches are located. The locations of the vias are such that the effect of blown-out areas is minimized. Thereafter, the lines are etched and the vias and line areas are filled. The layers are planarized such that the metal fill is level with a surrounding ultra-low-k dielectric. Additional metal layers, lines, and vias can be created. Other embodiments are also described herein.
    Type: Application
    Filed: April 30, 2018
    Publication date: September 6, 2018
    Inventors: Benjamin D. BRIGGS, Lawrence A. CLEVENGER, Bartlet H. DeProspo, Michael RIZZOLO, Nicole A. SAULNIER
  • Publication number: 20180247443
    Abstract: Embodiments of the invention are directed to computer-implemented methods, computer systems, and computer program products for customizing a virtual reality avatar. The method includes receiving inputs from an electromyography sensor. The inputs from the electromyography sensor include inputs derived from the activity or inactivity of facial muscles. In some embodiments, the electromyography sensor is integrated into a head mounted display to be in contact with a user's facial muscles. The inputs from the electromyography sensor are translated into data that represents sensed facial expressions. The facial features of the user's virtual reality avatar are modified based at least in part on the data that represents sensed facial expressions.
    Type: Application
    Filed: February 28, 2017
    Publication date: August 30, 2018
    Inventors: Benjamin D. Briggs, Lawrence A. Clevenger, Leigh Anne H. Clevenger, Christopher J. Penny, Michael Rizzolo, Aldis G. Sipolins