Patents by Inventor Michiaki Tsuneoka

Michiaki Tsuneoka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120188916
    Abstract: A wireless device wherein a first reception block carries out carrier sensing operation to check a condition of interfering wave before a first transmission block transmits a signal, and the first reception block halts operation thereof and makes the first transmission block transmit the signal when the first reception block confirms that the condition of interfering wave is within a predetermined range, or executes retry operation for carrying out the career sensing operation again when it confirms that the condition of interfering wave is outside of the predetermined range as a result of the career sensing operation.
    Type: Application
    Filed: August 27, 2010
    Publication date: July 26, 2012
    Inventors: Eiji Miyake, Michiaki Tsuneoka, Hiroki Kaihori
  • Publication number: 20120112726
    Abstract: A power supply controller includes a power supply section, a power supply controlling section connected to the power supply section, a starter switch being switched selectively to a first status and a second status, a o power switch being switched selectively to a first status and a second status, a controlling section connected to the power switch, and a function section operable to execute a predetermined operation. The power supply controlling section causes a power to be supplied from the power supply section to the controlling section when at least one of the power switch and the starter switch is in the first status. This power supply controller does not malfunction even when the starter switch malfunctions, thus preventing wasteful consumption of the power supply section.
    Type: Application
    Filed: September 1, 2010
    Publication date: May 10, 2012
    Inventors: Hiroki Kaihori, Michiaki Tsuneoka, Eiji Miyake
  • Publication number: 20110298597
    Abstract: A wireless sensor system includes a wireless sensor, a wireless device, and a magnetic field generator connected to the wireless device. The wireless sensor includes an ambience sensor that detects status of an ambient environment to output ambient data depending on the detected status of the ambient environment, a magnetic sensor that senses a magnetic field, a radio-frequency (RF) transmitter that sends the ambient data to the wireless device using a radio wave, and a first controller that is connected to the ambience sensor, the magnetic sensor, and the RF transmitter. The wireless device includes an RF receiver that receives the radio wave sent from the RF transmitter; and a second controller that is connected to the RF receiver and that outputs a control signal for controlling the first controller. The magnetic field generator includes a coil for sending the control signal to the magnetic sensor using a magnetic field.
    Type: Application
    Filed: June 1, 2011
    Publication date: December 8, 2011
    Applicant: Panasonic Corporation
    Inventors: Hiroki KAIHORI, Eiji Miyake, Michiaki Tsuneoka
  • Patent number: 7792496
    Abstract: A transmitter receiver unit of the present invention comprises a phase shifter connected between a transistor and a filter multiplexer for decreasing a reactance component of an impedance, as observed from the transistor toward the filter multiplexer, to a value close to zero in a third frequency band given as the sum or difference between the integer multiples of a second frequency band and a first frequency band. This structure decreases the impedance in the third frequency band of the filter multiplexer side as observed from the transistor, thereby making the transistor not liable to generate a signal voltage of the third frequency band.
    Type: Grant
    Filed: September 13, 2007
    Date of Patent: September 7, 2010
    Assignee: Panasonic Corporation
    Inventors: Joji Fujiwara, Michiaki Tsuneoka
  • Patent number: 7659604
    Abstract: A module component in which mounting components and a conductive partition for dividing into a plurality of circuit blocks are mounted on a substrate. The circuit blocks are covered with a sealing member, which is further covered on its surface with a conductive film to electrically shield the circuit blocks individually. This module component can maintain bending strength, with little warpage by a sufficient shielding effect achieved without increasing the number of manufacturing processes.
    Type: Grant
    Filed: March 17, 2005
    Date of Patent: February 9, 2010
    Assignee: Panasonic Corporation
    Inventors: Joji Fujiwara, Tsuyoshi Himori, Michiaki Tsuneoka
  • Patent number: 7595703
    Abstract: A balun is provided in which first balanced line and second balanced line are disposed on a nearly the same plane, first unbalanced line is disposed above first balanced line at a predetermined distance from first balanced line, second unbalanced line is disposed below second balanced line at the predetermined distance from second balanced line. With this configuration, the distance between first unbalanced line and second unbalanced line can be increased thereby greatly suppressing mutual cancellation of a current flowing in first unbalanced line and a current flowing in second unbalanced line.
    Type: Grant
    Filed: January 24, 2007
    Date of Patent: September 29, 2009
    Assignee: Panasonic Corporation
    Inventors: Joji Fujiwara, Michiaki Tsuneoka
  • Publication number: 20090079512
    Abstract: A balun is provided in which first balanced line and second balanced line are disposed on a nearly the same plane, first unbalanced line is disposed above first balanced line at a predetermined distance from first balanced line, second unbalanced line is disposed below second balanced line at the predetermined distance from second balanced line. With this configuration, the distance between first unbalanced line and second unbalanced line can be increased thereby greatly suppressing mutual cancellation of a current flowing in first unbalanced line and a current flowing in second unbalanced line.
    Type: Application
    Filed: January 24, 2007
    Publication date: March 26, 2009
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Joji Fujiwara, Michiaki Tsuneoka
  • Publication number: 20090008134
    Abstract: A module includes a first multilayer wiring board, a second multilayer wiring board having an upper surface facing a lower surface of the first multilayer wiring board, a component mounted on an upper surface of the first multilayer wiring board, a first terminal electrode provided on the lower surface of the first multilayer wiring board, a second terminal electrode provided on the upper surface of the second multilayer wiring board and connected to the first terminal electrode, and a terminal electrode provided on a lower surface of the second multilayer wiring board. This module is manufactured at a preferable yield rate.
    Type: Application
    Filed: August 24, 2006
    Publication date: January 8, 2009
    Inventors: Michiaki Tsuneoka, Joji Fujiwara
  • Publication number: 20080070511
    Abstract: A transmitter receiver unit of the present invention comprises a phase shifter connected between a transistor and a filter multiplexer for decreasing a reactance component of an impedance, as observed from the transistor toward the filter multiplexer, to a value close to zero in a third frequency band given as the sum or difference between the integer multiples of a second frequency band and a first frequency band. This structure decreases the impedance in the third frequency band of the filter multiplexer side as observed from the transistor, thereby making the transistor not liable to generate a signal voltage of the third frequency band.
    Type: Application
    Filed: September 13, 2007
    Publication date: March 20, 2008
    Inventors: Joji Fujiwara, Michiaki Tsuneoka
  • Patent number: 7187071
    Abstract: A composite electronic component having a multi-layer wiring board, a first power terminal electrode, a second power terminal electrode, an external connection power supply terminal, a surface-mounted component, an insulator, and a power supply pattern. The first and the second power terminal electrodes are disposed on a first face of the multi-layer wiring board. The external connection power supply terminal is disposed on a second face opposite to the first face of the multi-layer wiring board and connected with the first power terminal electrode. The surface-mounted component is mounted on the first face of the multi-layer wiring board and connected with the first and the second power terminal electrodes at a first face thereof. The insulator covers at least a second face opposite to the first face of the surface-mounted component, the first power terminal electrode, and the second power terminal electrode with a first face thereof.
    Type: Grant
    Filed: April 28, 2005
    Date of Patent: March 6, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Michiaki Tsuneoka, Yasuhiro Sugaya, Masaaki Katsumata, Joji Fujiwara
  • Patent number: 7180012
    Abstract: A module component with a good shield effect and a low height including a circuit board having mounted thereon a mount device including an electronic part. The device is sealed with a sealing body having a metal film formed on the sealing body surface. A ground pattern is formed at the outer periphery of the principal surface of the circuit board. The metal film is conductively connected with the ground pattern.
    Type: Grant
    Filed: August 25, 2003
    Date of Patent: February 20, 2007
    Assignee: Mitsushita Electric Industrial Co., Ltd.
    Inventors: Michiaki Tsuneoka, Koji Hashimoto, Masaaki Hayama, Takeo Yasuho
  • Patent number: 7161252
    Abstract: A module includes a component, a circuit board having the component mounted thereon, a first grounding pattern formed on an outermost periphery of a surface portion of the circuit board; a first sealer provided on the circuit board and having a dimension projected on the circuit board, and a metal film covering the sealer and connected to the grounding pattern. The dimension of the first dealer is smaller than an outside dimension of the circuit board. The first sealer is made of first resin and sealing the component. The module has a low profile and is adequately shielded.
    Type: Grant
    Filed: June 16, 2003
    Date of Patent: January 9, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Michiaki Tsuneoka, Koji Hashimoto, Masaaki Hayama, Takeo Yasuho
  • Publication number: 20060258050
    Abstract: A module component in which mounting components and a conductive partition for dividing into a plurality of circuit blocks are mounted on a substrate. The circuit blocks are covered with a sealing member, which is further covered on its surface with a conductive film to electrically shield the circuit blocks individually. This module component can maintain bending strength, with little warpage by a sufficient shielding effect achieved without increasing the number of manufacturing processes.
    Type: Application
    Filed: March 17, 2005
    Publication date: November 16, 2006
    Inventors: Joji Fujiwara, Tsuyoshi Himori, Michiaki Tsuneoka
  • Publication number: 20060244123
    Abstract: A composite electronic component having a multi-layer wiring board, a first power terminal electrode, a second power terminal electrode, an external connection power supply terminal, a surface-mounted component, an insulator, and a power supply pattern. The first and the second power terminal electrodes are disposed on a first face of the multi-layer wiring board. The external connection power supply terminal is disposed on a second face opposite to the first face of the multi-layer wiring board and connected with the first power terminal electrode. The surface-mounted component is mounted on the first face of the multi-layer wiring board and connected with the first and the second power terminal electrodes at a first face thereof. The insulator covers at least a second face opposite to the first face of the surface-mounted component, the first power terminal electrode, and the second power terminal electrode with a first face thereof.
    Type: Application
    Filed: April 28, 2005
    Publication date: November 2, 2006
    Inventors: Michiaki Tsuneoka, Yasuhiro Sugaya, Masaaki Katsumata, Joji Fujiwara
  • Publication number: 20040252475
    Abstract: A module component is provided having a sufficient shield effect and fabricated low in height.
    Type: Application
    Filed: April 23, 2004
    Publication date: December 16, 2004
    Inventors: Michiaki Tsuneoka, Koji Hahsimoto, Masaaki Hayama, Takeo Yasuho
  • Publication number: 20040232452
    Abstract: A module includes a component, a circuit board having the component mounted thereon, a first grounding pattern formed on an outermost periphery of a surface portion of the circuit board; a first sealer provided on the circuit board and having a dimension projected on the circuit board, and a metal film covering the sealer and connected to the grounding pattern. The dimension of the first dealer is smaller than an outside dimension of the circuit board. The first sealer is made of first resin and sealing the component. The module has a low profile and is adequately shielded.
    Type: Application
    Filed: February 2, 2004
    Publication date: November 25, 2004
    Inventors: Michiaki Tsuneoka, Koji Hashimoto, Masaaki Hayama, Takeo Yasuho
  • Patent number: 6768383
    Abstract: A bias circuit is provided for attenuating harmonic distortions of a signal having a simple construction and which can be applied to a high-frequency amplifier used in a communication device, such as a mobile telephone. The circuit reduces a voltage drop therein and thus provides a high-frequency amplifier having reduced power consumption and an increased operating efficiency. The high-frequency amplifier includes an amplifier circuit, an output matching circuit, and the bias circuit. In the bias circuit, a parallel circuit including a first transmission line and a first capacitor has one end connected between the amplifier and the output matching circuit. The other end of the parallel circuit is connected to a power source and is grounded via a second capacitor. In the circuit, the bias circuit can be short-circuited in a desired frequency band while being an open circuit in a frequency band of a signal to be amplified, hence attenuating the harmonic distortions without using a low pass filter.
    Type: Grant
    Filed: December 4, 2002
    Date of Patent: July 27, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hiroshi Kushitani, Hisayoshi Kato, Michiaki Tsuneoka
  • Publication number: 20040027204
    Abstract: A bias circuit is provided for attenuating harmonic distortions of a signal having a simple construction and which can be applied to a high-frequency amplifier used in a communication device, such as a mobile telephone. The circuit reduces a voltage drop therein and thus provides a high-frequency amplifier having reduced power consumption and an increased operating efficiency. The high-frequency amplifier includes an amplifier circuit, an output matching circuit, and the bias circuit. In the bias circuit, a parallel circuit including a first transmission line and a first capacitor has one end connected between the amplifier and the output matching circuit. The other end of the parallel circuit is connected to a power source and is grounded via a second capacitor. In the circuit, the bias circuit can be short-circuited in a desired frequency band while being an open circuit in a frequency band of a signal to be amplified, hence attenuating the harmonic distortions without using a low pass filter.
    Type: Application
    Filed: December 4, 2002
    Publication date: February 12, 2004
    Inventors: Hiroshi Kushitani, Hisayoshi Kato, Michiaki Tsuneoka
  • Patent number: 6472952
    Abstract: A high frequency wireless circuit apparatus is formed by connecting a phase shifter between an antenna duplexer and a low noise amplifier, so that the impedance of the receiving terminal of the antenna duplexer at a transmission frequency and the input impedance of the low noise amplifier may not be matched in complex conjugates of each other. Therefore it prevents the transmission output passing through the receiving terminal of the antenna duplexer and the interference signal entered through the antenna from making the cross modulation in the low noise amplifier. Thus it improves the reception sensitivity and immunity to interference signals of the high frequency wireless circuit apparatus at the same time.
    Type: Grant
    Filed: September 5, 2000
    Date of Patent: October 29, 2002
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Yukio Sakai, Kazuhiro Yahata, Michiaki Tsuneoka
  • Patent number: 5210504
    Abstract: A semiconductor device for a tuner capable of simultaneously satisfying a low noise factor, low third order distortion characteristics and low power consumption, and a tuner using this semiconductor device for a tuner and capable of reducing the size and eliminating labor during assembly. The semiconductor device is a variable gain amplification circuit comprising a gate grounded circuit using a transistor, and a differential amplification circuit including transistors and constant current sources. Transistors are used as variable resistance devices, and the gain of the gate grounded circuit can be varied by changing the gate voltage of a transistor. The gain of the differential amplification circuit can be varied by changing the gate voltage of another transistor. The overall gain of the circuit can be varied within a necessary range by simultaneously operating these gain controls, and the third order distortion can be improved monotonously with the decrease of the gain.
    Type: Grant
    Filed: March 16, 1992
    Date of Patent: May 11, 1993
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hideki Yagita, Tadayoshi Nakatsuka, Taketo Kunihisa, Michiaki Tsuneoka, Yukio Sakai, Kazuhiro Yahata