Patents by Inventor Mihaela A. Balseanu

Mihaela A. Balseanu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170263438
    Abstract: Methods for forming a spacer comprising depositing a film on the top, bottom and sidewalls of a feature and treating the film to change a property of the film on the top and bottom of the feature. Selectively dry etching the film from the top and bottom of the feature relative to the film on the sidewalls of the feature using a high intensity plasma.
    Type: Application
    Filed: March 10, 2017
    Publication date: September 14, 2017
    Inventors: Ning Li, Mihaela Balseanu, Li-Qun Xia, Dongqing Yang, Anchuan Wang
  • Publication number: 20170263437
    Abstract: Methods for forming a spacer comprising depositing a film on the top, bottom and sidewalls of a feature and treating the film to change a property of the film on the top and bottom of the feature so that the film can be selectively etched from the top and bottom of the feature relative to the film on the sidewalls of the feature.
    Type: Application
    Filed: March 10, 2017
    Publication date: September 14, 2017
    Inventors: Ning Li, Mihaela Balseanu, Li-Qun Xia
  • Patent number: 9748093
    Abstract: Aspects of the disclosure pertain to methods of forming conformal liners on patterned substrates having high height-to-width aspect ratio gaps. Layers formed according to embodiments outlined herein have been found to inhibit diffusion and electrical leakage across the conformal liners. The liners may comprise nitrogen and be described as nitride layers according to embodiments. The conformal liners may comprise silicon and nitrogen and may consist of silicon and nitrogen in embodiments. Methods described herein may comprise introducing a silicon-containing precursor and a nitrogen-containing precursor into a substrate processing region and concurrently applying a pulsed plasma power capacitively to the substrate processing region to form the conformal layer.
    Type: Grant
    Filed: March 16, 2016
    Date of Patent: August 29, 2017
    Assignee: Applied Materials, Inc.
    Inventors: Patrick James Reilly, David Alan Bethke, Mihaela Balseanu
  • Patent number: 9633861
    Abstract: Embodiments of the present invention provide processes to selectively form a metal layer on a conductive surface, followed by flowing a silicon based compound over the metal layer to form a metal silicide layer. In one embodiment, a substrate having a conductive surface and a dielectric surface is provided. A metal layer is then deposited on the conductive surface. A metal silicide layer is formed as a result of flowing a silicon based compound over the metal layer. A dielectric is formed over the metal silicide layer.
    Type: Grant
    Filed: February 13, 2014
    Date of Patent: April 25, 2017
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Weifeng Ye, Mei-yee Shek, Mihaela Balseanu, Xiaojun Zhang, Xiaolan Ba, Yu Jin, Li-Qun Xia
  • Publication number: 20170053792
    Abstract: Methods for the deposition of SiN films comprising sequential exposure of a substrate surface to a silicon halide precursor at a temperature greater than or equal to about 600° C. and a nitrogen-containing reactant.
    Type: Application
    Filed: August 16, 2016
    Publication date: February 23, 2017
    Inventors: Xinliang Lu, Pingyan Lei, Chien-Teh Kao, Mihaela Balseanu, Li-Qun Xia, Mandyam Sriram
  • Patent number: 9564582
    Abstract: A method for fabricating an MRAM bit that includes depositing a spacer layer that protects the tunneling barrier layer during processing is disclosed. The deposited spacer layer prevents byproducts formed in later processing from redepositing on the tunneling barrier layer. Such redeposition may lead to product failure and decreased manufacturing yield. The method further includes non-corrosive processing conditions that prevent damage to the layers of MRAM bits. The non-corrosive processing conditions may include etching without using a halogen-based plasma. Embodiments disclosed herein use an etch-deposition-etch sequence that simplifies processing.
    Type: Grant
    Filed: March 7, 2014
    Date of Patent: February 7, 2017
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Mahendra Pakala, Mihaela Balseanu, Jonathan Germain, Jaesoo Ahn, Lin Xue
  • Publication number: 20160322214
    Abstract: Methods for the formation of SiCN, SiCO and SiCON films comprising cyclical exposure of a substrate surface to a silicon-containing gas, a carbon-containing gas and a plasma. Some embodiments further comprise the addition of an oxidizing agent prior to at least the plasma exposure.
    Type: Application
    Filed: April 29, 2016
    Publication date: November 3, 2016
    Inventors: Ning Li, Mark Saly, David Thompson, Mihaela Balseanu, Li-Qun Xia
  • Publication number: 20160284567
    Abstract: Aspects of the disclosure pertain to methods of forming conformal liners on patterned substrates having high height-to-width aspect ratio gaps. Layers formed according to embodiments outlined herein have been found to inhibit diffusion and electrical leakage across the conformal liners. The liners may comprise nitrogen and be described as nitride layers according to embodiments. The conformal liners may comprise silicon and nitrogen and may consist of silicon and nitrogen in embodiments. Methods described herein may comprise introducing a silicon-containing precursor and a nitrogen-containing precursor into a substrate processing region and concurrently applying a pulsed plasma power capacitively to the substrate processing region to form the conformal layer.
    Type: Application
    Filed: March 16, 2016
    Publication date: September 29, 2016
    Applicant: Applied Materials, Inc.
    Inventors: Patrick James Reilly, David Alan Bethke, Mihaela Balseanu
  • Publication number: 20160099143
    Abstract: Processes for depositing SiO2 films on a wafer surface utilizing an aminosilane compound as a silicon precursor are described.
    Type: Application
    Filed: October 1, 2015
    Publication date: April 7, 2016
    Inventors: Wenbo Yan, Cong Trinh, Ning Li, Victor Nguyen, Mihaela Balseanu, Li-Qun Xia, Mark Saly
  • Patent number: 9297073
    Abstract: Embodiments disclosed herein generally relate to the processing of substrates, and more particularly, relate to methods for accurate control of film thickness using deposition-etch cycles. Particularly, embodiments of the present disclosure may be used in controlling film thickness during filling high aspect ratio features.
    Type: Grant
    Filed: February 19, 2015
    Date of Patent: March 29, 2016
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Ning Li, Wenbo Yan, Victor Nguyen, Cong Trinh, Mihaela Balseanu, Li-Qun Xia
  • Publication number: 20160013049
    Abstract: Embodiments of the present invention generally relate to a method for forming a dielectric barrier layer. The dielectric barrier layer is deposited over a substrate by a plasma enhanced deposition process. In one embodiment, a gas mixture is introduced into a processing chamber. The gas mixture includes a silicon-containing gas, a nitrogen-containing gas, a boron-containing gas, and argon (Ar) gas.
    Type: Application
    Filed: February 18, 2014
    Publication date: January 14, 2016
    Applicant: APPLIED MATERIALS, INC.
    Inventors: Weifeng YE, Mei-yee SHEK, Mihaela BALSEANU, Xiaojun ZHANG, Xiaolan BA, Yu JIN, Li-Qun XIA
  • Publication number: 20150299856
    Abstract: Embodiments disclosed herein generally relate to the processing of substrates, and more particularly, relate to methods for accurate control of film thickness using deposition-etch cycles. Particularly, embodiments of the present disclosure may be used in controlling film thickness during filling high aspect ratio features.
    Type: Application
    Filed: February 19, 2015
    Publication date: October 22, 2015
    Applicant: APPLIED MATERIALS, INC.
    Inventors: Ning LI, Wenbo YAN, Victor NGUYEN, Cong TRINH, Mihaela BALSEANU, Li-Qun XIA
  • Publication number: 20150252477
    Abstract: Embodiments disclosed herein generally relate to the processing of substrates, and more particularly, relate to methods for forming a dielectric film. In one embodiment, the method includes placing a plurality of substrates inside a processing chamber and performing a sequence of exposing the substrates to a first reactive gas comprising silicon, and then exposing the substrates to a plasma of a second reactive gas comprising nitrogen and at least one of oxygen or carbon, and repeating the sequence to form the dielectric film comprising silicon carbon nitride or silicon carbon oxynitride on each of the substrates.
    Type: Application
    Filed: February 6, 2015
    Publication date: September 10, 2015
    Inventors: Victor NGUYEN, Mihaela BALSEANU, Ning LI, Steven D. MARCUS, Mark SALY, David THOMPSON, Li-Qun XIA
  • Publication number: 20150255324
    Abstract: Embodiments disclosed herein generally relate to forming dielectric materials in high aspect ratio features. In one embodiment, a method for filling high aspect ratio trenches in one processing chamber is disclosed. The method includes placing a substrate inside a processing chamber, where the substrate has a surface having a plurality of high aspect ratio trenches and the surface is facing a gas/plasma distribution assembly. The method further includes performing a sequence of depositing a layer of dielectric material on the surface of the substrate and inside each of the plurality of trenches, where the layer of dielectric material is on a bottom and side walls of each trench, and removing a portion of the layer of dielectric material disposed on the surface of the substrate, where an opening of each trench is widened. The sequence repeats until the trenches are filled seamlessly with the dielectric material.
    Type: Application
    Filed: February 25, 2015
    Publication date: September 10, 2015
    Inventors: Ning LI, Victor NGUYEN, Mihaela BALSEANU, Li-Qun XIA, Steven D. MARCUS, Haichun YANG, Keiichi TANAKA
  • Publication number: 20150255507
    Abstract: A method for fabricating an MRAM bit that includes depositing a spacer layer that protects the tunneling barrier layer during processing is disclosed. The deposited spacer layer prevents byproducts formed in later processing from redepositing on the tunneling barrier layer. Such redeposition may lead to product failure and decreased manufacturing yield. The method further includes non-corrosive processing conditions that prevent damage to the layers of MRAM bits. The non-corrosive processing conditions may include etching without using a halogen-based plasma. Embodiments disclosed herein use an etch-deposition-etch sequence that simplifies processing.
    Type: Application
    Filed: March 7, 2014
    Publication date: September 10, 2015
    Inventors: Mahendra PAKALA, Mihaela BALSEANU, Jonathan GERMAIN, Jaesoo AHN, Lin XUE
  • Publication number: 20150200110
    Abstract: Provided are self-aligned double patterning methods including feature trimming. The SADP process is performed in a single batch processing chamber in which the substrate is laterally moved between sections of the processing chamber separated by gas curtains so that each section independently has a process condition.
    Type: Application
    Filed: January 13, 2015
    Publication date: July 16, 2015
    Inventors: Ning Li, Victor Nguyen, Mihaela Balseanu, Li-Qun Xia, Keiichi Tanaka, Steven D. Marcus
  • Publication number: 20150147484
    Abstract: Provided are methods for the deposition of films comprising SiCN. Certain methods involve exposing a substrate surface to a silicon precursor, wherein the silicon precursor is halogenated with Cl, Br or I, and the silicon precursor comprises a halogenated silane, a halogenated carbosilane, an halogenated aminosilane or a halogenated carbo-sillyl amine. Then, the substrate surface can be exposed to a nitrogen-containing plasma or a nitrogen precursor and densification plasma.
    Type: Application
    Filed: November 5, 2014
    Publication date: May 28, 2015
    Inventors: Victor Nguyen, Ning Li, Mihaela Balseanu, Li-Qun Xia, Mark Saly, David Thompson
  • Publication number: 20140273524
    Abstract: Provided are methods for the deposition and doping of films comprising Si. Certain methods involve depositing a SiN, SiO, SiON, SiC or SiCN film and doping the Si-containing film with one or more of C, B, O, N and Ge by a plasma implantation process. Such doped Si-containing films may have improved properties such as reduced etch rate in acid-based clean solutions, reduced dielectric constant and/or improved dielectric strength.
    Type: Application
    Filed: March 11, 2014
    Publication date: September 18, 2014
    Inventors: Victor Nguyen, Mihaela Balseanu, Li-Qun Xia, Ning Li, Martin A. Hilkene, Matthew D. Scotney-Castle
  • Publication number: 20140273516
    Abstract: Methods for the repair of damaged low k films are provided. In one embodiment, the method comprises providing a substrate having a low k dielectric film deposited thereon, and exposing a surface of the low k dielectric film to an activated carbon-containing precursor gas to form a conformal carbon-containing film on the surface of the low k dielectric film, wherein the carbon-containing precursor gas has at least one or more Si—N—Si linkages in the molecular structure.
    Type: Application
    Filed: February 5, 2014
    Publication date: September 18, 2014
    Inventors: Li-Qun XIA, Weifeng YE, Xiaojun ZHANG, Mei-yee SHEK, Mihaela BALSEANU, Victor NGUYEN, Derek R. WITTY
  • Publication number: 20140273438
    Abstract: Embodiments of the present invention provide processes to selectively form a metal layer on a conductive surface, followed by flowing a silicon based compound over the metal layer to form a metal silicide layer. In one embodiment, a substrate having a conductive surface and a dielectric surface is provided. A metal layer is then deposited on the conductive surface. A metal silicide layer is formed as a result of flowing a silicon based compound over the metal layer. A dielectric is formed over the metal silicide layer.
    Type: Application
    Filed: February 13, 2014
    Publication date: September 18, 2014
    Inventors: Weifeng YE, Mei-yee Shek, Mihaela Balseanu, Xiaojun Zhang, Xiaolan Ba, Yu Jin, Li-Qun Xia