Abstract: Provided are methods of for deposition of SiN films via PEALD processes. Certain methods pertain to exposing a substrate surface to a silicon precursor to provide a silicon precursor at the substrate surface; purging excess silicon precursor; exposing the substrate surface to an ionized reducing agent; and purging excess ionized reducing agent to provide a film comprising SiN, wherein the substrate has a temperature of 23° C. to about 550° C.

Abstract: Provided are methods post deposition treatment of films comprising SiN. Certain methods pertain to providing a film comprising SiN; and exposing the film to an inductively coupled plasma, capacitively coupled plasma or a microwave plasma to provide a treated film with a modulated film stress and/or wet etch rate in dilute HF. Certain other methods comprise depositing a PEALD SiN film followed by exposure to a plasma nitridation process or a UV treatment to provide a treated film.

Abstract: A method for the removal of copper oxide from a copper and dielectric containing structure of a semiconductor chip is provided. The copper and dielectric containing structure may be planarized by chemical mechanical planarization (CMP) and treated by the method to remove copper oxide and CMP residues. Annealing in a hydrogen (H2) gas and ultraviolet (UV) environment removes copper oxide, and a pulsed ammonia plasma removes CMP residues.

Abstract: High tensile stress in a deposited layer, such as a silicon nitride layer, may be achieved utilizing one or more techniques employed either alone or in combination. In one embodiment, a silicon nitride film having high tensile stress may be formed by depositing the silicon nitride film in the presence of a porogen. The deposited silicon nitride film may be exposed to at least one treatment selected from a plasma or ultraviolet radiation to liberate the porogen. The silicon nitride film may be densified such that a pore resulting from liberation of the porogen is reduced in size, and Si—N bonds in the silicon nitride film are strained to impart a tensile stress in the silicon nitride film. In another embodiment, tensile stress in a silicon nitride film may be enhanced by depositing a silicon nitride film in the presence of a nitrogen-containing plasma at a temperature of less than about 400° C., and exposing the deposited silicon nitride film to ultraviolet radiation.

Abstract: Provided are methods and apparatus for low temperature atomic layer deposition of a densified film. A low temperature film is formed and densified by exposure to one or more of a plasma or radical species. The resulting densified film has superior properties to low temperature films formed without densification.

Abstract: A layer of silicon nitride having a thickness from 0.5 nanometers to 2.4 nanometers is deposited on a substrate. A plasma nitridation process is carried out on the layer. These steps are repeated for a plurality of additional layers of silicon nitride, until a predetermined thickness is attained. Such steps can be used to provide a multilayer silicon nitride dielectric formed on a substrate having an upper surface of dielectric material with Cu and other conductors embedded within, and a plurality of steps. The multilayer silicon nitride dielectric has a plurality of individual layers each having a thickness from 0.5 nanometers to 2.4 nanometers, and the multilayer silicon nitride dielectric conformally covers the steps of the substrate with a conformality of at least seventy percent. A multilayer silicon nitride dielectric, and a multilevel back end of line interconnect wiring structure using same, are also provided.

Abstract: In a method of depositing a crystalline germanium layer on a substrate, a substrate is placed in the process zone comprising a pair of process electrodes. In a deposition stage, a crystalline germanium layer is deposited on the substrate by introducing a deposition gas comprising a germanium-containing gas into the process zone, and forming a capacitively coupled plasma of the deposition gas by coupling energy to the process electrodes. In a subsequent treatment stage, the deposited crystalline germanium layer is treated by exposing the crystalline germanium layer to an energized treatment gas or by annealing the layer.

Abstract: Methods and apparatus for forming conformal silicon nitride films at low temperatures on a substrate are provided. The methods of forming a silicon nitride layer include performing a deposition cycle including flowing a processing gas mixture into a processing chamber having a substrate therein, wherein the processing gas mixture comprises precursor gas molecules having labile silicon to nitrogen, silicon to carbon, or nitrogen to carbon bonds, activating the precursor gas at a temperature between about 20° C. to about 480° C. by preferentially breaking labile bonds to provide one or more reaction sites along a precursor gas molecule, forming a precursor material layer on the substrate, wherein the activated precursor gas molecules bond with a surface on the substrate at the one or more reaction sites, and performing a plasma treatment process on the precursor material layer to form a conformal silicon nitride layer.

Abstract: Methods of depositing boron-containing liner layers on substrates involve the formation of a bilayer including an initiation layer which includes barrier material to inhibit the diffusion of boron from the bilayer into the underlying substrate.

Abstract: The present disclosure provides a multilayered cap (i.e., migration barrier) that conforms to the substrate (i.e., interconnect structure) below. The multilayered cap, which can be located atop at least one interconnect level of an interconnect structure, includes, from bottom to top, a first layer comprising silicon nitride and a second layer comprising at least one of boron nitride and carbon boron nitride.

Abstract: A methods of forming a flash memory device are provided. The flash memory device comprises a silicon dioxide layer on a substrate and a silicon nitride layer that is formed on the silicon dioxide layer. The properties of the silicon nitride layer can be modified by any of: exposing the silicon nitride layer to ultraviolet radiation, exposing the silicon nitride layer to an electron beam, and by plasma treating the silicon nitride layer. A dielectric material is deposited on the silicon nitride layer and a conductive date is formed over the dielectric material. The flash memory device with modified silicon nitride layer provides an increase in charge holding capacity and charge retention time of the unit cell of a non-volatile memory device.

Abstract: A method for forming an integrated circuit is provided. In one embodiment, the method includes forming a stop layer comprising carbon doped silicon nitride on a gate region on a substrate, the gate region having a poly gate and one or more spacers formed adjacent the poly gate, forming a dielectric layer on the stop layer, and removing a portion of the dielectric layer above the gate region using a CMP process, wherein the stop layer is a strain inducing layer having a CMP removal rate that is less than the CMP removal rate of the dielectric layer and equal to or less than the CMP removal rate of the one or more spacers.

Abstract: The present disclosure provides a multilayered cap (i.e., migration barrier) that conforms to the substrate (i.e., interconnect structure) below. The multilayered cap, which can be located atop at least one interconnect level of an interconnect structure, includes, from bottom to top, a first layer comprising silicon nitride and a second layer comprising at least one of boron nitride and carbon boron nitride.

Abstract: Methods and apparatus for forming conformal silicon nitride films at low temperatures on a substrate are provided. The methods of forming a silicon nitride layer include performing a deposition cycle including flowing a processing gas mixture into a processing chamber having a substrate therein, wherein the processing gas mixture comprises precursor gas molecules having labile silicon to nitrogen, silicon to carbon, or nitrogen to carbon bonds, activating the precursor gas at a temperature between about 20° C. to about 480° C. by preferentially breaking labile bonds to provide one or more reaction sites along a precursor gas molecule, forming a precursor material layer on the substrate, wherein the activated precursor gas molecules bond with a surface on the substrate at the one or more reaction sites, and performing a plasma treatment process on the precursor material layer to form a conformal silicon nitride layer.

Abstract: The present disclosure provides a multilayered cap (i.e., migration barrier) that conforms to the substrate (i.e., interconnect structure) below. The multilayered cap, which can be located atop at least one interconnect level of an interconnect structure, includes, from bottom to top, a first layer comprising silicon nitride and a second layer comprising at least one of boron nitride and carbon boron nitride.

Abstract: Methods for processing a substrate with a boron rich film are provided. A patterned layer of boron rich material is deposited on a substrate and can be used as an etch stop. By varying the chemical composition, the selectivity and etch rate of the boron rich material can be optimized for different etch chemistries. The boron rich materials can be deposited over a layer stack substrate in multiple layers and etched in a pattern. The exposed layer stack can then be etched with multiple etch chemistries. Each of the boron rich layers can have a different chemical composition that is optimized for the multiple etch chemistries.

Abstract: A method for the removal of copper oxide from a copper and dielectric containing structure of a semiconductor chip is provided. The copper and dielectric containing structure may be planarized by chemical mechanical planarization (CMP) and treated by the method to remove copper oxide and CMP residues. Annealing in a hydrogen (H2) gas and ultraviolet (UV) environment removes copper oxide, and a pulsed ammonia plasma removes CMP residues.

Abstract: The present disclosure provides a multilayered cap (i.e., migration barrier) that conforms to the substrate (i.e., interconnect structure) below. The multilayered cap, which can be located atop at least one interconnect level of an interconnect structure, includes, from bottom to top, a first layer comprising silicon nitride and a second layer comprising at least one of boron nitride and carbon boron nitride.

Abstract: A flash memory device and methods of forming a flash memory device are provided. The flash memory device includes a doped silicon nitride layer having a dopant comprising carbon, boron or oxygen. The doped silicon nitride layer generates a higher number and higher concentration of nitrogen and silicon dangling bonds in the layer and provides an increase in charge holding capacity and charge retention time of the unit cell of a non-volatile memory device.

Abstract: High tensile stress in a deposited layer, such as a silicon nitride layer, may be achieved utilizing one or more techniques employed either alone or in combination. In one embodiment, a silicon nitride film having high tensile stress may be formed by depositing the silicon nitride film in the presence of a porogen. The deposited silicon nitride film may be exposed to at least one treatment selected from a plasma or ultraviolet radiation to liberate the porogen. The silicon nitride film may be densified such that a pore resulting from liberation of the porogen is reduced in size, and Si—N bonds in the silicon nitride film are strained to impart a tensile stress in the silicon nitride film. In another embodiment, tensile stress in a silicon nitride film may be enhanced by depositing a silicon nitride film in the presence of a nitrogen-containing plasma at a temperature of less than about 400° C., and exposing the deposited silicon nitride film to ultraviolet radiation.