Patents by Inventor Miharu Otani
Miharu Otani has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20100259708Abstract: Provided is a liquid crystal display device including: a liquid crystal cell (15) including a first substrate (110), a second substrate (111), and a liquid crystal layer (160) sealed between the first substrate and the second substrate; a first polarization member (210) for transmitting light in a predetermined polarization direction; and a second polarization member (220) for transmitting light in another polarization direction which is orthogonal to the predetermined polarization direction. At least one of the first polarization member and the second polarization member includes a multilayer thin film polarizer including a plurality of thin film polarizers which are stacked so that transmission axes of the plurality of thin film polarizers are aligned. The multilayer thin film polarizer includes a thin film polarizer formed in a predetermined film thickness by coating with dye molecules which are aligned by a shear stress.Type: ApplicationFiled: April 13, 2010Publication date: October 14, 2010Inventors: Takato HIRATSUKA, Masaya Adachi, Miharu Otani, Jun Tanaka, Chie Yoshizawa
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Publication number: 20100252933Abstract: As etch-stop films or Cu-diffusion barrier films used in insulation films constituting conductor layers of a stacked structure, films having smaller dielectric constant than silicon nitride films are used, and an insulation film at a lower-layer part of the stacked structure is made to have smaller dielectric constant than that at an upper-layer part thereof, and further this insulation film is a silicon oxide (SiO) film and has, in the interior thereof, nano-pores of from 0.05 nm or more to 4 nm or less in diameter as chief construction. This makes it possible to dramatically reduce effective dielectric constant while keeping the mechanical strength of the conductor layers themselves, and can materialize a highly reliable and high-performance semiconductor device having mitigated the wiring delay of signals which pass through wirings.Type: ApplicationFiled: June 15, 2010Publication date: October 7, 2010Applicant: RENESAS TECHNOLOGY CORPORATIONInventors: Jun Tanaka, Miharu Otani, Kiyoshi Ogata, Yasumichi Suzuki, Katsuhiko Hotta
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Patent number: 7772700Abstract: As etch-stop films or Cu-diffusion barrier films used in insulation films constituting conductor layers of a stacked structure, films having smaller dielectric constant than silicon nitride films are used, and an insulation film at a lower-layer part of the stacked structure is made to have smaller dielectric constant than that at an upper-layer part thereof, and further this insulation film is a silicon oxide (SiO) film and has, in the interior thereof, nano-pores of from 0.05 nm or more to 4 nm or less in diameter as chief construction. This makes it possible to dramatically reduce effective dielectric constant while keeping the mechanical strength of the conductore layers themselves, and can materialize a highly reliable and high-performance semiconductor device having mitigated the wiring delay of signals which pass through wirings.Type: GrantFiled: August 26, 2005Date of Patent: August 10, 2010Assignee: Renesas Technology Corp.Inventors: Jun Tanaka, Miharu Otani, Kiyoshi Ogata, Yasumichi Suzuki, Katsuhiko Hotta
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Publication number: 20100002173Abstract: An object of the present invention is to increase the dichroic ratio of the built-in polarizing layer in reflective regions so that the display performance improves in a semi-transmission type liquid crystal display device having a transmissive display portion and a reflective display portion.Type: ApplicationFiled: July 2, 2009Publication date: January 7, 2010Inventors: Miharu OTANI, Jun TANAKA, Kazuhito MASUDA, Masaya ADACHI, Takato HIRATSUKA
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Publication number: 20090225260Abstract: An object of the present invention is to implement a bright liquid crystal display device having a high contrast ratio and a wide viewing angle. A liquid crystal display device according to the present invention has: a number of data lines; gate lines formed so as to cross the number of data lines; a number of switching elements formed in locations where the number of data lines and the number of gate lines cross; a reflection area and a transmission area formed within each pixel; a liquid crystal layer sandwiched between first and second substrates; a common electrode placed between the first substrate and the liquid crystal layer; and a pixel electrode placed between the second substrate and the liquid crystal layer, and the common electrode has slits or protrusions, and the data lines overlap the slits in the common electrode or protrusions of the common electrode in the direction of normal to a surface of the first substrate in the configuration.Type: ApplicationFiled: February 19, 2009Publication date: September 10, 2009Inventors: Masaya Adachi, Miharu Otani, Jun Tanaka
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Publication number: 20090153781Abstract: In a transflective liquid crystal display device including a transmission display portion and a reflection display portion, a dichroic ratio of a polarizing layer contained in a reflection region is increased to enhance display performance. The liquid crystal display device includes: the transmission display portion and the reflection display portion which are formed for each pixel; a reflective layer formed in the reflection display portion; a first substrate having a principal surface opposed to a liquid crystal layer; a second substrate opposed to the first substrate via the liquid crystal layer; and a polarizing layer formed above the reflective layer via an underlying layer thereof on the principal surface of the first substrate. The polarizing layer is made of chromonic liquid crystalline molecules, and an interface between the polarizing layer and the underlying layer has one of a siloxane structure and a silazane structure.Type: ApplicationFiled: December 17, 2008Publication date: June 18, 2009Inventors: Miharu Otani, Jun Tanaka, Kazuhito Masuda, Masaya Adachi, Takato Hiratsuka
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Publication number: 20080239210Abstract: In a transflective liquid crystal display device having a first substrate, a second substrate, a liquid crystal layer disposed between the two substrates and a reflective region and a transmissive region in each pixel; the second substrate has a pixel electrode to drive the liquid crystal layer and a common electrode; the reflective region of the second substrate is formed with an in-cell polarizer between the pixel electrode and common electrode and the reflector. In this invention, the thickness of the liquid crystal layer is set greater in the reflective region than in the transmissive region. The difference in the liquid crystal layer thickness between the reflective region and the transmissive region is provided by forming a step in the first substrate or the second substrate.Type: ApplicationFiled: January 25, 2008Publication date: October 2, 2008Inventors: Chieko Araki, Masaya Adachi, Osamu Itou, Shoichi Hirota, Schinichiro Oka, Jun Tanaka, Miharu Otani
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Publication number: 20080143939Abstract: A transflective liquid crystal display includes a first substrate, a second substrate, and liquid crystal intercalated between the first and second substrates in which each pixel includes a reflection area and a transmission area. The second substrate includes pixel electrodes and common electrodes to drive the liquid crystal. In the reflection area, a reflective layer is arranged between the pixel and common electrodes and the second substrate, and a polarizing layer is disposed between the pixel and common electrodes and the reflective layer.Type: ApplicationFiled: December 11, 2007Publication date: June 19, 2008Inventors: Masaya Adachi, Chieko Araiki, Jun Tanaka, Miharu Otani, Osamu Itou, Shinichiro Oka
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Patent number: 7372154Abstract: As etch-stop films or Cu-diffusion barrier films used in insulation films constituting conductor layers of a stacked structure, films having smaller dielectric constant than silicon nitride films are used, and an insulation film at a lower-layer part of the stacked structure is made to have smaller dielectric constant than that at an upper-layer part thereof, and further this insulation film is a silicon oxide (SiO) film and has, in the interior thereof, nano-pores of from 0.05 nm or more to 4 nm or less in diameter as chief construction. This makes it possible to dramatically reduce effective dielectric constant while keeping the mechanical strength of the conductore layers themselves, and can materialize a highly reliable and high-performance semiconductor device having mitigated the wiring delay of signals which pass through wirings.Type: GrantFiled: December 1, 2004Date of Patent: May 13, 2008Assignee: Renesas Technology Corp.Inventors: Jun Tanaka, Miharu Otani, Kiyoshi Ogata, Yasumichi Suzuki, Katsuhiko Hotta
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Patent number: 7301274Abstract: An active matrix type organic light emitting diode display serving as a bottom emission type device coupling out emission of an organic electroluminescence layer from a substrate where thin film transistors are formed or as a top emission type device coupling out the emission on the opposite side to the substrate. In a suitable layer (102, 106, 107) in each device, an insulating film containing SiO is formed. The insulating film is porous with nano pores in the film. The porous insulating film is controlled as to film density, film refractive index, nano pore diameter in film, average nano pore diameter in film and maximum nano pore diameter in film so that the refractive index is lower than that of a transparent electrode or a transparent substrate of the display holding the organic electroluminescence layer therebetween, and nano pores are present in the film.Type: GrantFiled: July 26, 2004Date of Patent: November 27, 2007Assignee: Hitachi Displays, Ltd.Inventors: Jun Tanaka, Kiyoshi Ogata, Masaya Adachi, Miharu Otani
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Publication number: 20070262708Abstract: An active matrix type organic light emitting diode display serving as a bottom emission type device coupling out emission of an organic electroluminescence layer from a substrate where thin film transistors are formed or as a top emission type device coupling out the emission on the opposite side to the substrate. In a suitable layer (102, 106, 107) in each device, an insulating film containing SiO is formed. The insulating film is porous with nano pores in the film. The porous insulating film is controlled as to film density, film refractive index, nano pore diameter in film, average nano pore diameter in film and maximum nano pore diameter in film so that the refractive index is lower than that of a transparent electrode or a transparent substrate of the display holding the organic electroluminescence layer therebetween, and nano pores are present in the film.Type: ApplicationFiled: July 19, 2007Publication date: November 15, 2007Inventors: Jun Tanaka, Kiyoshi Ogata, Masaya Adachi, Miharu Otani
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Patent number: 7247525Abstract: As etch-stop films or Cu-diffusion barrier films used in insulation films constituting conductor layers of a stacked structure, films having smaller dielectric constant than silicon nitride films are used, and an insulation film at a lower-layer part of the stacked structure is made to have smaller dielectric constant than that at an upper-layer part thereof, and further this insulation film is a silicon oxide (SiO) film and has, in the interior thereof, nano-pores of from 0.05 nm or more to 4 nm or less in diameter as chief construction. This makes it possible to dramatically reduce effective dielectric constant while keeping the mechanical strength of the conductore layers themselves, and can materialize a highly reliable and high-performance semiconductor device having mitigated the wiring delay of signals which pass through wirings.Type: GrantFiled: August 26, 2005Date of Patent: July 24, 2007Assignee: Renesas Technology Corp.Inventors: Jun Tanaka, Miharu Otani, Kiyoshi Ogata, Yasumichi Suzuki, Katsuhiko Hotta
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Publication number: 20060001169Abstract: As etch-stop films or Cu-diffusion barrier films used in insulation films constituting conductor layers of a stacked structure, films having smaller dielectric constant than silicon nitride films are used, and an insulation film at a lower-layer part of the stacked structure is made to have smaller dielectric constant than that at an upper-layer part thereof, and further this insulation film is a silicon oxide (SiO) film and has, in the interior thereof, nano-pores of from 0.05 nm or more to 4 nm or less in diameter as chief construction. This makes it possible to dramatically reduce effective dielectric constant while keeping the mechanical strength of the conductore layers themselves, and can materialize a highly reliable and high-performance semiconductor device having mitigated the wiring delay of signals which pass through wirings.Type: ApplicationFiled: August 26, 2005Publication date: January 5, 2006Inventors: Jun Tanaka, Miharu Otani, Kiyoshi Ogata, Yasumichi Suzuki, Katsuhiko Hotta
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Publication number: 20060001167Abstract: As etch-stop films or Cu-diffusion barrier films used in insulation films constituting conductor layers of a stacked structure, films having smaller dielectric constant than silicon nitride films are used, and an insulation film at a lower-layer part of the stacked structure is made to have smaller dielectric constant than that at an upper-layer part thereof, and further this insulation film is a silicon oxide (SiO) film and has, in the interior thereof, nano-pores of from 0.05 nm or more to 4 nm or less in diameter as chief construction. This makes it possible to dramatically reduce effective dielectric constant while keeping the mechanical strength of the conductore layers themselves, and can materialize a highly reliable and high-performance semiconductor device having mitigated the wiring delay of signals which pass through wirings.Type: ApplicationFiled: August 26, 2005Publication date: January 5, 2006Inventors: Jun Tanaka, Miharu Otani, Kiyoshi Ogata, Yasumichi Suzuki, Katsuhiko Hotta
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Patent number: 6967407Abstract: A semiconductor device capable of high speed operation with a substantially small interlayer capacitance is produced by steps of using an insulating film comprising an organic insulating film and an insulating film composed of an organometallic polymer material as an interlayer insulating film formed by coating, patterning the insulating film in a semi-thermosetting state, etching the organic insulating film as the lower layer by means of the organometallic polymer as a mask, using a plasma gas containing oxygen as the main component, and then conducting ultimate baking treatment of these insulating films.Type: GrantFiled: June 25, 2001Date of Patent: November 22, 2005Assignee: Renesas Technology Corp.Inventors: Miharu Otani, Jun Tanaka, Katsuhiko Hotta, Yasumichi Suzuki, Takashi Inoue
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Publication number: 20050156520Abstract: An active matrix type organic light emitting diode display serving as a bottom emission type device coupling out emission of an organic electroluminescence layer from a substrate where thin film transistors are formed or as a top emission type device coupling out the emission on the opposite side to the substrate. In a suitable layer (102, 106, 107) in each device, an insulating film containing SiO is formed. The insulating film is porous with nano pores in the film. The porous insulating film is controlled as to film density, film refractive index, nano pore diameter in film, average nano pore diameter in film and maximum nano pore diameter in film so that the refractive index is lower than that of a transparent electrode or a transparent substrate of the display holding the organic electroluminescence layer therebetween, and nano pores are present in the film.Type: ApplicationFiled: July 26, 2004Publication date: July 21, 2005Inventors: Jun Tanaka, Kiyoshi Ogata, Masaya Adachi, Miharu Otani
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Patent number: 6897503Abstract: In a semiconductor memory device having a capacitor layer comprising a dielectric film or a ferroelectric film, as an interlayer insulation film formed between the capacitor and a wiring layer formed at the upper part thereof or an insulation film which covers the wiring layer, a multilayered film is used which consists of a first insulation film and a second insulation film laid upon the other; the former being a lower layer and being formed of an organic film, and the latter being an upper layer and being formed of a hard-mask material. This makes it possible to prevent thin films comprised of a dielectric material or a ferroelectric material from any deterioration caused by the hydrogen and water contained in the interlayer insulation film and passivation film of the semiconductor memory device and also by the stress of these films.Type: GrantFiled: June 7, 2004Date of Patent: May 24, 2005Assignee: Renesas Technology Corp.Inventors: Miharu Otani, Jun Tanaka, Kazufumi Suenaga, Kiyoshi Ogata
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Publication number: 20050093161Abstract: As etch-stop films or Cu-diffusion barrier films used in insulation films constituting conductor layers of a stacked structure, films having smaller dielectric constant than silicon nitride films are used, and an insulation film at a lower-layer part of the stacked structure is made to have smaller dielectric constant than that at an upper-layer part thereof, and further this insulation film is a silicon oxide (SiO) film and has, in the interior thereof, nano-pores of from 0.05 nm or more to 4 nm or less in diameter as chief construction. This makes it possible to dramatically reduce effective dielectric constant while keeping the mechanical strength of the conductore layers themselves, and can materialize a highly reliable and high-performance semiconductor device having mitigated the wiring delay of signals which pass through wirings.Type: ApplicationFiled: December 1, 2004Publication date: May 5, 2005Inventors: Jun Tanaka, Miharu Otani, Kiyoshi Ogata, Yasumichi Suzuki, Katsuhiko Hotta
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Patent number: 6867446Abstract: In a semiconductor memory device having a capacitor layer comprising a dielectric film or a ferroelectric film, as an interlayer insulation film formed between the capacitor and a wiring layer formed at the upper part thereof or an insulation film which covers the wiring layer, a multilayered film is used which consists of a first insulation film and a second insulation film laid upon the other; the former being a lower layer and being formed of an organic film, and the latter being an upper layer and being formed of a hard-mask material. This makes it possible to prevent thin film comprised of a dielectric material or a ferroelectric material from any deterioration caused by the hydrogen and water contained in the interlayer insulation film and passivation film of the semiconductor memory device and also by the stress of these films.Type: GrantFiled: October 11, 2002Date of Patent: March 15, 2005Assignee: Renesas Technology Corp.Inventors: Miharu Otani, Jun Tanaka, Kazufumi Suenaga, Kiyoshi Ogata
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Patent number: 6838771Abstract: As etch-stop films or Cu-diffusion barrier films used in insulation films constituting conductor layers of a stacked structure, films having smaller dielectric constant than silicon nitride films are used, and an insulation film at a lower-layer part of the stacked structure is made to have smaller dielectric constant than that at an upper-layer part thereof, and further this insulation film is a silicon oxide (SiO) film and has in the interior thereof, nano-pores of from 0.05 nm or more to 4 nm or less in diameter as chief construction. This makes it possible to dramatically reduce effective dielectric constant while keeping the mechanical strength of the conductore layers themselves, and can materialize a highly reliable and high-performance semiconductor device having mitigated the wiring delay of signals which pass through wirings.Type: GrantFiled: April 11, 2003Date of Patent: January 4, 2005Assignee: Renesas Technology Corp.Inventors: Jun Tanaka, Miharu Otani, Kiyoshi Ogata, Yasumichi Suzuki, Katsuhiko Hotta