Patents by Inventor Miho Watanabe

Miho Watanabe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9437728
    Abstract: A first semiconductor device of an embodiment includes a first semiconductor layer of a first conductivity type, a first control electrode, an extraction electrode, a second control electrode, and a third control electrode. The first control electrode faces a second semiconductor layer of the first conductivity type, a third semiconductor layer of a second conductivity type, and a fourth semiconductor layer of a first conductivity type, via a first insulating film. The second control electrode and the third control electrode are electrically connected to the extraction electrode, and face the second semiconductor layer under the extraction electrode, via the second insulating film. At least a part of the second control electrode and the whole of the third control electrode are provided under the extraction electrode. The electrical resistance of the second control electrode is higher than the electrical resistance of the third control electrode.
    Type: Grant
    Filed: October 13, 2015
    Date of Patent: September 6, 2016
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Wataru Saito, Syotaro Ono, Toshiyuki Naka, Shunji Taniuchi, Miho Watanabe, Hiroaki Yamashita
  • Publication number: 20160043213
    Abstract: A first semiconductor device of an embodiment includes a first semiconductor layer of a first conductivity type, a first control electrode, an extraction electrode, a second control electrode, and a third control electrode. The first control electrode faces a second semiconductor layer of the first conductivity type, a third semiconductor layer of a second conductivity type, and a fourth semiconductor layer of a first conductivity type, via a first insulating film. The second control electrode and the third control electrode are electrically connected to the extraction electrode, and face the second semiconductor layer under the extraction electrode, via the second insulating film. At least a part of the second control electrode and the whole of the third control electrode are provided under the extraction electrode. The electrical resistance of the second control electrode is higher than the electrical resistance of the third control electrode.
    Type: Application
    Filed: October 13, 2015
    Publication date: February 11, 2016
    Inventors: Wataru SAITO, Syotaro ONO, Toshiyuki NAKA, Shunji TANIUCHI, Miho WATANABE, Hiroaki YAMASHITA
  • Patent number: 9236551
    Abstract: According to one embodiment, there is provided a light-emitting device including a light-emitting section, a thermal radiation member, and a heat conduction layer. The light-emitting section includes a mounting substrate section and a light-emitting element section. The mounting substrate section includes a substrate, a first metal layer, and a second metal layer. The substrate includes a first principal plane including a mounting region and a second principal plane. The first metal layer includes mounting patterns provided in the mounting region. The light-emitting element section includes semiconductor light-emitting elements and a wavelength conversion layer. The semiconductor light-emitting elements are connected to the mounting patterns. The luminous existence of the light-emitting element section is equal to or higher than 10 lm/mm2 and equal to or lower than 100 lm/mm2. The thermal radiation member has an area equal to or larger than five times the area of the mounting region.
    Type: Grant
    Filed: August 30, 2013
    Date of Patent: January 12, 2016
    Assignee: Toshiba Lighting & Technology Corporation
    Inventors: Kiyoshi Nishimura, Kazuo Shimokawa, Nobuhiko Betsuda, Akihiro Sasaki, Miho Watanabe, Hirotaka Tanaka, Takuya Honma, Katsuhisa Matsumoto, Hideki Okawa
  • Patent number: 9196721
    Abstract: A first semiconductor device of an embodiment includes a first semiconductor layer of a first conductivity type, a first control electrode, an extraction electrode, a second control electrode, and a third control electrode. The first control electrode faces a second semiconductor layer of the first conductivity type, a third semiconductor layer of a second conductivity type, and a fourth semiconductor layer of a first conductivity type, via a first insulating film. The second control electrode and the third control electrode are electrically connected to the extraction electrode, and face the second semiconductor layer under the extraction electrode, via the second insulating film. At least a part of the second control electrode and the whole of the third control electrode are provided under the extraction electrode. The electrical resistance of the second control electrode is higher than the electrical resistance of the third control electrode.
    Type: Grant
    Filed: July 11, 2014
    Date of Patent: November 24, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Wataru Saito, Syotaro Ono, Toshiyuki Naka, Shunji Taniuchi, Miho Watanabe, Hiroaki Yamashita
  • Patent number: 9059284
    Abstract: A semiconductor device includes a first semiconductor layer of a first conductivity type. A second semiconductor layer of a second conductivity type is on the first semiconductor layer. A third semiconductor layer is on the second semiconductor layer. A fourth semiconductor layer is selectively in the first semiconductor layer. A first trench and second trench penetrate from a surface of the third layer through the second layer to reach the first layer. An embedded electrode is in the first trench. A control electrode is above the embedded electrode via an insulating film. A lower end of the second trench is connected to the fourth semiconductor layer. A first main electrode is electrically connected to the first layer. A second main electrode is provided in the second trench. A Schottky junction is formed by the first layer and the second main electrode at a sidewall of the second trench.
    Type: Grant
    Filed: December 16, 2013
    Date of Patent: June 16, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Wataru Saito, Syotaro Ono, Shunji Taniuchi, Miho Watanabe, Hiroaki Yamashita
  • Patent number: 9013005
    Abstract: According to an embodiment, a semiconductor device includes a second semiconductor layer provided on a first semiconductor layer and including first pillars and second pillars. A first control electrode is provided in a trench of the second semiconductor layer and a second control electrode is provided on the second semiconductor layer and connected to the first control electrode. A first semiconductor region is provided on a surface of the second semiconductor layer except for a portion under the second control electrode. A second semiconductor region is provided on a surface of the first semiconductor region, the second semiconductor region being apart from the portion under the second control electrode and a third semiconductor region is provided on the first semiconductor region. A first major electrode is connected electrically to the first semiconductor layer and a second major electrode is connected electrically to the second and the third semiconductor region.
    Type: Grant
    Filed: September 19, 2013
    Date of Patent: April 21, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Syotaro Ono, Wataru Saito, Shunji Taniuchi, Miho Watanabe, Hiroaki Yamashita, Toshiyuki Naka
  • Patent number: 8998457
    Abstract: A self-ballasted lamp includes: a base body; a light-emitting module and a globe which are provided at one end side of the base body; a cap provided at the other end side of the base body; and a lighting circuit housed between the base body and the cap. The light-emitting module has light-emitting portions each using a semiconductor light-emitting element, and a support portion projected at one end side of the base body, and the light-emitting portions are disposed at least on a circumferential surface of the support portion. A light-transmissive member is interposed between the light-emitting module and an inner face of the globe.
    Type: Grant
    Filed: January 31, 2014
    Date of Patent: April 7, 2015
    Assignee: Toshiba Lighting & Technology Corporation
    Inventors: Makoto Sakai, Masao Segawa, Nobuo Shibano, Kiyoshi Nishimura, Kozo Ogawa, Masahiko Kamata, Toshiya Tanaka, Miho Watanabe, Shuhei Matsuda
  • Publication number: 20150084075
    Abstract: According to one embodiment, there is provided a light-emitting module including a substrate, a light-emitting body provided on the substrate, and a phosphor containing layer provided on the substrate and the light-emitting body, the phosphor containing layer including a first phosphor excited by emitted light of the light-emitting body, having a light emission peak in a wavelength range equal to or greater than 610 nm and less than 655 nm, and having a surface covered with a protection film.
    Type: Application
    Filed: March 7, 2014
    Publication date: March 26, 2015
    Applicant: TOSHIBA LIGHTING & TECHNOLOGY CORPORATION
    Inventor: Miho Watanabe
  • Patent number: 8952607
    Abstract: A light emitting module according to one embodiment includes a substrate; a light emitting body disposed on the substrate; and a phosphor layer having a first phosphor and a second phosphor which are excited by emitted light of the light emitting body. The first phosphor has a light emitting peak whose half-value width is 20 nm or less in a wavelength range from 610 nm to less than 650 nm, and the second phosphor has the light emitting peak in the wavelength range between a peak wavelength of a light emitting spectrum of the light emitting body and the peak wavelength of the light emitting spectrum of the first phosphor. Then, a distribution of the first phosphor in the phosphor layer has density gradient, where the density of the first phosphor increases toward at least one end of the phosphor layer in a direction perpendicular to the substrate.
    Type: Grant
    Filed: September 19, 2013
    Date of Patent: February 10, 2015
    Assignee: Toshiba Lighting & Technology Corporation
    Inventor: Miho Watanabe
  • Publication number: 20140354146
    Abstract: A luminaire includes a semiconductor light source having a light emission peak in a range of wavelength smaller than 480 nm and a phosphor excited by light radiated from the semiconductor light source to radiate light having wavelength equal to or larger than 480 nm. A spectrum of radiated light obtained by combining the light radiated from the semiconductor light source and the light radiated from the phosphor has a light emission peak in a range of wavelength equal to or larger than 610 nm and smaller than 650 nm. A ratio of radiation energy in a range of wavelength equal to or larger than 650 nm and equal to or smaller than 780 nm to radiation energy in a range of wavelength equal to or larger than 600 nm and smaller than 650 nm is equal to or lower than 35%. A color gamut area ratio exceeds 100%.
    Type: Application
    Filed: August 19, 2014
    Publication date: December 4, 2014
    Applicant: Toshiba Lighting & Technology Corporation
    Inventors: Tomoko Ishiwata, Miho Watanabe, Kiyoshi Nishimura
  • Publication number: 20140319599
    Abstract: A first semiconductor device of an embodiment includes a first semiconductor layer of a first conductivity type, a first control electrode, an extraction electrode, a second control electrode, and a third control electrode. The first control electrode faces a second semiconductor layer of the first conductivity type, a third semiconductor layer of a second conductivity type, and a fourth semiconductor layer of a first conductivity type, via a first insulating film. The second control electrode and the third control electrode are electrically connected to the extraction electrode, and face the second semiconductor layer under the extraction electrode, via the second insulating film. At least a part of the second control electrode and the whole of the third control electrode are provided under the extraction electrode. The electrical resistance of the second control electrode is higher than the electrical resistance of the third control electrode.
    Type: Application
    Filed: July 11, 2014
    Publication date: October 30, 2014
    Inventors: Wataru SAITO, Syotaro ONO, Toshiyuki NAKA, Shunji TANIUCHI, Miho WATANABE, Hiroaki YAMASHITA
  • Patent number: 8847264
    Abstract: A luminaire includes a semiconductor light source having a light emission peak in a range of wavelength smaller than 480 nm and a phosphor excited by light radiated from the semiconductor light source to radiate light having wavelength equal to or larger than 480 nm. A spectrum of radiated light obtained by combining the light radiated from the semiconductor light source and the light radiated from the phosphor has a light emission peak in a range of wavelength equal to or larger than 610 nm and smaller than 650 nm. A ratio of radiation energy in a range of wavelength equal to or larger than 650 nm and equal to or smaller than 780 nm to radiation energy in a range of wavelength equal to or larger than 600 nm and smaller than 650 nm is equal to or lower than 35%. A color gamut area ratio exceeds 100%.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: September 30, 2014
    Assignee: Toshiba Lighting & Technology Corporation
    Inventors: Tomoko Ishiwata, Miho Watanabe, Kiyoshi Nishimura
  • Patent number: 8829608
    Abstract: According to one embodiment, a semiconductor device includes a first semiconductor layer of a first conductivity type, a second semiconductor layer of the first conductivity type, a third semiconductor layer of a second conductivity type, a fourth semiconductor layer of the second conductivity type, a fifth semiconductor layer of the first conductivity type, a control electrode, a first main electrode, a second main electrode, and a sixth semiconductor layer of the first conductivity type. The second semiconductor layer and the third semiconductor layer are alternately provided on the first semiconductor layer in a direction substantially parallel to a major surface of the first semiconductor layer. The fourth semiconductor layer is provided on the second semiconductor layer and the third semiconductor layer. The fifth semiconductor layer is selectively provided on a surface of the fourth semiconductor layer. The control electrode is provided in a trench via an insulating film.
    Type: Grant
    Filed: March 18, 2011
    Date of Patent: September 9, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Wataru Saito, Syotaro Ono, Shunji Taniuchi, Miho Watanabe, Hiroaki Yamashita
  • Patent number: 8816410
    Abstract: A first semiconductor device of an embodiment includes a first semiconductor layer of a first conductivity type, a first control electrode, an extraction electrode, a second control electrode, and a third control electrode. The first control electrode faces a second semiconductor layer of the first conductivity type, a third semiconductor layer of a second conductivity type, and a fourth semiconductor layer of a first conductivity type, via a first insulating film. The second control electrode and the third control electrode are electrically connected to the extraction electrode, and face the second semiconductor layer under the extraction electrode, via the second insulating film. At least a part of the second control electrode and the whole of the third control electrode are provided under the extraction electrode. The electrical resistance of the second control electrode is higher than the electrical resistance of the third control electrode.
    Type: Grant
    Filed: January 24, 2012
    Date of Patent: August 26, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Wataru Saito, Syotaro Ono, Toshiyuki Naka, Shunji Taniuchi, Miho Watanabe, Hiroaki Yamashita
  • Publication number: 20140231847
    Abstract: A light emitting module according to one embodiment includes a substrate; a light emitting body disposed on the substrate; a first phosphor which is excited by emitted light of the light emitting body; and a second phosphor which is arranged between the first phosphor and the light emitting body. The first phosphor has a light emitting peak whose half-value width is 20 nm or less in a wavelength range from 610 nm to less than 650 nm. The second phosphor is excited by the emitted light of the light emitting body, and has the light emitting peak in the wavelength range between a peak wavelength of a light emitting spectrum of the light emitting body and the peak wavelength of the light emitting spectrum of the first phosphor.
    Type: Application
    Filed: September 19, 2013
    Publication date: August 21, 2014
    Applicant: Toshiba Lighting & Technology Corporation
    Inventors: Miho Watanabe, Tsuyoshi Oyaizu
  • Publication number: 20140232257
    Abstract: A light emitting module according to one embodiment includes a substrate; a light emitting body disposed on the substrate; and a phosphor layer having a first phosphor and a second phosphor which are excited by emitted light of the light emitting body. The first phosphor has a light emitting peak whose half-value width is 20 nm or less in a wavelength range from 610 nm to less than 650 nm, and the second phosphor has the light emitting peak in the wavelength range between a peak wavelength of a light emitting spectrum of the light emitting body and the peak wavelength of the light emitting spectrum of the first phosphor. Then, a distribution of the first phosphor in the phosphor layer has density gradient, where the density of the first phosphor increases toward at least one end of the phosphor layer in a direction perpendicular to the substrate.
    Type: Application
    Filed: September 19, 2013
    Publication date: August 21, 2014
    Applicant: TOSHIBA LIGHTING & TECHNOLOGY CORPORATION
    Inventor: Miho Watanabe
  • Publication number: 20140225058
    Abstract: To provide a rectifying device equipped with a carrier transporter excellent in high frequency responsiveness and heat resistance, an electronic circuit using the same, and a method of manufacturing the rectifying device. The rectifying device includes a pair of electrodes, and a carrier transporter arranged between the pair of electrodes and composed of one or multiple carbon nanotubes. In order that a first interface between one electrode of the pair of electrodes and the carrier transporter and a second interface between the other electrode of the pair of electrodes and the carrier transporter may have different barrier levels, connection configuration of them are made different.
    Type: Application
    Filed: April 22, 2014
    Publication date: August 14, 2014
    Applicant: FUJI XEROX CO., LTD.
    Inventors: Shinsuke OKADA, Masaki HIRAKATA, Chikara MANABE, Kazunori ANAZAWA, Taishi SHIGEMATSU, Miho WATANABE, Kentaro KISHI, Takashi ISOZAKI, Shigeki OOMA, Hiroyuki WATANABE
  • Publication number: 20140153238
    Abstract: According to one embodiment, there is provided a light-emitting device including a light-emitting section, a thermal radiation member, and a heat conduction layer. The light-emitting section includes a mounting substrate section and a light-emitting element section. The mounting substrate section includes a substrate, a first metal layer, and a second metal layer. The substrate includes a first principal plane including a mounting region and a second principal plane. The first metal layer includes mounting patterns provided in the mounting region. The light-emitting element section includes semiconductor light-emitting elements and a wavelength conversion layer. The semiconductor light-emitting elements are connected to the mounting patterns. The luminous exitance of the light-emitting element section is equal to or higher than 101 m/mm2 and equal to or lower than 1001 m/mm2. The thermal radiation member has an area equal to or larger than five times the area of the mounting region.
    Type: Application
    Filed: August 30, 2013
    Publication date: June 5, 2014
    Applicant: TOSHIBA LIGHTING & TECHNOLOGY CORPORATION
    Inventors: Kiyoshi Nishimura, Kazuo Shimokawa, Nobuhiko Betsuda, Akihiro Sasaki, Miho Watanabe, Hirotaka Tanaka, Takuya Honma, Katsuhisa Matsumoto, Hideki Okawa
  • Publication number: 20140145590
    Abstract: A self-ballasted lamp includes: a base body; a light-emitting module and a globe which are provided at one end side of the base body; a cap provided at the other end side of the base body; and a lighting circuit housed between the base body and the cap. The light-emitting module has light-emitting portions each using a semiconductor light-emitting element, and a support portion projected at one end side of the base body, and the light-emitting portions are disposed at least on a circumferential surface of the support portion. A light-transmissive member is interposed between the light-emitting module and an inner face of the globe.
    Type: Application
    Filed: January 31, 2014
    Publication date: May 29, 2014
    Applicant: Toshiba Lighting & Technology Corporation
    Inventors: Makoto SAKAI, Masao SEGAWA, Nobuo SHIBANO, Kiyoshi NISHIMURA, Kozo OGAWA, Masahiko KAMATA, Toshiya TANAKA, Miho WATANABE, Shuhei MATSUDA
  • Publication number: 20140103425
    Abstract: A semiconductor device includes a first semiconductor layer of a first conductivity type. A second semiconductor layer of a second conductivity type is on the first semiconductor layer. A third semiconductor layer is on the second semiconductor layer. A fourth semiconductor layer is selectively in the first semiconductor layer. A first trench and second trench penetrate from a surface of the third layer through the second layer to reach the first layer. An embedded electrode is in the first trench. A control electrode is above the embedded electrode via an insulating film. A lower end of the second trench is connected to the fourth semiconductor layer. A first main electrode is electrically connected to the first layer. A second main electrode is provided in the second trench. A Schottky junction is formed by the first layer and the second main electrode at a sidewall of the second trench.
    Type: Application
    Filed: December 16, 2013
    Publication date: April 17, 2014
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Wataru SAITO, Syotaro ONO, Shunji TANIUCHI, Miho WATANABE, Hiroaki YAMASHITA