Abstract: The present invention has an object to provide a cleaning agent that has excellent cleaning properties and replacement properties and can further improve the workability during the cleaning of a resin-molding machine, a process for cleaning a resin-molding machine using the same, and the like. A cleaning agent comprising a pellet containing a thermoplastic resin, and 5 to 50 parts by weight of a substance that is liquid at use temperature, based on 100 parts by weight of the thermoplastic resin is used. Such a cleaning agent is introduced into the cylinder of a resin-molding machine, heat is applied to the cleaning agent to hold it in a plasticized state, and the cleaning agent held in a plasticized state is discharged from the cylinder of the resin-molding machine.

Abstract: A semiconductor device comprises a package board, a first semiconductor chip which is rectangular in shape, has a plurality of first pads arranged along its short side and is placed on the package board, and a second semiconductor chip which is rectangular in shape, has a plurality of second pads arranged along its short side and is placed on the first semiconductor chip so that a vertex of the second semiconductor chip at which its long side and its short side along which no pads are arranged meet falls on a vertex of the first semiconductor chip at which its long side and its short side along which no pads are arranged, and the long sides of the first and second semiconductor chips intersect each other.

Abstract: A control circuit receives an external control signal in synchronism with an internal clock and generates an address signal and internal control signals. A data multiplexer has a plurality of input parallel lines and a plurality of output parallel lines and is switched to one of a first output state and a second output state in accordance with the internal control signal. In the first state, the data multiplexer outputs parallel data, which is input to the plurality of input parallel lines and read out from the memory core unit, to the plurality of output parallel lines corresponding to the plurality of input parallel lines. In the second state, the data multiplexer selects 1-bit data of the parallel data input to the plurality of input parallel lines and outputs the 1-bit data to the plurality of output parallel lines. A conversion circuit converts the parallel data into serial data.

Abstract: A semiconductor device comprises a board; a semiconductor chip; a memory controller operative to control the semiconductor chip; and a power supply chip having a capacitor. The semiconductor chip is stacked on the board. The memory controller and the power supply chip are stacked on the semiconductor chip. The capacitor is used to stabilize the voltage applied to the semiconductor chip.

Abstract: A dynamic type semiconductor memory apparatus performs an operation of continuous column access at a high speed while minimizing an increase of a chip size. The dynamic type semiconductor memory apparatus includes first and second memory cell groups divided based on a column address, a first bit line connected to the first memory cell group, a second bit line connected to the second memory cell group, first and second local data lines, and a column selection unit configured to connect the first and second bit lines to the first and second local data line based on a column address. The dynamic type semiconductor memory apparatus further includes first and second master data line, a local data line selecting unit configured to connect the first and second local data lines to the first and second master data lines, respectively, a DBR configured to read data from the first or second master data lines, and a DWB configured to write data to the first or second master data lines.

Abstract: A control circuit receives an external control signal in synchronism with an internal clock and generates an address signal and internal control signals. A data multiplexer has a plurality of input parallel lines and a plurality of output parallel lines and is switched to one of a first output state and a second output state in accordance with the internal control signal. In the first state, the data multiplexer outputs parallel data, which is input to the plurality of input parallel lines and read out from the memory core unit, to the plurality of output parallel lines corresponding to the plurality of input parallel lines. In the second state, the data multiplexer selects 1-bit data of the parallel data input to the plurality of input parallel lines and outputs the 1-bit data to the plurality of output parallel lines. A conversion circuit converts the parallel data into serial data.

Abstract: A semiconductor storage device comprises a memory cell array including memory cells, and bit lines for transfer of data in the memory cells; an amplifier circuit connected to the bit lines to amplify data in the memory cells; a first switching element connected between the bit lines and the amplifier circuit; a first reference voltage source which applies to the gate of the first switching element a voltage for turning the first switching element ON; a second switching element and a third switching element connected in series between the gate of the first switching element and the first reference voltage source, said second switching element and said third switching element being connected in parallel to each other; a second reference voltage source which applies to the gates of the second and third switching elements a voltage for turning the second and third switching elements ON; and a first timing shift circuit connected between the gate of the third switching element and the second reference voltage sour

Abstract: A woody synthetic resin molded article equivalent to natural wood in secondary processing properties such as nailing, sawing and screw clamping, excellent in strength/rigidity, and having no surface roughness to show good appearance can be stably formed by a woody synthetic resin composition containing 5 to 95 parts by weight of (A) a thermoplastic resin, 5 to 95 parts by weight of (C) a vegetable cellulose and, per 100 parts by weight of (A)+(C), 0.1 to 10 parts by weight of (B) an ultrahigh molecular weight polymer having a viscosity average molecular weight of 1,200,000 or more, wherein the thermoplastic resin (A) contains (J) a polyolefin resin composition.

Abstract: A dynamic type semiconductor memory apparatus performs an operation of continuous column access at a high speed while minimizing an increase of a chip size. The dynamic type semiconductor memory apparatus includes first and second memory cell groups divided based on a column address, a first bit line connected to the first memory cell group, a second bit line connected to the second memory cell group, first and second local data lines, and a column selection unit configured to connect the first and second bit lines to the first and second local data line based on a column address. The dynamic type semiconductor memory apparatus further includes first and second master data line, a local data line selecting unit configured to connect the first and second local data lines to the first and second master data lines, respectively, a DBR configured to read data from the first or second master data lines, and a DWB configured to write data to the first or second master data lines.

Abstract: A woody synthetic resin molded article equivalent to natural wood in secondary processing properties such as nailing, sawing and screw clamping, excellent in strength/rigidity, and having no surface roughness to show good appearance can be stably formed by a woody synthetic resin composition containing 5 to 95 parts by weight of (A) a thermoplastic resin, 5 to 95 parts by weight of (C) a vegetable cellulose and, per 100 parts by weight of (A)+(C), 0.1 to 10 parts by weight of (B) an ultrahigh molecular weight polymer having a viscosity average molecular weight of 1,200,000 or more, wherein the thermoplastic resin (A) contains (J) a polyolefin resin composition.

Abstract: A semiconductor storage device comprises a memory cell array including memory cells, and bit lines for transfer of data in the memory cells; an amplifier circuit connected to the bit lines to amplify data in the memory cells; a first switching element connected between the bit lines and the amplifier circuit; a first reference voltage source which applies to the gate of the first switching element a voltage for turning the first switching element ON; a second switching element and a third switching element connected in series between the gate of the first switching element and the first reference voltage source, said second switching element and said third switching element being connected in parallel to each other; a second reference voltage source which applies to the gates of the second and third switching elements a voltage for turning the second and third switching elements ON; and a first timing shift circuit connected between the gate of the third switching element and the second reference voltage sour

Abstract: A semiconductor integrated circuit includes a control data storage circuit (6) having nonvolatile storage devices with programmed control data and a latch circuit for holding data read out from the storage devices, and a read control circuit (7) for controlling read operations of the control data, which are built in a semiconductor chip. The control data storage circuit (6) is divided into groups (1, 2), and the read control circuit (7) generates read control signals for the groups (1, 2) at different timings, using an output of an internal potential detecting circuit 41 as the timing reference, thereby preventing the peak of power consumption from unacceptably rising during reading operations.

Abstract: A detergent composition useful for cleaning away a resin remaining in a molding machine after molding, comprising a thermoplastic resin, water and wollastonite.

Abstract: A semiconductor integrated circuit includes a control data storage circuit (6) having nonvolatile storage devices with programmed control data and a latch circuit for holding data read out from the storage devices, and a read control circuit (7) for controlling read operations of the control data, which are built in a semiconductor chip. The control data storage circuit (6) is divided into groups (1, 2), and the read control circuit (7) generates read control signals for the groups (1, 2) at different timings, using an output o an internal potential detecting circuit 41 as the timing reference, thereby preventing the peak of power consumption from unacceptably rising during reading operations.