Patents by Inventor Mineo Shimotsusa

Mineo Shimotsusa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210008878
    Abstract: A highly reliable multilayer structure element substrate according to an embodiment of this present invention comprises: an electrothermal transducer; a temperature detection element formed at a position where the temperature detection element at least partially overlaps the electrothermal transducer in a planar view of the element substrate; and a plurality of wirings connected to the temperature detection element, wherein the temperature detection element can detect temperatures in a plurality of regions when a plurality of different wirings out of the plurality of wirings are selected.
    Type: Application
    Filed: July 2, 2020
    Publication date: January 14, 2021
    Inventors: Soichiro Nagamochi, Mineo Shimotsusa
  • Patent number: 10882314
    Abstract: A liquid ejection head and its manufacturing method are capable of reducing the thickness of a protective layer as compared to the traditional technique so as to efficiently transfer the heat energy generated by a heating resistance element to a droplet of liquid such as ink. To achieve this, power supply wirings are provided in the same layer below the heating resistance element.
    Type: Grant
    Filed: October 16, 2019
    Date of Patent: January 5, 2021
    Assignee: Canon Kabushiki Kaisha
    Inventors: Mineo Shimotsusa, Shinya Iwahashi, Sadayoshi Sakuma, Ichiro Saito
  • Patent number: 10852184
    Abstract: A photoelectric conversion apparatus according to one aspect of the present invention includes a first substrate including a photoelectric conversion region and a surrounding region, and a second substrate including a circuit for processing a signal from the photoelectric conversion region, and overlapping the first substrate. In this case, the circuit for processing a signal from the photoelectric conversion region includes a first circuit and a second circuit with a higher drive frequency than that of the first circuit. In an orthogonal projection, the second circuit is only provided in the photoelectric conversion region.
    Type: Grant
    Filed: January 8, 2018
    Date of Patent: December 1, 2020
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Mineo Shimotsusa, Koichiro Iwata
  • Publication number: 20200357832
    Abstract: A method of manufacturing a solid-state image sensor, includes forming a first isolation region of a first conductivity type in a semiconductor layer having first and second surfaces, the forming the first isolation region including first implantation for implanting ions into the semiconductor layer through the first surface, forming charge accumulation regions of a second conductivity type in the semiconductor layer, performing first annealing, forming an interconnection on a side of the first surface of the semiconductor layer after the first annealing, and forming a second isolation region of the first conductivity type in the semiconductor layer, the forming the second isolation region including second implantation for implanting ions into the semiconductor layer through the second surface. The first and second isolation regions are arranged between the adjacent charge accumulation regions.
    Type: Application
    Filed: July 29, 2020
    Publication date: November 12, 2020
    Inventor: Mineo Shimotsusa
  • Patent number: 10766255
    Abstract: Provided is an element substrate with suppressed variations in resistance though having a high resistance. In an element substrate equipped with a heat generating resistor that generates thermal energy for ejecting a liquid, the heat generating resistor is a stacked structure having stacked a plurality of resistor layers including a first resistor layer and a second resistor layer containing a metal silicon nitride and the first resistor layer and the second resistor layer are different from each other in at least one of a silicon content in the metal silicon oxide and a metal element contained in the metal silicon nitride.
    Type: Grant
    Filed: March 29, 2019
    Date of Patent: September 8, 2020
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Shinya Iwahashi, Mineo Shimotsusa, Sadayoshi Sakuma
  • Patent number: 10763291
    Abstract: A method of manufacturing a solid-state image sensor, includes forming a first isolation region of a first conductivity type in a semiconductor layer having first and second surfaces, the forming the first isolation region including first implantation for implanting ions into the semiconductor layer through the first surface, forming charge accumulation regions of a second conductivity type in the semiconductor layer, performing first annealing, forming an interconnection on a side of the first surface of the semiconductor layer after the first annealing, and forming a second isolation region of the first conductivity type in the semiconductor layer, the forming the second isolation region including second implantation for implanting ions into the semiconductor layer through the second surface. The first and second isolation regions are arranged between the adjacent charge accumulation regions.
    Type: Grant
    Filed: April 30, 2019
    Date of Patent: September 1, 2020
    Assignee: Canon Kabushiki Kaisha
    Inventor: Mineo Shimotsusa
  • Publication number: 20200203412
    Abstract: A solid-state image pickup device includes a semiconductor substrate in which photoelectric conversion units are arranged. An insulator is disposed on the semiconductor substrate. The insulator has holes associated with the respective photoelectric conversion units. Members are arranged in the respective holes. A light-shielding member is disposed on the opposite side of one of the members from the semiconductor substrate, such that only the associated photoelectric conversion unit is shielded from light. In the solid-state image pickup device, the holes are simultaneously formed and the members are simultaneously formed.
    Type: Application
    Filed: February 28, 2020
    Publication date: June 25, 2020
    Inventors: Mineo Shimotsusa, Masahiro Kobayashi
  • Publication number: 20200168654
    Abstract: A solid-state image pickup device capable of suppressing the generation of dark current and/or leakage current is provided. The solid-state image pickup device has a first substrate provided with a photoelectric converter on its primary face, a first wiring structure having a first bonding portion which contains a conductive material, a second substrate provided with a part of a peripheral circuit on its primary face, and a second wiring structure having a second bonding portion which contains a conductive material. In addition, the first bonding portion and the second bonding portion are bonded so that the first substrate, the first wiring structure, the second wiring structure, and the second substrate are disposed in this order. Furthermore, the conductive material of the first bonding portion and the conductive material of the second bonding portion are surrounded with diffusion preventing films.
    Type: Application
    Filed: January 30, 2020
    Publication date: May 28, 2020
    Inventor: Mineo Shimotsusa
  • Publication number: 20200122459
    Abstract: A liquid ejection head capable of reducing the thickness of the protective layer as compared to the traditional technique and efficiently transferring the heat energy generated by the heating resistance element to a droplet such as ink and a method of manufacturing the liquid ejection head provide. To achieve this, a power supply wiring are provided in the same layer below the heating resistance element.
    Type: Application
    Filed: October 16, 2019
    Publication date: April 23, 2020
    Inventors: Mineo Shimotsusa, Shinya Iwahashi, Sadayoshi Sakuma, Ichiro Saito
  • Publication number: 20200127033
    Abstract: A photoelectric conversion device includes a first semiconductor substrate including a photoelectric conversion unit for generating a signal charge in accordance with an incident light, and a second semiconductor substrate including a signal processing unit for processing an electrical signal on the basis of the signal charge generated in the photoelectric conversion unit. The signal processing unit is situated in an orthogonal projection area from the photoelectric conversion unit to the second semiconductor substrate. A multilayer film including a plurality of insulator layers is provided between the first semiconductor substrate and the second semiconductor substrate. The thickness of the second semiconductor substrate is smaller than 500 micrometers. The thickness of the second semiconductor substrate is greater than the distance from the second semiconductor substrate and a light-receiving surface of the first semiconductor substrate.
    Type: Application
    Filed: December 18, 2019
    Publication date: April 23, 2020
    Inventors: Mineo Shimotsusa, Takeshi Ichikawa, Yasuhiro Sekine
  • Patent number: 10615204
    Abstract: A solid-state image pickup device includes a semiconductor substrate in which photoelectric conversion units are arranged. An insulator is disposed on the semiconductor substrate. The insulator has holes associated with the respective photoelectric conversion units. Members are arranged in the respective holes. A light-shielding member is disposed on the opposite side of one of the members from the semiconductor substrate, such that only the associated photoelectric conversion unit is shielded from light. In the solid-state image pickup device, the holes are simultaneously formed and the members are simultaneously formed.
    Type: Grant
    Filed: January 6, 2017
    Date of Patent: April 7, 2020
    Assignee: Canon Kabushiki Kaisha
    Inventors: Mineo Shimotsusa, Masahiro Kobayashi
  • Patent number: 10573680
    Abstract: A solid-state image pickup device capable of suppressing the generation of dark current and/or leakage current is provided. The solid-state image pickup device has a first substrate provided with a photoelectric converter on its primary face, a first wiring structure having a first bonding portion which contains a conductive material, a second substrate provided with a part of a peripheral circuit on its primary face, and a second wiring structure having a second bonding portion which contains a conductive material. In addition, the first bonding portion and the second bonding portion are bonded so that the first substrate, the first wiring structure, the second wiring structure, and the second substrate are disposed in this order. Furthermore, the conductive material of the first bonding portion and the conductive material of the second bonding portion are surrounded with diffusion preventing films.
    Type: Grant
    Filed: January 8, 2019
    Date of Patent: February 25, 2020
    Assignee: CANON KABUSHIKI KAISHA
    Inventor: Mineo Shimotsusa
  • Patent number: 10546891
    Abstract: A photoelectric conversion device includes a first semiconductor substrate including a photoelectric conversion unit for generating a signal charge in accordance with an incident light, and a second semiconductor substrate including a signal processing unit for processing an electrical signal on the basis of the signal charge generated in the photoelectric conversion unit. The signal processing unit is situated in an orthogonal projection area from the photoelectric conversion unit to the second semiconductor substrate. A multilayer film including a plurality of insulator layers is provided between the first semiconductor substrate and the second semiconductor substrate. The thickness of the second semiconductor substrate is smaller than 500 micrometers. The thickness of the second semiconductor substrate is greater than the distance from the second semiconductor substrate and a light-receiving surface of the first semiconductor substrate.
    Type: Grant
    Filed: December 20, 2017
    Date of Patent: January 28, 2020
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Mineo Shimotsusa, Takeshi Ichikawa, Yasuhiro Sekine
  • Publication number: 20200021766
    Abstract: A solid-state imaging device includes a first and second pixel regions. In the first pixel region, a photoelectric conversion unit, a floating diffusion region (FD), and a transferring transistor are provided. In the second pixel region, an amplifying transistor, and a resetting transistor are provided. A first element isolation portion is provided in the first pixel region, while a second element isolation portion is provided in the second pixel region. An amount of protrusion of an insulating film into a semiconductor substrate in the first element isolation portion is smaller, than that in the second element isolation portion.
    Type: Application
    Filed: September 23, 2019
    Publication date: January 16, 2020
    Inventors: Mineo Shimotsusa, Fumihiro Inui
  • Patent number: 10497734
    Abstract: The present invention relates to a solid-state imaging apparatus including a first substrate having a plurality of photoelectric conversion units and a second substrate having a plurality of readout circuits. The first substrate is provided with a plurality of first conductive patterns that are electrically separated from one another and the second substrate is provided with a plurality of second conductive patterns that are electrically separated from one another. The first conductive patterns each include a first partial pattern extending in a first direction. The second conductive patterns each include a partial pattern extending in a second direction different from the first direction. The first partial pattern has a length extending in the first direction longer than a length thereof in the second direction.
    Type: Grant
    Filed: June 13, 2016
    Date of Patent: December 3, 2019
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Takeshi Ichikawa, Mineo Shimotsusa, Genzo Momma
  • Patent number: 10462405
    Abstract: A solid-state imaging device includes a first and second pixel regions. In the first pixel region, a photoelectric conversion unit, a floating diffusion region (FD), and a transferring transistor are provided. In the second pixel region, an amplifying transistor, and a resetting transistor are provided. A first element isolation portion is provided in the first pixel region, while a second element isolation portion is provided in the second pixel region. An amount of protrusion of an insulating film into a semiconductor substrate in the first element isolation portion is smaller, than that in the second element isolation portion.
    Type: Grant
    Filed: September 12, 2017
    Date of Patent: October 29, 2019
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Mineo Shimotsusa, Fumihiro Inui
  • Publication number: 20190308415
    Abstract: Provided is an element substrate with suppressed variations in resistance though having a high resistance. In an element substrate equipped with a heat generating resistor that generates thermal energy for ejecting a liquid, the heat generating resistor is a stacked structure having stacked a plurality of resistor layers including a first resistor layer and a second resistor layer containing a metal silicon nitride and the first resistor layer and the second resistor layer are different from each other in at least one of a silicon content in the metal silicon oxide and a metal element contained in the metal silicon nitride.
    Type: Application
    Filed: March 29, 2019
    Publication date: October 10, 2019
    Inventors: Shinya Iwahashi, Mineo Shimotsusa, Sadayoshi Sakuma
  • Publication number: 20190259788
    Abstract: A method of manufacturing a solid-state image sensor, includes forming a first isolation region of a first conductivity type in a semiconductor layer having first and second surfaces, the forming the first isolation region including first implantation for implanting ions into the semiconductor layer through the first surface, forming charge accumulation regions of a second conductivity type in the semiconductor layer, performing first annealing, forming an interconnection on a side of the first surface of the semiconductor layer after the first annealing, and forming a second isolation region of the first conductivity type in the semiconductor layer, the forming the second isolation region including second implantation for implanting ions into the semiconductor layer through the second surface. The first and second isolation regions are arranged between the adjacent charge accumulation regions.
    Type: Application
    Filed: April 30, 2019
    Publication date: August 22, 2019
    Inventor: Mineo Shimotsusa
  • Publication number: 20190252458
    Abstract: A solid-state imaging device includes: a first semiconductor substrate including a photoelectric conversion element; and a second semiconductor substrate including at least a part of a peripheral circuit arranged in a main face of the second semiconductor substrate, the peripheral circuit generating a signal based on the charge of the photoelectric conversion element, a main face of the first semiconductor substrate and the main face of the second semiconductor substrate being opposed to each other with sandwiching a wiring structure therebetween; a pad to be connected to an external terminal; and a protection circuit electrically connected to the pad and to the peripheral circuit, wherein the protection circuit is arranged in the main face of the second semiconductor substrate.
    Type: Application
    Filed: April 24, 2019
    Publication date: August 15, 2019
    Inventors: Masahiro Kobayashi, Mineo Shimotsusa
  • Publication number: 20190198537
    Abstract: A manufacturing method includes a first process for forming a first gate electrode for a first MOS transistor and a second gate electrode for a second MOS transistor on a substrate including a semiconductor region defined by an insulator region for element isolation, a second process for masking a portion located above the semiconductor region of the first gate electrode to introduce an impurity to a source-drain region of the first MOS transistor, and a third process for forming a first conductor member being in contact with the portion of the first gate electrode through a first hole disposed on an insulator member covering the substrate and a second conductor member being in contact with the second gate electrode through a second hole disposed on the insulator member.
    Type: Application
    Filed: February 26, 2019
    Publication date: June 27, 2019
    Inventors: Mineo Shimotsusa, Masatsugu Itahashi, Yusuke Onuki, Nobuaki Kakinuma, Masato Fujita