Patents by Inventor Ming-Chin Lee

Ming-Chin Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8421981
    Abstract: A display panel having a display region and a sealant region is provided. The display panel includes a first substrate, a second substrate, a sealant and a display medium. The sealant is disposed between the first and second substrates and within the sealant region. The display medium is disposed between the first and second substrates and within the display region. The second substrate includes pixel units and wires electrically connected to the pixel units. The pixel units are disposed within the display region, the wires extend to the sealant region from the display region, and at least a portion of the wires in the sealant region has slots. In particular, each of the slots has a side edge adjacent to the edge of the wire which the slot is disposed therein, and the distances from the side edge to the edge of the wire are not equal.
    Type: Grant
    Filed: February 9, 2009
    Date of Patent: April 16, 2013
    Assignee: Au Optronics Corporation
    Inventors: Pai-Hung Hsu, Chien-Hao Fu, Chun-Huan Chang, Ming-Chin Lee, Min-Feng Chiang
  • Publication number: 20110298731
    Abstract: A touch display substrate of a touch display device includes a pixel array, a peripheral region, at least a driving chip, a plurality of data lines, and a plurality of touch sensing read-out lines disposed in the peripheral region. Each of the touch sensing read-out lines includes a first section and a second section. The first section is electrically connected to the corresponding driving chip and the second section is electrically connected to the pixel array. The second section of at least one of the touch sensing read-out lines includes an initial point and a winding portion. The winding portion is disposed on at least one side of a vertical extending line of the initial point, the winding portion winds to and fro along a horizontal direction and along a vertical direction, and the winding portion is asymmetrical with respect to the vertical extending line of the initial point.
    Type: Application
    Filed: November 18, 2010
    Publication date: December 8, 2011
    Inventors: Chien-Hao Fu, Ming-Chin Lee
  • Publication number: 20110273423
    Abstract: A liquid crystal display panel includes an array substrate and at least a conducting wire. The conducting wire, disposed in a peripheral region of the array substrate, includes a first straight section, and a second straight section structurally connected to the first straight section. At least one side of the first straight section is arranged along a first direction, and at least a side of the second straight section is arranged along a second direction, where the first direction and the second direction are non-parallel. The first straight section includes a plurality of first slits arranged along the first direction, and the second straight section includes a plurality of second slits arranged along the second direction.
    Type: Application
    Filed: March 2, 2011
    Publication date: November 10, 2011
    Inventors: Pai-Hung Hsu, Ming-Chin Lee
  • Publication number: 20110085122
    Abstract: An active device array substrate including a substrate, scan lines, control lines, data lines, pixel structures, main transmission lines and sub transmission lines is provided. The substrate has an active area and a peripheral area. The scan lines and the control lines are disposed within the active area. The control lines are parallel to the scan lines and each control line is located between two of the scan lines. The main transmission lines located within the peripheral area are connected with the scan lines. The sub transmission lines located within the peripheral area are connected with the control lines. Each sub transmission line is located between two of the main transmission lines. Each main transmission line at least includes an impedance adjusting unit, and the impedance difference between each main transmission line and one of the adjacent sub transmission lines is larger than 3?.
    Type: Application
    Filed: April 1, 2010
    Publication date: April 14, 2011
    Inventors: Chien-Hao Fu, Wei-Kai Huang, Chia-Chiang Lin, Hsueh-Hui Lin, Ming-Chin Lee
  • Publication number: 20100225624
    Abstract: A flat display panel includes a substrate, at least a driving chip, a plurality of control lines and conductive lines. The substrate has a display area and peripheral circuit area defined thereon. The driving chip is disposed in the peripheral circuit area, and has a plurality of pins. The pitches of adjacent pins are varied. The pitches of the pins in the central portion of the driving chip are smaller than the pitches of the pins in the border portion. The control lines and the conductive lines are disposed in the display area and the peripheral circuit area respectively, and the control lines are electrically connected to the conductive lines.
    Type: Application
    Filed: October 27, 2009
    Publication date: September 9, 2010
    Inventors: Chien-Hao Fu, Min-Feng Chiang, Ming-Chin Lee, Chun-Huan Chang, Pai-Hung Hsu
  • Publication number: 20100118249
    Abstract: A display panel having a display region and a sealant region is provided. The display panel includes a first substrate, a second substrate, a sealant and a display medium. The sealant is disposed between the first and second substrates and within the sealant region. The display medium is disposed between the first and second substrates and within the display region. The second substrate includes pixel units and wires electrically connected to the pixel units. The pixel units are disposed within the display region, the wires extend to the sealant region from the display region, and at least a portion of the wires in the sealant region has slots. In particular, each of the slots has a side edge adjacent to the edge of the wire which the slot is disposed therein, and the distances from the side edge to the edge of the wire are not equal.
    Type: Application
    Filed: February 9, 2009
    Publication date: May 13, 2010
    Applicant: AU OPTRONICS CORPORATION
    Inventors: Pai-Hung Hsu, Chien-Hao Fu, Chun-Huan Chang, Ming-Chin Lee, Min-Feng Chiang
  • Patent number: 7705952
    Abstract: The present invention provides an electronic device and manufacturing method thereof. The interconnecting leads of adjacent fan-out blocks have different heights along boundary area, thereby making the resistance of the adjacent interconnecting leads uniform and ensuring the quality of the electronic device.
    Type: Grant
    Filed: November 7, 2006
    Date of Patent: April 27, 2010
    Assignee: AU Optronics Corporation
    Inventors: Ming-Chin Lee, Ming-Sheng Lai
  • Publication number: 20090262292
    Abstract: A display panel has a plurality of drivers ICs electrically connected to the pixel area. The electrical conductors that are used to electrically connect the driver ICs to the pixel area are arranged in one or more fan-out patterns. The fan-out pattern of at least one of the ICs is arranged such that the slope of all fan-out segments is of the same sign. If the slope of the fan-out segments of that IC is negative, then, for the adjacent IC to the right, the conductor pattern is arranged such that the slope of the leftmost of the fan-out segment of that adjacent IC should also be negative. When three ICs are connected to a common pixel area, the conductor pattern for the middle IC is arranged such that the slope of the leftmost fan-out segment is positive and the slope of the rightmost segment is negative.
    Type: Application
    Filed: April 16, 2008
    Publication date: October 22, 2009
    Inventor: Ming-Chin Lee
  • Publication number: 20070195254
    Abstract: The present invention provides an electronic device and manufacturing method thereof. The interconnecting leads of adjacent fan-out blocks have different heights along boundary area, thereby making the resistance of the adjacent interconnecting leads uniform and ensuring the quality of the electronic device.
    Type: Application
    Filed: November 7, 2006
    Publication date: August 23, 2007
    Inventors: Ming-Chin Lee, Ming-Sheng Lai