Patents by Inventor Ming-Fu Tsai

Ming-Fu Tsai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10840237
    Abstract: An electrostatic discharge (ESD) protection circuit is coupled between first and second power supply buses. The ESD protection circuit includes a detection circuit; a pull-up circuit, coupled to the detection circuit, comprising at least a first n-type transistor; a pull-down circuit, coupled to the pull-up circuit, comprising at least a second n-type transistor; and a bypass circuit, coupled to the pull-up and pull-down circuits, wherein the detection circuit is configured to detect whether an ESD event is present on either the first or the second bus so as to cause the pull-up and pull-down circuits to selectively enable the bypass circuit for providing a discharging path between the first and second power supply buses.
    Type: Grant
    Filed: February 9, 2018
    Date of Patent: November 17, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Ming-Fu Tsai, Tzu-Heng Chang, Yu-Ti Su, Kai-Ping Huang
  • Publication number: 20200219868
    Abstract: Some embodiments relate to a semiconductor device on a substrate. An interconnect structure is disposed over the semiconductor substrate. A first conductive pad is disposed over the interconnect structure. A second conductive pad is disposed over the interconnect structure and spaced apart from the first conductive pad. A third conductive pad is disposed over the interconnect structure and spaced apart from the first and second conductive pads. A first ESD protection element is electrically coupled between the first and second conductive pads. A first device under test (DUT) is electrically coupled between the first and third conductive pads.
    Type: Application
    Filed: March 13, 2020
    Publication date: July 9, 2020
    Inventors: Jen-Chou Tseng, Ming-Fu Tsai, Tzu-Heng Chang
  • Patent number: 10629588
    Abstract: Some embodiments relate to a semiconductor device on a substrate. An interconnect structure is disposed over the substrate, and a first conductive pad is disposed over the interconnect structure. A second conductive pad is disposed over the interconnect structure and is spaced apart from the first conductive pad. A third conductive pad is disposed over the interconnect structure and is spaced apart from the first and second conductive pads. A fourth conductive pad is disposed over the interconnect structure and is spaced apart from the first, second, and third conductive pads. A first ESD protection element is electrically coupled between the first and second pads; and a second ESD protection element is electrically coupled between the third and fourth pads. A first device under test is electrically coupled between the first and third conductive pads; and a second device under test is electrically coupled between the second and fourth pads.
    Type: Grant
    Filed: November 28, 2018
    Date of Patent: April 21, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Jen-Chou Tseng, Ming-Fu Tsai, Tzu-Heng Chang
  • Publication number: 20190379260
    Abstract: An angular position sensing device for detecting angular position of a rotor of a motor includes a first resolver that includes an annular rotor, an annular stator, a plurality of excitation coils and four induction coils. The annular stator has a stator annular body, and a plurality of stator magnetic poles. One of the annular rotor and the annular stator surrounds the other one of the annular rotor and the annular stator. The excitation coils are respectively wound on the stator magnetic poles of the annular stator. The induction coils are respectively wound on four of the stator magnetic poles.
    Type: Application
    Filed: June 7, 2018
    Publication date: December 12, 2019
    Inventors: MING-FU TSAI, WEI-TE CHUANG, CHIA-HSIANG LIEN, ZHE-WEI ZHANG
  • Patent number: 10504515
    Abstract: A voice control device includes a microphone module, a voice encoding module, a display and a processing unit. The voice encoding module is electrically connected to the microphone module. The processing unit is electrically connected to the voice encoding module and the display. The microphone module receives a voice signal and transmits the received voice signal to the voice encoding module. One of the voice encoding module and the processing unit analyzes and processes the voice signal to determine a sound source direction of the voice signal and obtains response information according to the voice signal. The processing unit controls the display to rotate to the sound source direction and transmits the response information to the display for displaying the response information.
    Type: Grant
    Filed: December 15, 2017
    Date of Patent: December 10, 2019
    Assignee: Chiun Mai Communication Systems, Inc.
    Inventors: Yu-Yang Chih, Ming-Chun Ho, Ming-Fu Tsai, Cheng-Ping Liu, Fu-Bin Wang, Shih-Lun Lin
  • Publication number: 20190251699
    Abstract: An optical projector module to establish distance to target object in a field of view for three dimensional image acquisition purposes includes a printed circuit board, point light sources mounted on the printed circuit board to emit a plurality of light beams, a lens unit apart from the plurality of point light sources, and a distance adjusting unit connected to the lens unit. A memory storage device is also included. The lens unit comprises separated lenses, the adjusting unit can adjust distances between the lenses of the lens unit, and light beams with a number of light spot patterns can accordingly be projected. Previously-captured images in the memory storage device can be referred to in seeking target objects in the field of view and light beams in different spot-concentrations on or around the target object enable calculations for the capture of images in three dimensions of the target object.
    Type: Application
    Filed: January 30, 2019
    Publication date: August 15, 2019
    Inventors: YU-YANG CHIH, MING-FU TSAI, HSUEH-FENG HSU
  • Patent number: 10284190
    Abstract: A voltage detector includes a first node configured to have a first supply voltage, a second node configured to have a second supply voltage, and an output node. The voltage detector is configured to drive the output node to the first supply voltage in response to a difference between the first supply voltage and the second supply voltage exceeding a predetermined threshold voltage value.
    Type: Grant
    Filed: March 6, 2017
    Date of Patent: May 7, 2019
    Assignee: TAIWAN SEMICONDUTOR MANUFACTURING COMPANY, LTD.
    Inventors: Ming-Fu Tsai, Jen-Chou Tseng, Kuo-Ji Chen, Tzu-Heng Chang
  • Publication number: 20190109129
    Abstract: Some embodiments relate to a semiconductor device on a substrate. An interconnect structure is disposed over the substrate, and a first conductive pad is disposed over the interconnect structure. A second conductive pad is disposed over the interconnect structure and is spaced apart from the first conductive pad. A third conductive pad is disposed over the interconnect structure and is spaced apart from the first and second conductive pads. A fourth conductive pad is disposed over the interconnect structure and is spaced apart from the first, second, and third conductive pads. A first ESD protection element is electrically coupled between the first and second pads; and a second ESD protection element is electrically coupled between the third and fourth pads. A first device under test is electrically coupled between the first and third conductive pads; and a second device under test is electrically coupled between the second and fourth pads.
    Type: Application
    Filed: November 28, 2018
    Publication date: April 11, 2019
    Inventors: Jen-Chou Tseng, Ming-Fu Tsai, Tzu-Heng Chang
  • Patent number: 10170461
    Abstract: Some embodiments relate to a semiconductor device on a substrate. An interconnect structure is disposed over the substrate, and a first conductive pad is disposed over the interconnect structure. A second conductive pad is disposed over the interconnect structure and is spaced apart from the first conductive pad. A third conductive pad is disposed over the interconnect structure and is spaced apart from the first and second conductive pads. A fourth conductive pad is disposed over the interconnect structure and is spaced apart from the first, second, and third conductive pads. A first ESD protection element is electrically coupled between the first and second pads; and a second ESD protection element is electrically coupled between the third and fourth pads. A first device under test is electrically coupled between the first and third conductive pads; and a second device under test is electrically coupled between the second and fourth pads.
    Type: Grant
    Filed: September 21, 2016
    Date of Patent: January 1, 2019
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Jen-Chou Tseng, Ming-Fu Tsai, Tzu-Heng Chang
  • Publication number: 20180374839
    Abstract: An electrostatic discharge (ESD) protection circuit is coupled between first and second power supply buses. The ESD protection circuit includes a detection circuit; a pull-up circuit, coupled to the detection circuit, comprising at least a first n-type transistor; a pull-down circuit, coupled to the pull-up circuit, comprising at least a second n-type transistor; and a bypass circuit, coupled to the pull-up and pull-down circuits, wherein the detection circuit is configured to detect whether an ESD event is present on either the first or the second bus so as to cause the pull-up and pull-down circuits to selectively enable the bypass circuit for providing a discharging path between the first and second power supply buses.
    Type: Application
    Filed: February 9, 2018
    Publication date: December 27, 2018
    Inventors: Ming-Fu TSAI, Tzu-Heng CHANG, Yu-Ti SU, Kai-Ping HUANG
  • Publication number: 20180315641
    Abstract: Methods and devices are provided herein for enhancing robustness of a bipolar electrostatic discharge (ESD) device. The robustness of a bipolar ESD device includes providing an emitter region and a collector region adjacent to the emitter region. An isolation structure is provided between the emitter region and the collector region. A ballasting characteristic at the isolation structure is modified by inserting at least one partition structure therein. Each partition structure extends substantially abreast at least one of the emitter and the collector regions.
    Type: Application
    Filed: June 28, 2018
    Publication date: November 1, 2018
    Inventors: Alexander Kalnitsky, Jen-Chou Tseng, Chia-Wei Hsu, Ming-Fu Tsai
  • Patent number: 10074745
    Abstract: According to an embodiment, a semiconductor device is provided. The device includes a second region having a greater curvature than a first region. The device includes an epitaxy layer of a first conductivity type, a well of a second conductivity type in the epitaxy layer, a drain in the epitaxy layer, a source in the well, and a bulk in the well and in contact with the source, the bulk having a greater area in the second region than in the first region.
    Type: Grant
    Filed: May 22, 2017
    Date of Patent: September 11, 2018
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Ming-Fu Tsai, Yu-Ti Su, Jen-Chou Tseng
  • Patent number: 10026640
    Abstract: A method and structure of improving the robustness of an electrostatic discharge (ESD) protection device is disclosed. One aspect of the instant disclosure provides a semiconductor structure that comprises: a first well structure; a second well structure arranged adjacent to the isolation structure in the substrate, a diffusion region respectively disposed in the first and the second well structures; an isolation structure arranged between the well structures and laterally separating the diffusion regions; and a partition structure arranged in the isolation structure. The partition structure affects a steeper slope on a lateral surface of the isolation structure bordering at least one of the diffusion regions, thereby modifying a ballasting characteristic of the isolation structure.
    Type: Grant
    Filed: January 14, 2015
    Date of Patent: July 17, 2018
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Alexander Kalnitsky, Jen-Chou Tseng, Chia-Wei Hsu, Ming-Fu Tsai
  • Publication number: 20180174584
    Abstract: A voice control device includes a microphone module, a voice encoding module, a display and a processing unit. The voice encoding module is electrically connected to the microphone module. The processing unit is electrically connected to the voice encoding module and the display. The microphone module receives a voice signal and transmits the received voice signal to the voice encoding module. One of the voice encoding module and the processing unit analyzes and processes the voice signal to determine a sound source direction of the voice signal and obtains response information according to the voice signal. The processing unit controls the display to rotate to the sound source direction and transmits the response information to the display for displaying the response information.
    Type: Application
    Filed: December 15, 2017
    Publication date: June 21, 2018
    Inventors: YU-YANG CHIH, MING-CHUN HO, MING-FU TSAI, CHENG-PING LIU, FU-BIN WANG, SHIH-LUN LIN
  • Publication number: 20170346479
    Abstract: A voltage detector includes a first node configured to have a first supply voltage, a second node configured to have a second supply voltage, and an output node. The voltage detector is configured to drive the output node to the first supply voltage in response to a difference between the first supply voltage and the second supply voltage exceeding a predetermined threshold voltage value.
    Type: Application
    Filed: March 6, 2017
    Publication date: November 30, 2017
    Inventors: Ming-Fu TSAI, Jen-Chou TSENG, Kuo-Ji CHEN, Tzu-Heng CHANG
  • Publication number: 20170256643
    Abstract: According to an embodiment, a semiconductor device is provided. The device includes a second region having a greater curvature than a first region. The device includes an epitaxy layer of a first conductivity type, a well of a second conductivity type in the epitaxy layer, a drain in the epitaxy layer, a source in the well, and a bulk in the well and in contact with the source, the bulk having a greater area in the second region than in the first region.
    Type: Application
    Filed: May 22, 2017
    Publication date: September 7, 2017
    Inventors: MING-FU TSAI, YU-TI SU, JEN-CHOU TSENG
  • Patent number: 9666713
    Abstract: According to an embodiment, a semiconductor device is provided. The device includes: The second region has a greater curvature than the first region. The device includes: an N-type epitaxy layer; a P-well in the N-type epitaxy layer; a drain in the N-type epitaxy layer; a source in the P-well; and a bulk in the P-well and in contact with the source, wherein the bulk has a greater area in the second region than in the first region.
    Type: Grant
    Filed: September 14, 2016
    Date of Patent: May 30, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Ming-Fu Tsai, Yu-Ti Su, Jen-Chou Tseng
  • Publication number: 20170141100
    Abstract: Some embodiments relate to a semiconductor device on a substrate. An interconnect structure is disposed over the substrate, and a first conductive pad is disposed over the interconnect structure. A second conductive pad is disposed over the interconnect structure and is spaced apart from the first conductive pad. A third conductive pad is disposed over the interconnect structure and is spaced apart from the first and second conductive pads. A fourth conductive pad is disposed over the interconnect structure and is spaced apart from the first, second, and third conductive pads. A first ESD protection element is electrically coupled between the first and second pads; and a second ESD protection element is electrically coupled between the third and fourth pads. A first device under test is electrically coupled between the first and third conductive pads; and a second device under test is electrically coupled between the second and fourth pads.
    Type: Application
    Filed: September 21, 2016
    Publication date: May 18, 2017
    Inventors: Jen-Chou Tseng, Ming-Fu Tsai, Tzu-Heng Chang
  • Patent number: 9608616
    Abstract: A circuit includes a first node having a first supply voltage, a second node having a second supply voltage, and a voltage detector coupled between the first node and the second node, the voltage detector including a first output node. A clamp circuit is coupled between the first node and the second node. The voltage detector is configured to drive the first output node to the first supply voltage in response to a difference between the first supply voltage and the second supply voltage exceeding a predetermined threshold voltage value. The clamp circuit is configured to establish a conduction path between the first node and the second node in response to the first or second output node being driven to the first supply voltage.
    Type: Grant
    Filed: May 27, 2016
    Date of Patent: March 28, 2017
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Ming-Fu Tsai, Jen-Chou Tseng, Kuo-Ji Chen, Tzu-Heng Chang
  • Publication number: 20170005194
    Abstract: According to an embodiment, a semiconductor device is provided. The device includes: The second region has a greater curvature than the first region. The device includes: an N-type epitaxy layer; a P-well in the N-type epitaxy layer; a drain in the N-type epitaxy layer; a source in the P-well; and a bulk in the P-well and in contact with the source, wherein the bulk has a greater area in the second region than in the first region.
    Type: Application
    Filed: September 14, 2016
    Publication date: January 5, 2017
    Inventors: MING-FU TSAI, YU-TI SU, JEN-CHOU TSENG