Patents by Inventor Ming-Hui Chang

Ming-Hui Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11022886
    Abstract: The present disclosure provides a method for planarization. The method includes providing a substrate having a top surface and a trench recessed from the top surface; coating a sensitive material layer on the top surface of the substrate, wherein the sensitive material layer fills in the trench; performing an activation treatment to the sensitive material layer so that portions of the material layer are chemically changed; and performing a wet chemical process to the sensitive material layer so that top portions of the sensitive material layer above the trench are removed, wherein remaining portions of the sensitive material layer have top surfaces substantially coplanar with the top surface of the substrate.
    Type: Grant
    Filed: May 17, 2017
    Date of Patent: June 1, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO,, LTD.
    Inventors: Ming-Hui Weng, Cheng-Han Wu, Ching-Yu Chang, Chin-Hsiang Lin
  • Patent number: 11009796
    Abstract: A method for forming a semiconductor device structure is provided. The method includes forming a material layer over a substrate and forming a resist layer over the material layer. The resist layer includes an inorganic material and an auxiliary. The inorganic material includes a plurality of metallic cores and a plurality of first linkers bonded to the metallic cores. The method includes exposing a portion of the resist layer. The resist layer includes an exposed region and an unexposed region. In the exposed region, the auxiliary reacts with the first linkers. The method also includes removing the unexposed region of the resist layer by using a developer to form a patterned resist layer. The developer includes a ketone-based solvent having a formula (a) or the ester-based solvent having a formula (b).
    Type: Grant
    Filed: September 16, 2019
    Date of Patent: May 18, 2021
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Ming-Hui Weng, An-Ren Zi, Ching-Yu Chang, Chin-Hsiang Lin, Chen-Yu Liu
  • Patent number: 11006879
    Abstract: A urinary bladder irrigation device includes: a first pipe, a second pipe, a third pipe, a liquid supply member, a liquid collection member, a detection member, and an elevation member. The first pipe has a first opening at one end thereof. The second pipe has a second opening at one end thereof. The third pipe has an end connected to another end of the first pipe and another end of the second pipe and has a third opening at another end thereof. The liquid supply member is connected to the first opening. The liquid collection member is connected to the second opening. The detection member is positioned in the second pipe. The elevation member accommodates the detection member.
    Type: Grant
    Filed: January 24, 2019
    Date of Patent: May 18, 2021
    Assignee: NATIONAL CHENG KUNG UNIVERSITY
    Inventors: Chen-Hsun Weng, Ming-Chien Hung, Wen-Horng Yang, Chien-Hui Ou, Ming-Huang Chen, Chih-Han Chang
  • Publication number: 20210134746
    Abstract: A method of manufacturing a bump structure includes forming a passivation layer over a substrate. A metal pad structure is formed over the substrate, wherein the passivation layer surrounds the metal pad structure. A polyimide layer including a polyimide is formed over the passivation layer and the metal pad structure. A metal bump is formed over the metal pad structure and the polyimide layer. The polyimide is a reaction product of a dianhydride and a diamine, wherein at least one of the dianhydride and the diamine comprises one selected from the group consisting of a cycloalkane, a fused ring, a bicycloalkane, a tricycloalkane, a bicycloalkene, a tricycloalkene, a spiroalkane, and a heterocyclic ring.
    Type: Application
    Filed: September 11, 2020
    Publication date: May 6, 2021
    Inventors: Ching-Yu CHANG, Ming-Da CHENG, Ming-Hui WENG
  • Publication number: 20210134589
    Abstract: A method of forming a pattern in a photoresist includes forming a photoresist layer over a substrate, and selectively exposing the photoresist layer to actinic radiation to form a latent pattern. The latent pattern is developed by applying a developer composition to the selectively exposed photoresist layer to form a pattern. The developer composition includes a first solvent having Hansen solubility parameters of 15<?d<25, 10<?p<25, and 6<?h<30; an acid having an acid dissociation constant, pKa, of ?15<pKa<5, or a base having a pKa of 40>pKa>9.5; and a second solvent having a dielectric constant greater than 18. The first solvent and the second solvent are different solvents.
    Type: Application
    Filed: September 11, 2020
    Publication date: May 6, 2021
    Inventors: Ming-Hui WENG, An-Ren ZI, Ching-Yu CHANG, Chen-Yu LIU
  • Patent number: 10974994
    Abstract: A method of forming a core-shell composite material includes depositing a polysiloxane shell to wrap a ceramic core via chemical vapor deposition for forming a core-shell composite material, wherein the ceramic core is an oxide of metal and silicon, which includes 100 parts by weight of calcium, 50 to 95 parts by weight of iron, 15 to 40 parts by weight of silicon, 2 to 15 parts by weight of magnesium, 2 to 20 parts by weight of aluminum, and 2 to 10 parts by weight of manganese.
    Type: Grant
    Filed: December 19, 2019
    Date of Patent: April 13, 2021
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Sheng-Min Yu, Chien-Chung Hsu, Kai-Hsiang Chuang, Ming-Hui Chang
  • Patent number: 9780171
    Abstract: A lateral-diffused metal oxide semiconductor device including a substrate, a second deep well, a gate, a source, a drain and a first dopant region is provided. The substrate includes a first deep well having a first conductive type. The second deep well having a second conductive type is disposed in the first deep well. The gate is disposed on the substrate and the boundary of the first and the second deep well. The source and the drain having a second conductive type are disposed beside the gate and in the first deep well and the second deep well respectively. The first dopant region having a first conductive type is disposed in the second deep well, wherein the first dopant region is separated from the drain. Moreover, a method for fabricating said lateral-diffused metal oxide semiconductor device is also provided.
    Type: Grant
    Filed: August 31, 2016
    Date of Patent: October 3, 2017
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Ming-Shing Chen, Wei-Ting Wu, Ming-Hui Chang, Chao-Chun Ning
  • Patent number: 9658089
    Abstract: An electromagnetic flowmeter with voltage-amplitude conductivity-sensing function for a liquid in a tube includes a first microprocessor, a transducer, flow-sensing device, an exciting-current generating device, a voltage-amplitude conductivity-sensing device, and a switch. The transducer includes coils and sensing electrodes. The switch is electrically connected to the first microprocessor and the sensing electrode. The switch is selectively connected to the flow-sensing device or the voltage-amplitude conductivity-sensing device according to the signals sent from the microprocessor. The microprocessor drives the exciting-current generating device to generate an exciting current when the switch is connected to the flow-sensing device. The microprocessor stops the exciting-current generating device from generating exciting current and computing conductivity of liquid when the switch is electrically connected to the voltage-amplitude conductivity-sensing device.
    Type: Grant
    Filed: October 1, 2014
    Date of Patent: May 23, 2017
    Assignee: Finetek Co., Ltd.
    Inventors: Ming-Hui Chang, Chi-Chih Chou, Chun-Ju Chen, Chun-Hung Chen, Yi-Liang Hou
  • Publication number: 20170115147
    Abstract: An electromagnetic flowmeter with voltage-amplitude conductivity-sensing function for a liquid in a tube includes a first microprocessor, a transducer, flow-sensing device, an exciting-current generating device, a voltage-amplitude conductivity-sensing device, and a switch. The transducer includes coils and sensing electrodes. The switch is electrically connected to the first microprocessor and the sensing electrode. The switch is selectively connected to the flow-sensing device or the voltage-amplitude conductivity-sensing device according to the signals sent from the microprocessor. The microprocessor makes the exciting-current generating device to generate an exciting current when the switch is connected to the flow-sensing device. The microprocessor makes the exciting-current generating device to stop generating exciting current and computing conductivity of liquid when the switch is electrically connected to the voltage-amplitude conductivity-sensing device.
    Type: Application
    Filed: January 3, 2017
    Publication date: April 27, 2017
    Inventors: Ming-Hui CHANG, Chi-Chih CHOU, Chun-Ju CHEN, Chun-Hung CHEN, Yi-Liang HOU
  • Publication number: 20160372554
    Abstract: A lateral-diffused metal oxide semiconductor device including a substrate, a second deep well, a gate, a source, a drain and a first dopant region is provided. The substrate includes a first deep well having a first conductive type. The second deep well having a second conductive type is disposed in the first deep well. The gate is disposed on the substrate and the boundary of the first and the second deep well. The source and the drain having a second conductive type are disposed beside the gate and in the first deep well and the second deep well respectively. The first dopant region having a first conductive type is disposed in the second deep well, wherein the first dopant region is separated from the drain. Moreover, a method for fabricating said lateral-diffused metal oxide semiconductor device is also provided.
    Type: Application
    Filed: August 31, 2016
    Publication date: December 22, 2016
    Inventors: Ming-Shing Chen, Wei-Ting Wu, Ming-Hui Chang, Chao-Chun Ning
  • Patent number: 9490360
    Abstract: Provided is a semiconductor device including a P-type substrate, a P-type first well region, an N-type second well region, a gate, N-type source and drain regions, a dummy gate and an N-type deep well region. The first well region is in the substrate. The second well region is in the substrate proximate to the first well region. The gate is on the substrate and covers a portion of the first well region and a portion of the second well region. The source region is in the first well region at one side of the gate. The drain region is in the second well region at another side of the gate. The dummy gate is on the substrate between the gate and the drain region. The deep well region is in the substrate and surrounds the first and second well regions. An operation method of the semiconductor device is further provided.
    Type: Grant
    Filed: February 19, 2014
    Date of Patent: November 8, 2016
    Assignee: United Microelectronics Corp.
    Inventors: Ming-Shing Chen, Ming-Hui Chang, Wei-Ting Wu, Ying-Chou Lai, Horng-Nan Chern, Chorng-Lih Young, Chin-Sheng Yang
  • Patent number: 9478457
    Abstract: Shallow trench isolation structures in a semiconductor device and a method for manufacturing the same. The method includes steps hereinafter. A substrate is provided with a pad oxide layer and a first patterned photoresist layer thereon. A first trench is formed in the substrate corresponding to the first patterned photoresist layer. A first dielectric layer is deposited in the first trench and on the substrate. A second patterned photoresist layer is provided to form an opening in the first dielectric layer and a second trench in the substrate corresponding to the second patterned photoresist layer. A second dielectric layer is deposited to cover the first trench and the second trench in the substrate and the first dielectric layer on the substrate. The second dielectric layer is removed by chemical-mechanical polishing until the first dielectric layer is exposed. The first dielectric layer on the substrate is selectively removed.
    Type: Grant
    Filed: December 2, 2015
    Date of Patent: October 25, 2016
    Assignee: UNITED MICROELECTRONICS CORPORATION
    Inventors: Ming-Shing Chen, Yu-Ting Wang, Ming-Hui Chang
  • Patent number: 9461166
    Abstract: A lateral-diffused metal oxide semiconductor device including a substrate, a second deep well, a gate, a source, a drain and a first dopant region is provided. The substrate includes a first deep well having a first conductive type. The second deep well having a second conductive type is disposed in the first deep well. The gate is disposed on the substrate and the boundary of the first and the second deep well. The source and the drain having a second conductive type are disposed beside the gate and in the first deep well and the second deep well respectively. The first dopant region having a first conductive type is disposed in the second deep well, wherein the first dopant region is separated from the drain. Moreover, a method for fabricating said lateral-diffused metal oxide semiconductor device is also provided.
    Type: Grant
    Filed: November 5, 2013
    Date of Patent: October 4, 2016
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Ming-Shing Chen, Wei-Ting Wu, Ming-Hui Chang, Chao-Chun Ning
  • Patent number: 9379237
    Abstract: A LDMOS includes a gate structure disposed on the surface of a semiconductor substrate, a source region having a first conductivity type, a drain region having the first conductivity type, an isolation region surrounding the source/drain regions, a doped region having a second conductivity type, and a base region having the second conductivity type formed in the doped region. The source/drain regions are respectively disposed on two sides of the gate structure. The doped region surrounds the isolation region, and the bottom of the doped region is deeper than the bottom of the isolation region. The base region is disposed at the surface of the semiconductor substrate.
    Type: Grant
    Filed: January 22, 2015
    Date of Patent: June 28, 2016
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Ming-Hui Chang, Wei-Ting Wu, Ming-Shing Chen
  • Publication number: 20160097662
    Abstract: An electromagnetic flowmeter with voltage-amplitude conductivity-sensing function for a liquid in a tube includes a first microprocessor, a transducer, flow-sensing device, an exciting-current generating device, a voltage-amplitude conductivity-sensing device, and a switch. The transducer includes coils and sensing electrodes. The switch is electrically connected to the first microprocessor and the sensing electrode. The switch is selectively connected to the flow-sensing device or the voltage-amplitude conductivity-sensing device according to the signals sent from the microprocessor. The microprocessor makes the exciting-current generating device to generate an exciting current when the switch is connected to the flow-sensing device. The microprocessor makes the exciting-current generating device to stop generating exciting current and computing conductivity of liquid when the switch is electrically connected to the voltage-amplitude conductivity-sensing device.
    Type: Application
    Filed: October 1, 2014
    Publication date: April 7, 2016
    Inventors: Ming-Hui CHANG, Chi-Chih CHOU, Chun-Ju CHEN, Chun-Hung CHEN, Yi-Liang HOU
  • Publication number: 20160086843
    Abstract: Shallow trench isolation structures in a semiconductor device and a method for manufacturing the same. The method includes steps hereinafter. A substrate is provided with a pad oxide layer and a first patterned photoresist layer thereon. A first trench is formed in the substrate corresponding to the first patterned photoresist layer. A first dielectric layer is deposited in the first trench and on the substrate. A second patterned photoresist layer is provided to form an opening in the first dielectric layer and a second trench in the substrate corresponding to the second patterned photoresist layer. A second dielectric layer is deposited to cover the first trench and the second trench in the substrate and the first dielectric layer on the substrate. The second dielectric layer is removed by chemical-mechanical polishing until the first dielectric layer is exposed. The first dielectric layer on the substrate is selectively removed.
    Type: Application
    Filed: December 2, 2015
    Publication date: March 24, 2016
    Applicant: UNITED MICROELECTRONICS CORPORATION
    Inventors: Ming-Shing Chen, Yu-Ting Wang, Ming-Hui Chang
  • Patent number: 9285256
    Abstract: An electromagnetic flowmeter with variable-frequency conductivity-sensing function for a liquid in a tube includes a first microprocessor, a transducer, flow-sensing device, an exciting-current generating device, a variable-frequency conductivity measuring device, and a switch. The transducer includes coils and sensing electrodes. The switch is electrically connected to the first microprocessor and the sensing electrodes. The switch is selectively connected to the flow-sensing device or the variable-frequency conductivity measuring device according to the signals sent from the first microprocessor. The microprocessor makes the exciting-current generating device to generate an exciting current when the switch is connected to the flow-sensing device. The first microprocessor makes the exciting-current generating device stop to generate exciting current and computes conductivity of liquid when the switch is electrically connected to the variable-frequency conductivity-sensing device.
    Type: Grant
    Filed: October 27, 2014
    Date of Patent: March 15, 2016
    Assignee: Finetek Co., Ltd.
    Inventors: Ming-Hui Chang, Chi-Chih Chou, Chun-Ju Chen, Yi-Liang Hou
  • Publication number: 20160027683
    Abstract: Shallow trench isolation structures in a semiconductor device and a method for manufacturing the same. The method include steps hereinafter. A substrate is provided with a pad oxide layer and a first patterned photoresist layer thereon. A first trench is formed in the substrate corresponding to the first patterned photoresist layer. A first dielectric layer is deposited in the first trench and on the substrate. A second patterned photoresist layer is provided to form an opening in the first dielectric layer and a second trench in the substrate corresponding to the second patterned photoresist layer. A second dielectric layer is deposited covering the first trench and the second trench in the substrate and the first dielectric layer on the substrate. The second dielectric layer is removing by chemical-mechanical polishing until the first dielectric layer is exposed. The first dielectric layer on the substrate selectively is removed.
    Type: Application
    Filed: August 12, 2014
    Publication date: January 28, 2016
    Applicant: UNITED MICROELECTRONICS CORPORATION
    Inventors: Ming-Shing Chen, Yu-Ting Wang, Ming-Hui Chang
  • Patent number: 9236289
    Abstract: Shallow trench isolation structures in a semiconductor device and a method for manufacturing the same. The method include steps hereinafter. A substrate is provided with a pad oxide layer and a first patterned photoresist layer thereon. A first trench is formed in the substrate corresponding to the first patterned photoresist layer. A first dielectric layer is deposited in the first trench and on the substrate. A second patterned photoresist layer is provided to form an opening in the first dielectric layer and a second trench in the substrate corresponding to the second patterned photoresist layer. A second dielectric layer is deposited covering the first trench and the second trench in the substrate and the first dielectric layer on the substrate. The second dielectric layer is removing by chemical-mechanical polishing until the first dielectric layer is exposed. The first dielectric layer on the substrate selectively is removed.
    Type: Grant
    Filed: August 12, 2014
    Date of Patent: January 12, 2016
    Assignee: UNITED MICROELECTRONICS CORPORATION
    Inventors: Ming-Shing Chen, Yu-Ting Wang, Ming-Hui Chang
  • Publication number: 20150236150
    Abstract: Provided is a semiconductor device including a P-type substrate, a P-type first well region, an N-type second well region, a gate, N-type source and drain regions, a dummy gate and an N-type deep well region. The first well region is in the substrate. The second well region is in the substrate proximate to the first well region. The gate is on the substrate and covers a portion of the first well region and a portion of the second well region. The source region is in the first well region at one side of the gate. The drain region is in the second well region at another side of the gate. The dummy gate is on the substrate between the gate and the drain region. The deep well region is in the substrate and surrounds the first and second well regions. An operation method of the semiconductor device is further provided.
    Type: Application
    Filed: February 19, 2014
    Publication date: August 20, 2015
    Applicant: United Microelectronics Corp.
    Inventors: Ming-Shing Chen, Ming-Hui Chang, Wei-Ting Wu, Ying-Chou Lai, Horng-Nan Chern, Chorng-Lih Young, Chin-Sheng Yang