Abstract: A mixer-based microwave signal generation device is provided, and the mixer-based microwave signal generation device includes a microwave local oscillator source, a mixer, a first filter, a laser, an electro-optic modulator, an optical signal delayer, a photodetector, a second filter, an amplifier and a passive power divider.

Abstract: The disclosure discloses a historical map utilization method based on a vision robot, including: S1, the vision robot is controlled to continuously collect image of a preset road sign of a preset working area, and road sign information of the preset road sign is obtained; S2, the obtained road sign information is transmitted to a first map positioning system and a second map positioning system; S3, the first map positioning system and the second map positioning system are controlled to respectively process corresponding road sign information, thereby obtaining first pose information and second pose information; S4, the first pose information and the second pose information under the same preset road sign are selected, and a transformation relationship formula of the first pose information and the second pose information is calculated; and S5, the historical map is controlled to perform a corresponding transformation operation, and subsequent motion control is performed.

Abstract: A method for forming a pixelated optoelectronic stack comprises forming a stacked layer structure that comprises a bottom electrode layer, an optoelectronic layer over the bottom electrode layer, and a patterned hard-mask comprising a pattern over the optoelectronic layer. The method comprises replicating the pattern into the optoelectronic layer and the bottom electrode layer, thereby forming a first intermediate pixelated stack comprising at least two islands of stack separated from one another by stack-free areas; providing an electrically insulating layer on the first intermediate pixelated stack; removing a top portion of the electrically insulating layer and removing any remaining hard-mask so that a top surface of the electrically insulating layer is coplanar with an exposed top surface of the first intermediate pixelated stack, yielding a second intermediate pixelated stack; and forming a top transparent electrode layer over the second intermediate pixelated stack.

Abstract: An automatic yarn feeding system is provided. The system comprises a yarn feeding track which is arranged on the twisting machine in a length direction of the twisting machine and provided with a yarn feeding manipulator walking along the yarn feeding track; and a supply zone which is arranged on one side of the yarn feeding track and used to buffer base yarns. The yarn feeding manipulator is used to convey the base yarns from the supply zone to a yarn feeding creel of each spindle position. The yarn feeding track is located in the middle of the top of the twisting machine. The supply zone is provided with a structure for buffering a plurality of base yarns, and is located on one side of an end of the yarn feeding track on the top of a control cabinet.

Abstract: A well cementing method is described for improving cementing quality by controlling the hydration heat of cement slurry. By controlling the degree and/or rate of hydration heat release from cement slurry, the method improves the hydration heat release during formation of cement with curing of cement slurry, improves the binding quality between the cement and the interfaces, and in turn improves the cementing quality at the open hole section and/or the overlap section. The cementing method improves cementing quality of oil and gas wells and reduces the risk of annular pressure.

Abstract: When a first device is an EHT site, a second device generates a frame in a first non-HT format or a frame in a first non-HT duplicated format, where at least three bits in the first seven bits of a scrambling sequence of the frame in the first non-HT format or the frame in the first non-HT duplicated format indicate a bandwidth mode of a channel; or when a first device is a VHT site or an HE site that does not support an EHT, a second device generates a frame in a second non-HT format or a frame in a second non-HT duplicated format, where two bits in the first seven bits of a scrambling sequence of the frame in the second non-HT format or the frame in the second non-HT duplicated format indicate a bandwidth mode of a channel.

Abstract: A light guide module is provided, which includes a circuit board, one or more light-emitting elements, a light guide plate, a first reflective layer and a second reflective layer. The one or more light-emitting elements are disposed on the circuit board. The light guide plate is located on the circuit board, in which the light guide plate has a thick portion and a thin portion connected to the thick portion, and the thin portion is located over the one or more light-emitting elements, and a side surface of the thick portion adjacent to the thin portion is laterally adjacent to the one or more light-emitting elements. The first reflective layer covers a side surface of the thick portion away from the thin portion. The second reflective layer covers an upper surface of the thick portion and an upper surface of the thin portion.

Abstract: A traction apparatus, comprising a clip portion (2) and a traction portion (1), the traction portion containing a closed traction structure (11); the closed traction structure being made from an elastic material; the clip portion comprising a main clip body (23, 25) and a clip arm (24, 26); the main clip body being capable of passing through a biopsy channel (4) of an endoscope (3), the clip arm being capable of clip the closed traction structure. Also disclosed is a traction ring used for the traction apparatus, the traction ring being a single closed traction structure or being formed by connecting several closed traction structures, the traction ring being made from an elastic material.

Abstract: Disclosed is a microwave photonic Ising machine, including: a closed loop including a phase and electro-optical conversion module and a storage, correlation and photoelectric conversion module connected in turn; a laser light source configured to generate and input an optical signal to the phase and electro-optical conversion module; and a microwave pulse local oscillator source configured to generate and input a microwave pulse signal to the phase and electro-optical conversion module. The phase and electro-optical conversion module is configured to modulate the microwave pulse signal, the optical signal, and a phase-specific two-phase microwave pulse spin electrical signal input from the storage, correlation and photoelectric conversion module to obtain and input a phase-specific two-phase microwave pulse spin optical signal to the storage, correlation and photoelectric conversion module for storage and correlation.

Abstract: A multi-crop adaptive seed delivery and uniform seed distribution device, including: a seed storage box, a seed metering mechanism, a seed distributor lower housing, a seed distributor upper housing, and a blade driving mechanism. Closed accommodating cavity is formed between the seed distributor upper and lower housing; N seed guide tubes are arranged in circumferential direction, N being positive integer equal to or greater than 2; N blades are rotatably mounted in accommodating cavity; blades are arranged in vertical direction; closed independent seed guide cavity is divided in accommodating cavity by two adjacent blades; upper end of each seed guide tube is connected with corresponding seed guide cavity; top of seed distributor upper housing is divided into N fan-shaped areas in circumferential direction; upper end of each blade is connected to edge of corresponding fan-shaped area by means of elastic piece; and collision sensor is provided in each fan-shaped area.

Abstract: A transistor includes a first semiconductor layer, a second semiconductor layer, a semiconductor nanosheet, a gate electrode and source and drain electrodes. The semiconductor nanosheet is physically connected to the first semiconductor layer and the second semiconductor layer. The gate electrode wraps around the semiconductor nanosheet. The source and drain electrodes are disposed at opposite sides of the gate electrode. The first semiconductor layer surrounds the source electrode, the second semiconductor layer surrounds the drain electrode, and the semiconductor nanosheet is disposed between the source and drain electrodes.

Abstract: A method for reducing a total power consumption of multiple servers includes determining a power consumption characteristic of each of the multiple servers; retrieving, by a manager, the power consumption characteristic of the each of the multiple servers; and performing load balancing on the multiple servers through the manager to reduce the total power consumption of the multiple servers. The load balancing is performed based at least in part on the power consumption characteristic of one or more of the multiple servers.

Abstract: The present disclosure, in some embodiments, relates to a method of forming an integrated chip structure. The method may be performed by forming a plurality of interconnect layers within a first interconnect structure disposed over an upper surface of a first semiconductor substrate. An edge trimming process is performed to remove parts of the first interconnect structure and the first semiconductor substrate along a perimeter of the first semiconductor substrate. The edge trimming process results in the first semiconductor substrate having a recessed surface coupled to the upper surface by way of an interior sidewall disposed directly over the first semiconductor substrate. A dielectric capping structure is formed onto a sidewall of the first interconnect structure after performing the edge trimming process.

Abstract: A surface covering is provided. The surface covering is made of a composition of a polymer a bio-based plasticizer, a stabilizer, and a co-stabilizer.

Abstract: The present disclosure provides an LED display module and an LED display device. The LED display module includes a display module body and a lock. The lock includes: a lock seat arranged on a rear side of the display module body; a lock cylinder rotatably arranged in the lock seat; a locking member; an interference member rotatably sleeved on the lock cylinder and spaced apart from the locking member along the axial direction of the lock cylinder, the interference member having an interference position where the interference member locates on a front side of a connecting beam for lifting up the display module body and an avoidance position where the interference member avoids the connecting beam; and an elastic linkage member arranged between the locking member and the interference member. When the locking member is in an unlocking position, the interference member is driven to an interference position by the elastic linkage member.

Abstract: A method for manufacturing a semiconductor device includes: providing a wafer-bonding stack structure having a sidewall layer and an exposed first component layer; forming a photoresist layer on the first component layer; performing an edge trimming process to at least remove the sidewall layer; and removing the photoresist layer. In this way, contaminant particles generated from the blade during the edge trimming process may fall on the photoresist layer but not fall on the first component layer, so as to protect the first component layer from being contaminated.

Abstract: A device includes a memory array, bit line pairs, word lines, a modulation circuit and a control signal generator. The memory array has bit cells arranged in rows and columns. Each bit line pair is connected to a respective column of bit cells. Each word line is connected to a respective row of bit cells. The modulation circuit is coupled with at least one bit line pair. The control signal generator is coupled with the modulation circuit. The control signal generator includes a tracking wiring with a tracking length positively correlated with a depth distance of the word lines. The control signal generator is configured to produce a control signal, switching to a first voltage level for a first time duration in reference with the tracking length, for controlling the modulation circuit. A method of controlling aforesaid device is also disclosed.

Abstract: A thin film transistor and method of making the same, the thin film transistor including: a substrate; a word line disposed on the substrate; a semiconductor layer disposed on the substrate, the semiconductor layer having a source region, a drain region, and a channel region disposed between the source and drain regions and overlapping with the word line in a vertical direction perpendicular to a plane of the substrate; a hydrogen diffusion barrier layer overlapping with the channel region in the vertical direction; a gate dielectric layer disposed between the channel region and the word line; and source and drain electrodes respectively electrically coupled to the source and drain regions.

Abstract: Semiconductor device structures having metal gate structures with tunable work function values are provided. In one example, a first gate structure and a second gate structure formed on a substrate, wherein the first gate structure includes a first work function metal having a first material, and the second gate structure includes a second work function metal having a second material, the first material being different from the second material, wherein the first gate structure further includes a gate dielectric layer, a self-protective layer having metal phosphate, and the first work function metal on the self-protective layer.

Abstract: A memory device including a base semiconductor die, conductive terminals, memory dies, an insulating encapsulation and a buffer cap is provided. The conductive terminals are disposed on a first surface of the base semiconductor die. The memory dies are stacked over a second surface of the base semiconductor die, and the second surface of the base semiconductor die is opposite to the first surface of the base semiconductor die. The insulating encapsulation is disposed on the second surface of the base semiconductor die and laterally encapsulates the memory dies. The buffer cap covers the first surface of the base semiconductor die, sidewalls of the base semiconductor die and sidewalls of the insulating encapsulation. A package structure including the above- mentioned memory device is also provided.