Patents by Inventor Ming Liang
Ming Liang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12274102Abstract: A package structure is provided. The package structure includes a substrate, an electrode layer, a lighting unit, a wall, and a package compound. The substrate and the wall that is disposed on the substrate jointly define an accommodating space. The lighting unit in the accommodating space and is electrically connected to the electrode layer disposed on the substrate. The package compound covers the electrode layer, and the lighting unit. The package compound includes an attaching portion disposed on a top surface of the lighting unit and a surrounding portion that is arranged around the attaching portion. The surrounding portion has an annular slot arranged on a top surface thereof. A bottom end of the annular slot is located at a position aligning with 25%˜90% of a thickness of the lighting diode along a height direction.Type: GrantFiled: January 5, 2021Date of Patent: April 8, 2025Assignees: LITE-ON OPTO TECHNOLOGY (CHANGZHOU) CO., LTD., LITE-ON TECHNOLOGY CORPORATIONInventors: Wei-Te Cheng, Kuo-Ming Chiu, Meng-Sung Chou, Kai-Chieh Liang, Jie-Ting Tsai
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Publication number: 20250111173Abstract: The present disclosure proposes a method, apparatus and computer program product for sentence representation generation for cross-lingual retrieval. A target sentence may be obtained. An initial target sentence representation of the target sentence may be generated through an encoder, the encoder pretrained through a contrastive context prediction mechanism. A target sentence representation of the target sentence for cross-lingual retrieval may be generated based on the initial target sentence representation through cross-lingual calibration.Type: ApplicationFiled: November 30, 2022Publication date: April 3, 2025Inventors: Ning WU, Yaobo LIANG, Baoquan FAN, Linjun SHOU, Ming GONG, Daxin JIANG, Nan DUAN
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Publication number: 20250112197Abstract: A semiconductor package includes a carrier substrate comprising a first surface and a second surface opposite to the first surface. A first electronic component and a second electronic component are mounted on the first surface of the carrier substrate in a side-by-side manner. The first electronic component is provided with first data (DQ) pads along a first side directly facing the second electronic component. The second electronic component is provided with second data (DQ) pads along a second side in proximity to the first electronic component. The first DQ pads are directly connects to the second DQ pads through first bond wires.Type: ApplicationFiled: September 23, 2024Publication date: April 3, 2025Applicant: MEDIATEK INC.Inventors: Yu-Liang Hsiao, Ming-Hsien Chou
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Publication number: 20250113588Abstract: A method includes depositing a first work function layer over a first and second gate trench. The method includes depositing a second work function layer over the first work function layer. The method includes etching the second work function layer in the first gate trench while covering the second work function layer in the second gate trench, causing the first work function layer in the first gate trench to contain metal dopants that are left from the second work function layer etched in the first gate trench. The method includes forming a first active gate structure and second active gate structure, which include the first work function layer and the metal dopants left from the second work function layer in the first gate trench, and the first work function layer and no metal dopants left behind from the second work function layer, respectively.Type: ApplicationFiled: December 13, 2024Publication date: April 3, 2025Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Yu-Chi Pan, Kuo-Bin Huang, Ming-Hsi Yeh, Ying-Liang Chuang, Yu-Te Su, Kuan-Wei Lin
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Publication number: 20250112040Abstract: A process chamber and method of modulating thin film growth on a wafer using a plasma-enhanced chemical vapor deposition (PECVD) process is described. During a first deposition phase, a first portion of a film is disposed on a wafer on a pedestal in a process chamber. During a second deposition phase, a second portion of the film is deposited on the wafer. The wafer is unclamped from the pedestal prior to the first and/or second deposition phase and remains unclamped during the first and/or second deposition phase. The wafer has a non-zero wafer bow during unclamped deposition phase to provide a radially non-uniform thickness profile of the film on the wafer.Type: ApplicationFiled: January 30, 2023Publication date: April 3, 2025Inventors: Xin Meng, Defu Liang, Hu Kang, Joseph Lindsey Womack, Ming Li
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Patent number: 12267839Abstract: This application provides a communication method and apparatus, and relates to the field of communication technologies. An AP generates a trigger frame, where the trigger frame includes a first user information field, a part or all of a frequency domain resource indicated by a resource unit allocation subfield in a fourth user information field before the first user information field is located on a primary 160 MHz channel, and a part or all of a frequency domain resource indicated by a resource unit allocation subfield in a fourth user information field after the first user information field is located on a secondary 160 MHz channel. Then, the AP sends the trigger frame.Type: GrantFiled: October 16, 2023Date of Patent: April 1, 2025Assignee: Huawei Technologies Co., Ltd.Inventors: Ming Gan, Mengshi Hu, Jian Yu, Dandan Liang, Yiqing Li, Yunbo Li, Yuchen Guo
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Patent number: 12265301Abstract: An electronic device includes a substrate, a sidewall, a plurality of light emitting elements and an optical element. The sidewall is connected to the substrate. The plurality of light emitting elements are disposed on the substrate. The optical element covers at least two of the plurality of light emitting elements, wherein, in a cross-sectional view of the electronic device, a portion of the optical element is disposed between two adjacent ones of the plurality of light emitting elements, and a height of the sidewall is greater than a thickness of the optical element.Type: GrantFiled: October 20, 2023Date of Patent: April 1, 2025Assignee: INNOLUX CORPORATIONInventors: Chin-Lung Ting, Ming-Hui Chu, Fang-Ho Lin, Chia-Lun Chen, Yen-Liang Chen
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Publication number: 20250101151Abstract: A hydrocarbon resin polymer including a repeating unit (A) is derived from dicyclopentadiene (DCPD). The hydrocarbon resin polymer has a fluorine substituent, and the content of the fluorine substituent is 100 to 4500 ppm based on the total weight of the hydrocarbon resin polymer. A manufacturing method of the above hydrocarbon resin polymer. The manufacturing method includes polymerizing a mixture in the presence of a fluorine-containing compound, wherein the fluorine-containing compound is a boron trifluoride complex and the mixture includes a dicyclopentadiene. A substrate structure includes a resin layer, and a conductive layer disposed on the resin layer. The resin layer is formed from a resin composition including the above hydrocarbon resin polymer using a cross-linking process.Type: ApplicationFiled: September 25, 2024Publication date: March 27, 2025Inventors: Chien-Han CHEN, Wei-Liang LEE, Ming-Hung LIAO, Yu-Tien CHEN, Yu-Chen HSU, Ka Chun AU-YEUNG, Chiung-Yao HUANG, Tzu-Yin HUANG, Yi-Hsuan TANG
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Publication number: 20250100916Abstract: A method for removing inorganic substances from wastewater is provided. The method includes: providing a fluidized bed reactor, wherein carriers are added into the fluidized bed reactor, and the carriers includes polyvinylidene fluoride (PVDF), ethylene tetrafluoroethylene (ETFE), alumina (Al2O3) with purity more than 95 wt %, or combinations thereof; introducing the wastewater containing the inorganic substances and a first reagent into the fluidized bed reactor; fluidizing the carriers in the fluidized bed reactor, and making the inorganic substances in the wastewater reacting with the first reagent to form crystals, wherein the crystals are formed on the outer surfaces of the carriers.Type: ApplicationFiled: February 7, 2024Publication date: March 27, 2025Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Mao-Sung LEE, Teh-Ming LIANG, Wang-Kuan CHANG
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Patent number: 12259558Abstract: An optical sensor includes a light source emitting signal light, a light sensing element on an optical path of the signal light, and a photoelectric conversion element on a side of the light sensing element away from the light source. The light sensing element is used to receive ambient light and the signal light on one side and transmit an incident light on another side, wherein a transmittance of the light sensing element changes according to an intensity of the ambient light to adjust an intensity of the incident light transmitted from the light sensing element. The photoelectric conversion element is configured to receive the incident light transmitted from the light sensing element, and to output a voltage modulation signal according to the incident light. A glasses is also provided.Type: GrantFiled: January 8, 2024Date of Patent: March 25, 2025Assignees: Asphetek Solution (Chengdu) Ltd., ADVANCED OPTOELECTRONIC TECHNOLOGY, INC., Asphetek Solution Inc.Inventors: Yuan-Ting Liang, Chung-Wu Liu, Yi-Huan Chou, I-Ming Cheng
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Patent number: 12261092Abstract: A semiconductor package includes a semiconductor device, an encapsulating material, a redistribution structure, and an adhesive residue. The encapsulating material encapsulates a first part of a side surface of the semiconductor device. The redistribution structure is disposed over the semiconductor device and a first side of the encapsulating material. The adhesive residue is disposed over a second side of the encapsulating material opposite to the first side and surrounding the semiconductor device, wherein the adhesive residue encapsulates a second part of the side surface of the semiconductor device.Type: GrantFiled: August 30, 2021Date of Patent: March 25, 2025Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Tzu-Sung Huang, Ming-Hung Tseng, Yen-Liang Lin, Ban-Li Wu, Hsiu-Jen Lin, Teng-Yuan Lo, Hao-Yi Tsai
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Publication number: 20250093713Abstract: A display panel includes a first substrate and a shading structure. The shading structure is disposed on the first substrate. The shading structure includes a plurality of first parts and a second part. One of the plurality of first parts extends along a first direction. The second part protrudes from the one of the plurality of first part. Wherein the second part is separated from another one of the plurality of first parts adjacent to the one of the plurality of first parts, and the another one of the plurality of first parts extends along the first direction.Type: ApplicationFiled: November 25, 2024Publication date: March 20, 2025Applicant: Red Oak Innovations LimitedInventors: Li-Ming LIN, Chih-Ming LIANG
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Publication number: 20250092681Abstract: A first plurality of roofing shingles installed in a first plurality of rows on a roof deck, and a second plurality of roofing shingles installed in a second plurality of rows. An edge of one of the second roofing shingles in each of the second rows is offset from the edge of another one of the second roofing shingles in another adjacent one of the second rows. An edge of a first photovoltaic shingle is juxtaposed with the edge of a first roofing shingle of the second roofing shingles in a first row of the second rows. The edge of at least another photovoltaic shingle in at least one of another row of the second rows is substantially aligned with the edge of the first photovoltaic shingle. An additional roofing shingle is installed intermediate one of the second roofing shingles and one of the photovoltaic shingles.Type: ApplicationFiled: August 20, 2024Publication date: March 20, 2025Inventors: Michael David Kuiper, Evan Michael Wray, Daniel East, Olan T. Leitch, Ming-Liang Shiao
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Publication number: 20250098410Abstract: A method for manufacturing an electronic device is provided. The method includes providing a first substrate. The method further includes forming a bank layer on the first substrate. The bank layer includes a bank wall and a first opening, and the first opening adjacent to the bank wall. The method further includes forming a light conversion layer in the first opening. The method further includes forming a spacer on the bank wall. The method further includes providing a second substrate. The method further includes transferring a plurality of electronic units to the second substrate. The method further includes overlapping the first substrate and second substrate, so that the spacer is located between the first substrate and the second substrate.Type: ApplicationFiled: August 15, 2024Publication date: March 20, 2025Inventors: Chih-Ming LIANG, Yi-An CHEN, Feng-Yu LIN, Chiung-Chieh KUO
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Patent number: 12254674Abstract: A method for recognizing arteries and veins on a fundus image includes: executing a pre-process operation on the fundus image, so as to obtain a pre-processed fundus image; generating a fundus spectral reflection dataset associated with pixels of the pre-processed fundus image, based on the pre-processed fundus image, and a spectral transformation matrix; obtaining a plurality of principle component scores associated with the pixels of the pre-processed fundus image, respectively; and determining, for each of the pixels of the pre-processed fundus image that has been determined as a part of a blood vessel, whether the pixel belongs to a part of an artery or a part of a vein.Type: GrantFiled: July 22, 2022Date of Patent: March 18, 2025Assignee: National Chung Cheng UniversityInventors: Hsiang-Chen Wang, Yu-Ming Tsao, Yong-Song Chen, Yu-Sin Liu, Shih-Wun Liang
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Patent number: 12253895Abstract: An electronic system includes a main chip, a non-volatile storage circuit, and a detector circuit. The main chip is configured to read first time of a clock circuit. The non-volatile storage circuit is coupled to the main chip. The main chip stores the first time into the non-volatile storage circuit. The detector circuit includes a first output terminal. The first output terminal is coupled to the main chip. When a cold boot event occurs, the main chip reads the first time from the non-volatile storage circuit, and determines a reason of the cold boot event according to the first time, a second time of the clock circuit, and a logic value at the first output terminal.Type: GrantFiled: January 3, 2023Date of Patent: March 18, 2025Assignee: Realtek Semiconductor CorporationInventors: Chao-Min Lai, Chien-Liang Chen, Ming-Tsung Tsai
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Patent number: 12255761Abstract: The application provides a short training sequence design method and apparatus. The method includes: determining a short training sequence, where the short training sequence may be obtained based on an existing sequence, and the short training sequence with comparatively good performance may be obtained through simulation calculation, for example, by adjusting a parameter; and sending a short training field on a target channel, where the short training field is obtained by performing inverse fast Fourier transformation IFFT on the short training sequence, and a bandwidth of the target channel is greater than 160 MHz.Type: GrantFiled: January 4, 2024Date of Patent: March 18, 2025Assignee: Huawei Technologies Co., Ltd.Inventors: Xin Zuo, Ming Gan, Dandan Liang
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Patent number: 12253776Abstract: A method of forming an electronic device including: providing an assembly, wherein the assembly includes a substrate, an optical film, a plurality of color filters and a defect, wherein the plurality of color filters and the defect are disposed between the substrate and the optical film; and using a laser pulse to form a first processed area that corresponds to the defect in the optical film, wherein the first processed area at least partially overlaps at least two of the plurality of color filters.Type: GrantFiled: March 25, 2024Date of Patent: March 18, 2025Assignee: INNOLUX CORPORATIONInventors: Tai-Chi Pan, Chin-Lung Ting, I-Chang Liang, Chih-Chiang Chang Chien, Po-Wen Lin, Kuang-Ming Fan, Sheng-Nan Chen
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Patent number: 12255184Abstract: A device includes a first redistribution structure comprising a first conductive line and a second conductive line. An integrated circuit die is attached to the first redistribution structure. A first via is coupled to the first conductive line on a first side, and a first conductive connector is coupled to the first conductive line on a second side opposite the first side. A second via is coupled to the second conductive line on the first side, and a second conductive connector is coupled to the second conductive line on the second side. The first via directly contacts the first conductive line without directly contacting the first conductive connector. The second via directly contacts the second conductive line and directly contacts the second conductive connector.Type: GrantFiled: June 16, 2023Date of Patent: March 18, 2025Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Chen-Hua Yu, Ming Hung Tseng, Yen-Liang Lin, Tzu-Sung Huang, Tin-Hao Kuo, Hao-Yi Tsai
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Patent number: 12255107Abstract: Semiconductor devices and methods which utilize a treatment process of a bottom anti-reflective layer are provided. The treatment process may be a physical treatment process in which material is added in order to fill holes and pores within the material of the bottom anti-reflective layer or else the treatment process may be a chemical treatment process in which a chemical reaction is used to form a protective layer. By treating the bottom anti-reflective layer the diffusion of subsequently applied chemicals is reduced or eliminated, thereby helping to prevent defects that arise from such diffusion.Type: GrantFiled: January 11, 2024Date of Patent: March 18, 2025Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Yao-Wen Hsu, Ming-Chi Huang, Ying-Liang Chuang