Patents by Inventor Ming-Lun Lee

Ming-Lun Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11916110
    Abstract: Embodiments of the present disclosure provide a method for forming semiconductor device structures. The method includes forming a fin structure having a stack of semiconductor layers comprising first semiconductor layers and second semiconductor layers alternatingly arranged, forming a sacrificial gate structure over a portion of the fin structure, removing the first and second semiconductor layers in a source/drain region of the fin structure that is not covered by the sacrificial gate structure, forming an epitaxial source/drain feature in the source/drain region, removing portions of the sacrificial gate structure to expose the first and second semiconductor layers, removing portions of the second semiconductor layers so that at least one second semiconductor layer has a width less than a width of each of the first semiconductor layers, forming a conformal gate dielectric layer on exposed first and second semiconductor layers, and forming a gate electrode layer on the conformal gate dielectric layer.
    Type: Grant
    Filed: July 4, 2022
    Date of Patent: February 27, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chih-Ching Wang, Wei-Yang Lee, Ming-Chang Wen, Jo-Tzu Hung, Wen-Hsing Hsieh, Kuan-Lun Cheng
  • Publication number: 20230207409
    Abstract: A semiconductor memory device and method of making the same are disclosed. The semiconductor memory device includes a substrate that includes a memory region and a peripheral region, a transistor including a metal gate located in the peripheral region, a composite dielectric film structure located over the metal gate of the transistor, the composite dielectric film structure including a first dielectric layer and a second dielectric layer over the first dielectric layer, where the second dielectric layer has a greater density than a density of the first dielectric layer, and at least one memory cell located in the memory region. The composite dielectric film structure provides enhanced protection of the metal gate against etching damage and thereby improves device performance.
    Type: Application
    Filed: March 1, 2023
    Publication date: June 29, 2023
    Inventors: Sheng-Chieh CHEN, Wei-Ming Wang, Ming-Lun Lee, Chih-Ren Hsieh, Ming Chyi Liu
  • Patent number: 11637046
    Abstract: A semiconductor memory device and method of making the same are disclosed. The semiconductor memory device includes a substrate that includes a memory region and a peripheral region, a transistor including a metal gate located in the peripheral region, a composite dielectric film structure located over the metal gate of the transistor, the composite dielectric film structure including a first dielectric layer and a second dielectric layer over the first dielectric layer, where the second dielectric layer has a greater density than a density of the first dielectric layer, and at least one memory cell located in the memory region. The composite dielectric film structure provides enhanced protection of the metal gate against etching damage and thereby improves device performance.
    Type: Grant
    Filed: September 14, 2021
    Date of Patent: April 25, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Sheng-Chieh Chen, Chih-Ren Hsieh, Ming-Lun Lee, Wei-Ming Wang, Ming Chyi Liu
  • Patent number: 11600543
    Abstract: A semiconductor memory device and method of making the same are disclosed. The semiconductor memory device includes a substrate that includes a memory region and a peripheral region, a transistor including a metal gate located in the peripheral region, a composite dielectric film structure located over the metal gate of the transistor, the composite dielectric film structure including a first dielectric layer and a second dielectric layer over the first dielectric layer, where the second dielectric layer has a greater density than a density of the first dielectric layer, and at least one memory cell located in the memory region. The composite dielectric film structure provides enhanced protection of the metal gate against etching damage and thereby improves device performance.
    Type: Grant
    Filed: September 14, 2021
    Date of Patent: March 7, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Sheng-Chieh Chen, Chih-Ren Hsieh, Ming-Lun Lee, Wei-Ming Wang, Ming Chyi Liu
  • Publication number: 20220270943
    Abstract: A semiconductor memory device and method of making the same are disclosed. The semiconductor memory device includes a substrate that includes a memory region and a peripheral region, a transistor including a metal gate located in the peripheral region, a composite dielectric film structure located over the metal gate of the transistor, the composite dielectric film structure including a first dielectric layer and a second dielectric layer over the first dielectric layer, where the second dielectric layer has a greater density than a density of the first dielectric layer, and at least one memory cell located in the memory region. The composite dielectric film structure provides enhanced protection of the metal gate against etching damage and thereby improves device performance.
    Type: Application
    Filed: September 14, 2021
    Publication date: August 25, 2022
    Inventors: Sheng-Chieh CHEN, Chih-Ren HSIEH, Ming-Lun LEE, Wei-Ming WANG, Ming Chyi LIU
  • Patent number: 10193019
    Abstract: A light emitting diode chip including a substrate and a light emitting diode element layer is provided. The substrate has a growth surface and a plurality of microstructures on the growth surface. An area of the growth surface occupied by the microstructures is A1 and an area of the growth surface not occupied by the micro-structures is A2, such that A1 and A2 satisfy the relation of 0.1?A2/(A1+A2)?0.5. The light emitting diode element layer is disposed on the growth surface of the substrate.
    Type: Grant
    Filed: April 30, 2018
    Date of Patent: January 29, 2019
    Assignees: Everlight Electronics Co., Ltd., Southern Taiwan University of Science and Technology
    Inventor: Ming-Lun Lee
  • Publication number: 20180254381
    Abstract: A light emitting diode chip including a substrate and a light emitting diode element layer is provided. The substrate has a growth surface and a plurality of microstructures on the growth surface. An area of the growth surface occupied by the microstructures is A1 and an area of the growth surface not occupied by the micro-structures is A2, such that A1 and A2 satisfy the relation of 0.1?A2/(A1+A2)?0.5. The light emitting diode element layer is disposed on the growth surface of the substrate.
    Type: Application
    Filed: April 30, 2018
    Publication date: September 6, 2018
    Applicants: Everlight Electronics Co., Ltd., Southern Taiwan University of Science and Technology
    Inventor: Ming-Lun Lee
  • Patent number: 9985180
    Abstract: A light emitting diode chip including a substrate and a light emitting diode element layer is provided. The substrate has a growth surface and a plurality of microstructures on the growth surface. An area of the growth surface occupied by the microstructures is A1 and an area of the growth surface not occupied by the micro-structures is A2, such that A1 and A2 satisfy the relation of 0.1?A2/(A1+A2)?0.5. The light emitting diode element layer is disposed on the growth surface of the substrate.
    Type: Grant
    Filed: August 8, 2017
    Date of Patent: May 29, 2018
    Assignees: SOUTHERN TAIWAN UNIVERSITY OF SCIENCE AND TECHNOLOGY, EVERLIGHT ELECTRONICS CO., LTD.
    Inventor: Ming-Lun Lee
  • Patent number: 9905725
    Abstract: A light emitting diode, including a semiconductor epitaxial structure, a first electrode and a second electrode is provided. The semiconductor epitaxial structure includes a plurality stacked light-emitting layers, and each of the light-emitting layers respectively emits different range of wavelength of light. The first electrode is electrically connected to the semiconductor epitaxial structure. The second electrode is electrically connected to the semiconductor epitaxial structure. Furthermore, a data transmission and reception apparatus is provided.
    Type: Grant
    Filed: September 25, 2015
    Date of Patent: February 27, 2018
    Assignee: Southern Taiwan University of Science and Technology
    Inventor: Ming-Lun Lee
  • Publication number: 20170358710
    Abstract: A light emitting diode chip including a substrate and a light emitting diode element layer is provided. The substrate has a growth surface and a plurality of microstructures on the growth surface. An area of the growth surface occupied by the microstructures is A1 and an area of the growth surface not occupied by the micro-structures is A2, such that A1 and A2 satisfy the relation of 0.1?A2/(A1+A2)?0.5. The light emitting diode element layer is disposed on the growth surface of the substrate.
    Type: Application
    Filed: August 8, 2017
    Publication date: December 14, 2017
    Applicants: Everlight Electronics Co., Ltd., Southern Taiwan University of Science and Technology
    Inventor: Ming-Lun Lee
  • Patent number: 9768354
    Abstract: A light emitting diode chip including a substrate and a light emitting diode element layer is provided. The substrate has a growth surface and a plurality of microstructures on the growth surface. An area of the growth surface occupied by the microstructures is A1 and an area of the growth surface not occupied by the microstructures is A2, such that A1 and A2 satisfy the relation of 0.1?A2/(A1+A2)?0.5. The light emitting diode element layer is disposed on the growth surface of the substrate.
    Type: Grant
    Filed: December 1, 2016
    Date of Patent: September 19, 2017
    Assignees: Everlight Electronics Co., Ltd., Southern Taiwan University of Science and Technology
    Inventor: Ming-Lun Lee
  • Publication number: 20170084785
    Abstract: A light emitting diode chip including a substrate and a light emitting diode element layer is provided. The substrate has a growth surface and a plurality of microstructures on the growth surface. An area of the growth surface occupied by the microstructures is A1 and an area of the growth surface not occupied by the microstructures is A2, such that A1 and A2 satisfy the relation of 0.1?A2/(A1+A2)?0.5. The light emitting diode element layer is disposed on the growth surface of the substrate.
    Type: Application
    Filed: December 1, 2016
    Publication date: March 23, 2017
    Inventor: Ming-Lun Lee
  • Publication number: 20170018679
    Abstract: A light emitting diode, including a semiconductor epitaxial structure, a first electrode and a second electrode is provided. The semiconductor epitaxial structure includes a plurality stacked light-emitting layers, and each of the light-emitting layers respectively emits different range of wavelength of light. The first electrode is electrically connected to the semiconductor epitaxial structure. The second electrode is electrically connected to the semiconductor epitaxial structure. Furthermore, a data transmission and reception apparatus is provided.
    Type: Application
    Filed: September 25, 2015
    Publication date: January 19, 2017
    Applicant: Southern Taiwan University of Science and Technology
    Inventor: Ming-Lun Lee
  • Patent number: 9548419
    Abstract: A light emitting diode chip including a substrate and a light emitting diode element layer is provided. The substrate has a growth surface and a plurality of microstructures on the growth surface, wherein an area of the growth surface occupied by the microstructures is A1 and an area of the growth surface not occupied by the micro-structures is A2, wherein A1 and A2 satisfies the relation of 0.1?A2/(A1+A2)?0.5. The light emitting diode element layer is disposed on the growth surface of the substrate.
    Type: Grant
    Filed: October 23, 2014
    Date of Patent: January 17, 2017
    Assignees: Southern Taiwan University of Science and Technology, EVERLIGHT ELECTRONICS CO., LTD.
    Inventor: Ming-Lun Lee
  • Patent number: 9450117
    Abstract: The present invention provides a optoelectronic device having a surface periodic grating structure and a manufacturing method thereof, which includes: a substrate; a multi-layer semiconductor structure layer formed on the substrate; and a periodic grating structure layer embedded in the multi-layer semiconductor structure layer by etching based on optimized parameters. A direction of an incident light to the optoelectronic device is changed to be resonant to the multi-layer semiconductor structure layer to enhance optoelectricity of the optoelectronic device. The method includes: (1) providing a substrate; (2) forming a multi-layer semiconductor structure layer on the substrate; (3) selecting parameters to perform a design for a periodic grating structure layer on a surface of the multi-layer semiconductor structure layer; and (4) forming the periodic grating structure layer embedded in the multi-layer semiconductor structure layer by etching.
    Type: Grant
    Filed: November 10, 2014
    Date of Patent: September 20, 2016
    Assignee: Kingwave Corporation
    Inventors: Chieh-Hsiung Kuan, Ming-Lun Lee
  • Publication number: 20160225924
    Abstract: The present invention provides a solar cell with a surface staged type antireflective layer, comprising a photoelectric conversion layer having a first surface and a second surface opposite from each other and used for receiving incident photons in order to generate charged carriers; a staged type antireflective layer formed on the first surface; the staged type antireflective layer comprising a textured surface structure formed on the first surface via a coarsening method and a plurality of nanostructures formed to protrude from or indent into the textured surface structure; a front-side conductive layer disposed on top the staged type antireflective layer; and a back-side conductive layer disposed underneath the second surface; wherein the s staged type antireflective layer is used for allowing the solar cell to generate an antireflection effect subject to light in a full spectrum range; wherein the full spectrum range is between 300 nm to 1100 nm.
    Type: Application
    Filed: July 24, 2015
    Publication date: August 4, 2016
    Inventors: Chieh-Hsiung Kuan, Ming-Lun Lee, Wen-Sheng Su
  • Publication number: 20150350815
    Abstract: A method, a device and a system for sharing network among a plurality of mobile terminals are provided. The method includes: connecting the plurality of mobile terminals with each other through short-range wireless communication; and when a first mobile terminal has a network request, transmitting a network packet corresponding to the network request to a network side by the first mobile terminal or a second mobile terminal, so as to share a network, wherein the second mobile terminal is connected to the first mobile terminal through short-range wireless communication and can access the network. The method can share network bandwidth among the plurality of mobile terminals, so as to utilize network bandwidth of each mobile terminal optimally.
    Type: Application
    Filed: April 13, 2015
    Publication date: December 3, 2015
    Inventors: Ming-Lun LEE, Shiao-Ting HUANG, Chau-Yan WANG, Sung-Hui KAO
  • Publication number: 20150340558
    Abstract: A light emitting diode chip including a substrate and a light emitting diode element layer is provided. The substrate has a growth surface and a plurality of microstructures on the growth surface, wherein an area of the growth surface occupied by the microstructures is A1 and an area of the growth surface not occupied by the micro-structures is A2, wherein A1 and A2 satisfies the relation of 0.1?A2/(A1+A2)?0.5. The light emitting diode element layer is disposed on the growth surface of the substrate.
    Type: Application
    Filed: October 23, 2014
    Publication date: November 26, 2015
    Inventor: Ming-Lun Lee
  • Publication number: 20150129023
    Abstract: The present invention provides a optoelectronic device having a surface periodic grating structure and a manufacturing method thereof, which includes: a substrate; a multi-layer semiconductor structure layer formed on the substrate; and a periodic grating structure layer embedded in the multi-layer semiconductor structure layer by etching based on optimized parameters. A direction of an incident light to the optoelectronic device is changed to be resonant to the multi-layer semiconductor structure layer to enhance optoelectricity of the optoelectronic device. The method includes: (1) providing a substrate; (2) forming a multi-layer semiconductor structure layer on the substrate; (3) selecting parameters to perform a design for a periodic grating structure layer on a surface of the multi-layer semiconductor structure layer; and (4) forming the periodic grating structure layer embedded in the multi-layer semiconductor structure layer by etching.
    Type: Application
    Filed: November 10, 2014
    Publication date: May 14, 2015
    Inventors: Chieh-Hsiung Kuan, Ming-Lun Lee
  • Publication number: 20070225964
    Abstract: An apparatus and a method for image recognition and translation are disclosed. In the present invention, an image is captured by an image capturing unit and the words in the image are recognized by a character recognizing module. Next, the recognized words are then translated into a designated language by a translating module. Finally, the translated words are displayed in a display unit. Therefore, the present invention not only avoids the problem that users cannot look up words of which they don't understand the language, but also provides users with a convenient way to input words, such that the purposes of instant use and fast translation are achieved.
    Type: Application
    Filed: January 30, 2007
    Publication date: September 27, 2007
    Applicant: INVENTEC APPLIANCES CORP.
    Inventors: Chiung-Hsien Wu, Ming-Lun Lee, Pin-Chuan Wang