Patents by Inventor MING-TSANG TSAI

MING-TSANG TSAI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10766841
    Abstract: A method of preparing bio-polyols from epoxidized fatty acid esters, wherein the bio-polyols are synthesized via hydroxylation with epoxidized fatty acid esters and ring-opening reagent, using the acidic ionic liquids as catalysts. The bio-polyols are used to synthesize bio-polyurethane and bio-polyurethane foams. The acidic ionic liquids in this process is used in esterification, epoxidation, and ring-opening reaction to synthesize bio-polyols. The ionic liquids catalysts have several advantages such as easy to separate, reusable, and may reduce pollution.
    Type: Grant
    Filed: October 24, 2019
    Date of Patent: September 8, 2020
    Assignee: CPC Corporation
    Inventors: You-Liang Tu, Ya-Shiuan Lin, Ming-Tsang Tsai, Chiu-Ping Li
  • Patent number: 10724983
    Abstract: A sensor device may include a substrate, first and second source regions, first and second drain regions, first and second channel regions, and first and second gate structures disposed over the first and second channel regions, respectively. The source regions and drain regions may be at least partially disposed within the substrate. The first and second source regions may have first and second source resistances, respectively, and the second source resistance may be higher than the first source resistance. The first gate structure may receive a solution, and a change in pH in the solution may cause a change in a first current flow through the first channel region. In turn, the second current flow through the second channel region may change to compensate for the change in the first current flow to maintain a constant current flow through the sensor device.
    Type: Grant
    Filed: December 11, 2018
    Date of Patent: July 28, 2020
    Assignee: GLOBALFOUNDRIES Singapore Pte. Ltd.
    Inventors: Bin Liu, Eng Huat Toh, Shyue Seng Tan, Ming Tsang Tsai, Khee Yong Lim, Kiok Boone Elgin Quek
  • Publication number: 20200182826
    Abstract: A sensor device may include a substrate, first and second source regions, first and second drain regions, first and second channel regions, and first and second gate structures disposed over the first and second channel regions, respectively. The source regions and drain regions may be at least partially disposed within the substrate. The first and second source regions may have first and second source resistances, respectively, and the second source resistance may be higher than the first source resistance. The first gate structure may receive a solution, and a change in pH in the solution may cause a change in a first current flow through the first channel region. In turn, the second current flow through the second channel region may change to compensate for the change in the first current flow to maintain a constant current flow through the sensor device.
    Type: Application
    Filed: December 11, 2018
    Publication date: June 11, 2020
    Inventors: Bin LIU, Eng Huat TOH, Shyue Seng TAN, Ming Tsang TSAI, Khee Yong LIM, Kiok Boone Elgin QUEK
  • Publication number: 20200148614
    Abstract: A method of preparing bio-polyols from epoxidized fatty acid esters, wherein the bio-polyols are synthesized via hydroxylation with epoxidized fatty acid esters and ring-opening reagent, using the acidic ionic liquids as catalysts. The bio-polyols are used to synthesize bio-polyurethane and bio-polyurethane foams. The acidic ionic liquids in this process is used in esterification, epoxidation, and ring-opening reaction to synthesize bio-polyols. The ionic liquids catalysts have several advantages such as easy to separate, reusable, and may reduce pollution.
    Type: Application
    Filed: October 24, 2019
    Publication date: May 14, 2020
    Inventors: You-Liang Tu, Ya-Shiuan Lin, Ming-Tsang Tsai, Chiu-Ping Li
  • Patent number: 10522614
    Abstract: Methods for producing FETs with negative capacitance and the resulting device are disclosed. Embodiments include forming a gate stack over a semiconductor substrate by: forming a gate oxide over the semiconductor substrate; forming a first metal gate electrode over the gate oxide; forming a dummy gate over the metal gate electrode; and forming sidewall spacers on first and second sides of the gate stack; forming an ILD over the substrate and gate stack; removing the dummy gate and at least a portion of sidewall spacers to form an opening; forming a ferro-electric (FE) layer in the opening; and forming a second metal gate electrode over the FE layer.
    Type: Grant
    Filed: February 23, 2018
    Date of Patent: December 31, 2019
    Assignee: GLOBALFOUNDRIES SINGAPORE PTE. LTD.
    Inventors: Yongtian Hou, Khee Yong Lim, Ming-Tsang Tsai, Elgin Kiok Boone Quek
  • Patent number: 10468494
    Abstract: A high-voltage device includes a semiconductor substrate, a source diffusion region, a drain diffusion region, a channel diffusion region and a gate electrode. The source diffusion region and the drain diffusion region with a first conductive type are disposed in the semiconductor substrate. The channel diffusion region is disposed in the semiconductor substrate and between the source diffusion region and the drain diffusion region. The gate dielectric layer is disposed on the channel diffusion region and having a first modified portion with a second conductive type extending inwards from a first edge of the gate dielectric layer. The gate electrode is disposed on the gate electric layer, wherein the first modified portion, the gate electrode and the channel diffusion region at least partially overlap with each other.
    Type: Grant
    Filed: February 9, 2018
    Date of Patent: November 5, 2019
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Chih-Mou Lin, Chin-Chia Kuo, Ming-Hua Tsai, Su-Hua Tsai, Pai-Tsang Liu, Chiao-Yu Li, Chun-Ning Wu, Wei-Hsuan Chang
  • Publication number: 20190267446
    Abstract: Methods for producing FETs with negative capacitance and the resulting device are disclosed. Embodiments include forming a gate stack over a semiconductor substrate by: forming a gate oxide over the semiconductor substrate; forming a first metal gate electrode over the gate oxide; forming a dummy gate over the metal gate electrode; and forming sidewall spacers on first and second sides of the gate stack; forming an ILD over the substrate and gate stack; removing the dummy gate and at least a portion of sidewall spacers to form an opening; forming a ferro-electric (FE) layer in the opening; and forming a second metal gate electrode over the FE layer.
    Type: Application
    Filed: February 23, 2018
    Publication date: August 29, 2019
    Inventors: Yongtian HOU, Khee Yong LIM, Ming-Tsang TSAI, Elgin Kiok Boone QUEK
  • Publication number: 20190252513
    Abstract: A high-voltage device includes a semiconductor substrate, a source diffusion region, a drain diffusion region, a channel diffusion region and a gate electrode. The source diffusion region and the drain diffusion region with a first conductive type are disposed in the semiconductor substrate. The channel diffusion region is disposed in the semiconductor substrate and between the source diffusion region and the drain diffusion region. The gate dielectric layer is disposed on the channel diffusion region and having a first modified portion with a second conductive type extending inwards from a first edge of the gate dielectric layer. The gate electrode is disposed on the gate electric layer, wherein the first modified portion, the gate electrode and the channel diffusion region at least partially overlap with each other.
    Type: Application
    Filed: February 9, 2018
    Publication date: August 15, 2019
    Inventors: Chih-Mou Lin, Chin-Chia Kuo, Ming-Hua Tsai, Su-Hua Tsai, Pai-Tsang Liu, Chiao-Yu Li, Chun-Ning Wu, Wei-Hsuan Chang
  • Patent number: 10093636
    Abstract: Synthesizing bio-plasticizers with acidic ionic liquids as catalysts. The acidic ionic liquids are Bronsted acidic ionic liquids, which are composed of alkyl sulfone pyridinium and strong Bronsted acid. Epoxidized fatty acid alkyl esters could be obtained via epoxidation of fatty acid alkyl esters using the acidic ionic liquids as catalysts. The epoxidized fatty acid alkyl esters perform well as bio-plasticizers, which could be substituted for phthalate ester plasticizers. The acidic ionic liquids catalysts provide good catalytic performance, are easy to separate, reusable, and may reduce corrosion of pipelines.
    Type: Grant
    Filed: August 5, 2016
    Date of Patent: October 9, 2018
    Assignee: CPC CORPORATION, TAIWAN
    Inventors: You-Liang Tu, Ya-Shiuan Lin, Ming-Tsang Tsai, Chiu-Ping Li, Jung-Chung Wu
  • Patent number: 9911867
    Abstract: Integrated circuits, nonvolatile memory (NVM) structures, and methods for fabricating integrated circuits with NVM structures are provided. An exemplary integrated circuit includes a substrate and a dual-bit NVM structure overlying the substrate. The dual-bit NVM structure includes primary, first adjacent and second adjacent fin structures laterally extending in parallel over the substrate. The primary fin structure includes source, channel and drain regions. Each adjacent fin structure includes a program/erase gate. The dual-bit NVM structure further includes a first floating gate located between the channel region of the primary fin structure and the first adjacent fin structure and a second floating gate located between the channel region of the primary fin structure and the second adjacent fin structure. Also, the dual-bit NVM structure includes a control gate adjacent the primary fin structure.
    Type: Grant
    Filed: July 1, 2016
    Date of Patent: March 6, 2018
    Assignee: GLOBALFOUNDRIES SINGAPORE PTE. LTD.
    Inventors: Ming-Tsang Tsai, Khee Yong Lim, Kiok Boone Elgin Quek
  • Publication number: 20180037561
    Abstract: Synthesizing bio-plasticizers with acidic ionic liquids as catalysts. The acidic ionic liquids are Bronsted acidic ionic liquids, which are composed of alkyl sulfone pyridinium and strong Bronsted acid. Epoxidized fatty acid alkyl esters could be obtained via epoxidation of fatty acid alkyl esters using the acidic ionic liquids as catalysts. The epoxidized fatty acid alkyl esters perform well as bio-plasticizers, which could be substituted for phthalate ester plasticizers. The acidic ionic liquids catalysts provide good catalytic performance, are easy to separate, reusable, and may reduce corrosion of pipelines.
    Type: Application
    Filed: August 5, 2016
    Publication date: February 8, 2018
    Inventors: You-Liang Tu, Ya-Shiuan Lin, Ming-Tsang Tsai, Chiu-Ping Li, Jung-Chung Wu
  • Publication number: 20180006158
    Abstract: Integrated circuits, nonvolatile memory (NVM) structures, and methods for fabricating integrated circuits with NVM structures are provided. An exemplary integrated circuit includes a substrate and a dual-bit NVM structure overlying the substrate. The dual-bit NVM structure includes primary, first adjacent and second adjacent fin structures laterally extending in parallel over the substrate. The primary fin structure includes source, channel and drain regions. Each adjacent fin structure includes a program/erase gate. The dual-bit NVM structure further includes a first floating gate located between the channel region of the primary fin structure and the first adjacent fin structure and a second floating gate located between the channel region of the primary fin structure and the second adjacent fin structure. Also, the dual-bit NVM structure includes a control gate adjacent the primary fin structure.
    Type: Application
    Filed: July 1, 2016
    Publication date: January 4, 2018
    Inventors: Ming-Tsang Tsai, Khee Yong Lim, Kiok Boone Elgin Quek
  • Patent number: 9543399
    Abstract: A semiconductor device having an open profile gate electrode, and a method of manufacture, are provided. A funnel-shaped opening is formed in a dielectric layer and a gate electrode is formed in the funnel-shaped opening, thereby providing a gate electrode having an open profile. In some embodiments, first and second gate spacers are formed alongside a dummy gate electrode. The dummy gate electrode is removed and upper portions of the first and second gate spacers are removed. The first and second gate spacers may be formed of different materials having different etch rates.
    Type: Grant
    Filed: April 4, 2014
    Date of Patent: January 10, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ru-Shang Hsiao, Ling-Sung Wang, Chih-Mu Huang, Yao-Tsung Chen, Ming-Tsang Tsai, Kuan-Yu Chen
  • Publication number: 20150287798
    Abstract: A semiconductor device having an open profile gate electrode, and a method of manufacture, are provided. A funnel-shaped opening is formed in a dielectric layer and a gate electrode is formed in the funnel-shaped opening, thereby providing a gate electrode having an open profile. In some embodiments, first and second gate spacers are formed alongside a dummy gate electrode. The dummy gate electrode is removed and upper portions of the first and second gate spacers are removed. The first and second gate spacers may be formed of different materials having different etch rates.
    Type: Application
    Filed: April 4, 2014
    Publication date: October 8, 2015
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Ru-Shang Hsiao, Ling-Sung Wang, Chih-Mu Huang, Yao-Tsung Chen, Ming-Tsang Tsai, Kuan-Yu Chen
  • Publication number: 20100056052
    Abstract: An electronic device and searching method are provided to search for an electronic device via a BLUETOOTH (BT) connection between a BT device and a BT headset of the electronic. The electronic device and searching method include setting intensity levels of BT signals of the BT connection and one or more alarm means. The electronic device and searching method further include detecting a signal intensity of the BT signals of the BT connection, and activating one or more of the alarm means to alarm a location of the electronic device, if the signal intensity is in a low intensity level.
    Type: Application
    Filed: June 22, 2009
    Publication date: March 4, 2010
    Applicant: CHI MEI COMMUNICATION SYSTEMS, INC.
    Inventor: MING-TSANG TSAI