Abstract: An electronic system includes a main chip, a non-volatile storage circuit, and a detector circuit. The main chip is configured to read first time of a clock circuit. The non-volatile storage circuit is coupled to the main chip. The main chip stores the first time into the non-volatile storage circuit. The detector circuit includes a first output terminal. The first output terminal is coupled to the main chip. When a cold boot event occurs, the main chip reads the first time from the non-volatile storage circuit, and determines a reason of the cold boot event according to the first time, a second time of the clock circuit, and a logic value at the first output terminal.

Abstract: In a semiconductor structure, a first conductive feature is formed in a trench by PVD and a glue layer is then deposited on the first conductive feature in the trench before CVD deposition of a second conductive feature there-over. The first conductive feature acts as a protection layer to keep silicide from being damaged by later deposition of metal or a precursor by CVD. The glue layer extends along the extent of the sidewall to enhance the adhesion of the second conductive features to the surrounding dielectric layer.

Abstract: A curable composition includes an epoxy monomer component and an aniline-based hardener. The epoxy monomer component is a first component formed from a first epoxy monomer represented by Formula (I), or a second component including the first epoxy monomer represented by Formula (I) and a second epoxy monomer different from the first epoxy monomer represented by Formula (I), wherein each of the substituents in Formula (I) is given the definitions as set forth in the Specification and Claims. Based on 100 wt % of the epoxy monomer component, an amount of the first epoxy monomer represented by Formula (I) is not smaller than 25 wt % and less than 100 wt % and an amount of the second epoxy monomer is greater than 0% and not greater than 75 wt %. A cured product formed from the curable composition, and a method for encapsulating a semiconductor device using the curable composition are also provided.

Abstract: A composite intermediary device using vertical probe for wafer testing, comprising: a printed circuit board, a glass interposer and a vertical probe set; wherein the printed circuit board has printed circuit connected with a measuring apparatus, the glass interposer has multiple contact pads connected with the printed circuit, and then the probes of the vertical probe set are against the contact pads of the glass interposer and the bumps of the device under test. By a fine pitch configuration of the printed circuit and the contact pads of the glass interposer, the present invention achieves the requirements of synchronous and interleaved testing of multiple ICs.

Abstract: Optical devices and methods of manufacture are presented in which a mirror structure is utilized with an optical interposer. In embodiments a method patterns a substrate to form a recess with a sidewall, forms a mirror coating on the sidewall, deposits and patterns a material to form a first waveguide adjacent to the mirror coating, and bonds an optical interposer over the first waveguide.

Abstract: A mobile kitchen cart assembly has a cart and two supporting stands respectively disposed at two sides of the cart. The cart includes a cart body, a cover plate, and multiple casters disposed at a bottom of the cart body. The cart body includes a carrier portion having an accommodating space and an operational portion located above the carrier portion and having an upper opening communicating with the accommodating space and a knife holder for holding knives. The cover plate covers the upper opening of the operational portion. The mobile kitchen cart assembly provides adequate operational space and a counter top at a suitable height by arrangement of the cart body with the cover plate and the two supporting stands.

Abstract: A composite intermediary device using vertical probe for wafer testing, comprising: a printed circuit board, a glass interposer and a vertical probe set; wherein the printed circuit board has printed circuit connected with a measuring apparatus, the glass interposer has multiple contact pads connected with the printed circuit, and then the probes of the vertical probe set are against the contact pads of the glass interposer and the bumps of the device under test. By a fine pitch configuration of the printed circuit and the contact pads of the glass interposer, the present invention achieves the requirements of synchronous and interleaved testing of multiple ICs.

Abstract: The invention relates to a combined dual-wavelength laser light processing device, having two laser light source and a Bessel beam lens, so as to form a Bessel beam with long focal length; Using the coaxial reflecting mirror to achieve deflecting and penetrating to form two coaxial finished light beams; a diffraction optical unit for adjusting the energy distribution of the finished light beam; a work platform; a laser galvanometric scanning module to achieve guiding the finished light beam; a controller electrically connected to the two laser light sources, and controls the projection timing and energy of the first and the second wavelength beams to form at least one rectangular pulse and at least one burst pulse, through the repeated conversion of the dual wavelengths in the composite light wave configuration make the processing of the composite material to be fast and precise.

Abstract: An electronic system includes a main chip, a non-volatile storage circuit, and a detector circuit. The main chip is configured to read first time of a clock circuit. The non-volatile storage circuit is coupled to the main chip. The main chip stores the first time into the non-volatile storage circuit. The detector circuit includes a first output terminal. The first output terminal is coupled to the main chip. When a cold boot event occurs, the main chip reads the first time from the non-volatile storage circuit, and determines a reason of the cold boot event according to the first time, a second time of the clock circuit, and a logic value at the first output terminal.

Abstract: The present invention provides a control method applied to an electronic device is disclosed, wherein the electronic device includes a processor and a wireless network module, and the control method includes the steps of: generating a determination result by determining if the wireless network module needs to transmit a packet; and when the determination result indicates that the wireless network module needs to transmit the packet, reducing a frequency of a clock signal used by the processor during a packet transmission.

Abstract: A circuitry applied to an electronic device having a Universal Serial Bus (USB) type-C connector is provided. The circuitry includes a transceiver circuit, a physical layer circuit and a processing circuit. In operations of the circuitry, the transceiver circuit is coupled to the USB type-C connector. The physical layer circuit is configured to directly utilize a plurality of first signals from the USB type-C connector as at least one portion of Ethernet signals, and process the first signals to generate a plurality of processed first signals. The processing circuit is configured to process the processed first signals to generate an output signal.

Abstract: A performance management method and an electronic device are provided. The method is applied to the electronic device with a system processor and includes: sensing a temperature of the electronic device and determining whether the temperature is greater than a first temperature setting value; when the temperature is not greater than the first temperature setting value, initiating a frequency increasing procedure; when the temperature is greater than the first temperature setting value, determining whether the temperature is greater than a second temperature setting value, where the second temperature setting value is greater than the first temperature setting value; when the temperature is greater than the first temperature setting value and is not greater than the second temperature setting value, initiating a first frequency reducing procedure; and when the temperature is greater than the second temperature setting value, initiating a second frequency reducing procedure or turning off the system processor.

Abstract: The present invention provides a control method applied to an electronic device is disclosed, wherein the electronic device includes a processor and a wireless network module, and the control method includes the steps of: generating a determination result by determining if the wireless network module needs to transmit a packet; and when the determination result indicates that the wireless network module needs to transmit the packet, reducing a frequency of a clock signal used by the processor during a packet transmission.

Abstract: A circuitry applied to an electronic device having a Universal Serial Bus (USB) type-C connector is provided. The circuitry includes a transceiver circuit, a physical layer circuit and a processing circuit. In operations of the circuitry, the transceiver circuit is coupled to the USB type-C connector. The physical layer circuit is configured to directly utilize a plurality of first signals from the USB type-C connector as at least one portion of Ethernet signals, and process the first signals to generate a plurality of processed first signals. The processing circuit is configured to process the processed first signals to generate an output signal.

Abstract: A performance management method and an electronic device are provided. The method is applied to the electronic device with a system processor and includes: sensing a temperature of the electronic device and determining whether the temperature is greater than a first temperature setting value; when the temperature is not greater than the first temperature setting value, initiating a frequency increasing procedure; when the temperature is greater than the first temperature setting value, determining whether the temperature is greater than a second temperature setting value, where the second temperature setting value is greater than the first temperature setting value; when the temperature is greater than the first temperature setting value and is not greater than the second temperature setting value, initiating a first frequency reducing procedure; and when the temperature is greater than the second temperature setting value, initiating a second frequency reducing procedure or turning off the system processor.

Abstract: A polyolefin derivative and a composite material are provided. The polyolefin derivative is formed by reacting a modified polyolefin and an amine compound, wherein the modified polyolefin is formed by grafting a maleic anhydride onto a polyolefin. The amine compound includes a polyether amine and an alkylamine. Based on 100 parts by mole of the maleic anhydride group in the modified polyolefin, a reacting amount of the alkylamine is 1 part by mole to 40 parts by mole.

Abstract: A memory sharing dual-mode network communication device includes a first memory, an OTT module and a PON module. The first memory is divided into an OTT region and a PON region, and the OTT module is used to obtain an OTT service, which includes an OTT processor, a memory arbitration circuit, a first memory main controller, a bridge circuit, and a memory slave controller. The PON module includes a PON processor and a second memory main controller. The memory arbitration circuit is configured to respond to a first access request from the OTT processor or a second access request of the PON processor to access the OTT area or the PON area of the first memory through the first memory host controller, and the memory arbitration circuit further determines the priority order of the first access request and the second access request.

Abstract: A memory sharing dual-mode network communication device includes a first memory, an OTT module and a PON module. The first memory is divided into an OTT region and a PON region, and the OTT module is used to obtain an OTT service, which includes an OTT processor, a memory arbitration circuit, a first memory main controller, a bridge circuit, and a memory slave controller. The PON module includes a PON processor and a second memory main controller. The memory arbitration circuit is configured to respond to a first access request from the OTT processor or a second access request of the PON processor to access the OTT area or the PON area of the first memory through the first memory host controller, and the memory arbitration circuit further determines the priority order of the first access request and the second access request.

Abstract: A network streaming device that includes a wireless transmission module and a host module is provided. The wireless transmission module is configured to perform wireless communication with an external wireless access point through a wireless channel within a wireless frequency band. The host module is configured to be coupled with the wireless transmission module and generates a clock signal to the wireless transmission module according to a frequency range of the wireless channel such that the wireless transmission module operates according to the clock signal. The host module determines an operation frequency of the clock signal according to the frequency range of the wireless channel such that a plurality of harmonics of the clock signal generated according to the operation frequency are not within the frequency range.