Abstract: A memory cell includes a read word line extending in a first direction, a write transistor, and a read transistor coupled to the write transistor. The read transistor includes a ferroelectric layer, a drain terminal of the read transistor directly connected to the read word line, and a source terminal of the read transistor coupled to a first node. The write transistor is configured to adjust a polarization state of the read transistor, the polarization state corresponding to a stored data value of the memory cell.

Abstract: A motor drive unit for driving a motor of a motorized window treatment may comprise software-based and hardware-based implementations of a process for detecting and resolving a stall condition in the motor, where the hardware-based implementation is configured to reduce power delivered to the motor if the software-based implementation has not first reduced the power to the motor. A control circuit may detect a stall condition of the motor, and reduce the power delivered to the motor after a first period of time from first detecting the stall condition. The motor drive unit may comprise a stall prevention circuit configured to reduce the power delivered to the motor after a second period of time (e.g., longer than the first period of time) from determining that a rotational sensing circuit is not generating a sensor signal while the control circuit is generating a drive signal to rotate the motor.

Abstract: A watermark embedding method includes the following steps. The input video signal is received by a processing circuit. Grayscale information of a watermark signal is generated by the processing circuit according to a time series data and a predetermined plane. During a dark sate and a bright state in each of a plurality of consecutive periods, phases of the time series data are opposite and integral values of the grayscales of the predetermined plane are the same. The processing circuit embeds the watermark signal into the input video signal to generate an output video signal with the watermark information. The display panel displays an image according to the output video signal.

Abstract: A method and system are provided for scheduling data transmission in a Multiple-Input Multiple-Output (MIMO) system. The MIMO system may comprise at least one MIMO transmitter and at least one MIMO receiver. Feedback from one or more receivers may be used by a transmitter to improve quality, capacity, and scheduling in MIMO communication systems. The method may include generating or receiving information pertaining to a MIMO channel metric and information pertaining to a Channel Quality Indicator (CQI) in respect of a transmitted signal; and sending a next transmission to a receiver using a MIMO mode selected in accordance with the information pertaining to the MIMO channel metric, and an adaptive coding and modulation selected in accordance with the information pertaining to the CQI.

Abstract: A magnetoresistive random access memory (MRAM) device includes a first array region and a second array region on a substrate, a first magnetic tunneling junction (MTJ) on the first array region, a first top electrode on the first MTJ, a second MTJ on the second array region, and a second top electrode on the second MTJ. Preferably, the first top electrode and the second top electrode include different nitrogen to titanium (N/Ti) ratios.

Abstract: Epitaxial source/drain structures for enhancing performance of multigate devices, such as fin-like field-effect transistors (FETs) or gate-all-around (GAA) FETs, and methods of fabricating the epitaxial source/drain structures, are disclosed herein. An exemplary device includes a dielectric substrate. The device further includes a channel layer, a gate disposed over the channel layer, and an epitaxial source/drain structure disposed adjacent to the channel layer. The channel layer, the gate, and the epitaxial source/drain structure are disposed over the dielectric substrate. The epitaxial source/drain structure includes an inner portion having a first dopant concentration and an outer portion having a second dopant concentration that is less than the first dopant concentration. The inner portion physically contacts the dielectric substrate, and the outer portion is disposed between the inner portion and the channel layer. In some embodiments, the outer portion physically contacts the dielectric substrate.

Abstract: A microelectromechanical system (MEMS) structure and method of forming the MEMS device, including forming a first metallization structure over a complementary metal-oxide-semiconductor (CMOS) wafer, where the first metallization structure includes a first sacrificial oxide layer and a first metal contact pad. A second metallization structure is formed over a MEMS wafer, where the second metallization structure includes a second sacrificial oxide layer and a second metal contact pad. The first metallization structure and second metallization structure are then bonded together. After the first metallization structure and second metallization structure are bonded together, patterning and etching the MEMS wafer to form a MEMS element over the second sacrificial oxide layer. After the MEMS element is formed, removing the first sacrificial oxide layer and second sacrificial oxide layer to allow the MEMS element to move freely about an axis.

Abstract: A method for predicting clinical severity of a neurological disorder includes steps of: a) identifying, according to a magnetic resonance imaging (MRI) image of a brain, brain image regions each of which contains a respective portion of diffusion index values of a diffusion index, which results from image processing performed on the MRI image; b) for one of the brain image regions, calculating a characteristic parameter based on the respective portion of the diffusion index values; and c) calculating a severity score that represents the clinical severity of the neurological disorder of the brain based on the characteristic parameter of the one of the brain image regions via a prediction model associated with the neurological disorder.

Abstract: A device includes a first buried layer over a substrate, a second buried layer over the first buried layer, a first well over the first buried layer and the second buried layer, a first high voltage well, a second high voltage well and a third high voltage well extending through the first well, wherein the second high voltage well is between the first high voltage well and the third high voltage well, a first drain/source region in the first high voltage well, a first gate electrode over the first well, a second drain/source region in the second high voltage well and a first isolation region in the second high voltage well, and between the second drain/source region and the first gate electrode, wherein a bottom of the first isolation region is lower than a bottom of the second drain/source region.

Abstract: An immersion-type heat dissipation structure having high density heat dissipation fins is provided, which includes a heat dissipation substrate and the plurality of sheet-like heat dissipation fins. A thickness of the heat dissipation substrate is from 2 mm to 6 mm, and a bottom surface of the heat dissipation substrate contacts a heating element immersed in a two-phase coolant. The sheet-like heat dissipation fins are integrally formed on an upper surface of the heat dissipation substrate and arranged in high density. A length, a width, and a height of at least one of the sheet-like heat dissipation fins are from 60 mm to 120 mm, from 0.1 mm to 0.5 mm, and from 3 mm to 10 mm, respectively. Further, a distance between at least two of the sheet-like heat dissipation fins that are arranged in parallel to each other is from 0.1 mm to 0.5 mm.

Abstract: A radio physical layer protocol data unit (PPDU) sending method includes: obtaining, a radio physical layer protocol data unit (PPDU), wherein the PPDU includes a high efficiency-signal field A (HE-SIG-A) and a high efficiency-signal field B (HE-SIG-B), the HE-SIG-A includes a field indicating a quantity of orthogonal frequency division multiplexing (OFDM) symbols in the HE-SIG-B, and wherein a value of the field indicates one of the following: that the quantity of OFDM symbols included in the HE-SIG-B is greater than or equal to 16, or the quantity of OFDM symbols included in the HE-SIG-B; and sending the PPDU.

Abstract: Some implementations described herein include systems and techniques for fabricating a wafer-on-wafer product using a filled lateral gap between beveled regions of wafers included in a stacked-wafer assembly and along a perimeter region of the stacked-wafer assembly. The systems and techniques include a deposition tool having an electrode with a protrusion that enhances an electromagnetic field along the perimeter region of the stacked-wafer assembly during a deposition operation performed by the deposition tool. Relative to an electromagnetic field generated by a deposition tool not including the electrode with the protrusion, the enhanced electromagnetic field improves the deposition operation so that a supporting fill material may be sufficiently deposited.

Abstract: A two-phase immersion-type heat dissipation structure having high density heat dissipation fins is provided. The two-phase immersion-type heat dissipation structure having high density heat dissipation fins includes a heat dissipation substrate, a plurality of sheet-like heat dissipation fins, and a reinforcement structure. A bottom surface of the heat dissipation substrate is in contact with a heating element immersed in a two-phase coolant. The plurality of sheet-like heat dissipation fins are integrally formed on an upper surface of the heat dissipation substrate and arranged in high density. An angle between at least one of the sheet-like heat dissipation fins and the upper surface of the heat dissipation substrate is from 60° to 120°. At least one of the sheet-like heat dissipation fins has a length from 50 mm to 120 mm, a width from 0.1 mm to 0.35 mm, and a height from 2 mm to 8 mm.

Abstract: A memory array and an operation method of the memory array are provided. The memory array includes first and second ferroelectric memory devices formed along a gate electrode, a channel layer and a ferroelectric layer between the gate electrode and the channel layer. The ferroelectric memory devices include: a common source/drain electrode and two respective source/drain electrodes, separately in contact with a side of the channel layer opposite to the ferroelectric layer, wherein the common source/drain electrode is disposed between the respective source/drain electrodes; and first and second auxiliary gates, capacitively coupled to the channel layer, wherein the first auxiliary gate is located between the common source/drain electrode and one of the respective source/drain electrodes, and the second auxiliary gate is located between the common source/drain electrode and the other respective source/drain electrode.

Abstract: The battery pack with the plurality of batteries is determined to have been fully charged and set in a stationary state, the discharge operation proceeds according to specified relationships of the voltage of each battery, a first predetermined voltage difference, and a discharge starting voltage, or the balance operation proceeds according to specified relationships of the voltage of each battery, the first predetermined voltage difference, a balance starting voltage and a second predetermined voltage difference.

Abstract: A gene sequencing reaction device, a gene sequencing system and a gene sequencing reaction method. The gene sequencing reaction device includes: a supporting platform; a dipping container disposed on the supporting platform, wherein the dipping container has a dipping reaction area, and the dipping reaction area is configured to hold a chemical reagent for gene sequencing reaction, so as to dip a sequencing chip having a DNA sample loading structure on the surface and having a DNA sample loaded thereon in the chemical reagent to perform a gene sequencing reaction; a temperature control apparatus, configured to control the temperature of the chemical reagent in the dipping reaction area; and a transfer apparatus, configured to insert the sequencing chip into the dipping reaction area or pull out the sequencing chip from the dipping reaction area.

Abstract: An antenna module includes a first antenna radiator including a feeding terminal, a second antenna radiator, a first ground radiator, a second ground radiator and a capacitive element. The second antenna radiator is disposed on one side of the first antenna radiator, and a first gap is formed between a main portion of the second antenna radiator and the first antenna radiator. The first ground radiator is disposed on another side of the first antenna radiator, and a second gap is formed between the first antenna radiator and the first antenna radiator. The second ground radiator is disposed between the second antenna radiator and the first ground radiator, and a third gap is formed between the second ground radiator and a first branch of the second antenna radiator. The capacitive element is disposed on the third gap and connects the second antenna radiator and the second ground radiator.

Abstract: The present application discloses a communication method, a terminal, a server, a communication system, a computer device and a medium. The communication method includes that a server establishes a connection and feeds back a display control in response to requests of a first terminal and a second terminal; then, the server feeds back function feedback information in response to a function request of the first terminal, and feeds back function feedback information in response to a menu request of the second terminal; and the servers presents multiple interface components and maintains and updates each interface component in response to management operation of a third user.

Abstract: An encryption and signature device for AI model protection is provided. The encryption and signature device for AI model protection includes a key derivation unit, a model encryption unit, a model password encryption unit, an image generation unit and a signature unit. The key derivation unit is configured to derive a model key according to a model password and a derivation function. The model encryption unit is configured to encrypt an AI model according to the model key to generate an encrypted AI model. The model password encryption unit is configured to encrypt the model password to generate an encrypted model password. The image generation unit is configured to generate an image file according to the encrypted model password and the encrypted AI model. The signature unit is configured to sign the image file according to a private key to obtain a signed image file.