Abstract: An uninterruptible power supply includes a first input to receive input power from an input power source, an output to provide output power, a switch, a first logic power supply coupled to the switch, a back-up power source, a charger, a main logic power supply and power converter circuitry. The switch is configured to close when a characteristic of the input power is within a selected range. The first logic power supply is coupled to the switch and configured to receive input power from the input power source when the switch is closed. The first logic power supply has a first DC output. The back-up power source has a second DC output and is coupled to the first DC output at a common node. The charger has a third DC output and is coupled to the common node. The main logic power supply is coupled to the common node and is configured to receive at least one of the first DC output, the second DC output and the third DC output.

Abstract: An uninterruptible power supply (“UPS”) includes an input module having a plurality of inputs, and at least one jumper element configured to selectively couple at least one input of the plurality of inputs to at least one other input of the plurality of inputs. The plurality of inputs and the at least one jumper element may be constructed and arranged to selectively achieve the following configurations: single power feed, single phase input and single phase output; dual power feed, single phase input and single phase output; single power feed, three phase input and single phase output; dual power feed, three phase input and single phase output; single power feed, three phase input and three phase output; and dual power feed, three phase input and three phase output. Other embodiments and methods of selectively achieving multiple power configurations are also disclosed.

Abstract: An uninterruptible power supply (UPS) system includes an AC power input configured to receive AC power from a single-phase AC power source or a multi-phase AC power source, a DC power source, an output circuit including a power output, a controllable switch configured to selectively couple at least one of the AC power input and the DC power source to the output circuit, and a processor coupled and configured to affect operation of the output circuit depending upon which of single-phase and multi-phase operation of the UPS is indicated.

Abstract: An uninterruptible power supply includes a first input to receive input power from an input power source, an output to provide output power, a switch, a first logic power supply coupled to the switch, a back-up power source, a charger, a main logic power supply and power converter circuitry. The switch is configured to close when a characteristic of the input power is within a selected range. The first logic power supply is coupled to the switch and configured to receive input power from the input power source when the switch is closed. The first logic power supply has a first DC output. The back-up power source has a second DC output and is coupled to the first DC output at a common node. The charger has a third DC output and is coupled to the common node. The main logic power supply is coupled to the common node and is configured to receive at least one of the first DC output, the second DC output and the third DC output.

Abstract: An uninterruptible power supply (UPS) system includes an AC power input configured to receive AC power from a single-phase AC power source or a multi-phase AC power source, a DC power source, an output circuit including a power output, a controllable switch configured to selectively couple at least one of the AC power input and the DC power source to the output circuit, and a processor coupled and configured to affect operation of the output circuit depending upon which of single-phase and multi-phase operation of the UPS is indicated.

Abstract: An uninterruptible power supply (UPS) system includes an AC power input configured to receive AC power from a single-phase AC power source or a multi-phase AC power source, a DC power source, an output circuit including a power output, a controllable switch configured to selectively couple at least one of the AC power input and the DC power source to the output circuit, and a processor coupled and configured to affect operation of the output circuit depending upon which of single-phase and multi-phase operation of the UPS is indicated.

Abstract: An uninterruptible power supply (UPS) system includes an AC power input configured to receive AC power from a single-phase AC power source or a multi-phase AC power source, a DC power source, an output circuit including a power output, a controllable switch configured to selectively couple at least one of the AC power input and the DC power source to the output circuit, and a processor coupled and configured to affect operation of the output circuit depending upon which of single-phase and multi-phase operation of the UPS is indicated.

Abstract: An uninterruptible power supply (UPS) system includes an AC power input configured to receive AC power from a single-phase AC power source or a multi-phase AC power source, a DC power source, an output circuit including a power output, a controllable switch configured to selectively couple at least one of the AC power input and the DC power source to the output circuit, and a processor coupled and configured to affect operation of the output circuit depending upon which of single-phase and multi-phase operation of the UPS is indicated.

Abstract: An uninterruptible power supply (UPS) system includes an AC power input configured to receive AC power from a single-phase AC power source or a multi-phase AC power source, a DC power source, an output circuit including a power output, a controllable switch configured to selectively couple at least one of the AC power input and the DC power source to the output circuit, and a processor coupled and configured to affect operation of the output circuit depending upon which of single-phase and multi-phase operation of the UPS is indicated.

Abstract: An uninterruptible power supply (UPS) system includes an AC power input configured to receive AC power from a single-phase AC power source or a multi-phase AC power source, a DC power source, an output circuit including a power output, a controllable switch configured to selectively couple at least one of the AC power input and the DC power source to the output circuit, and a processor coupled and configured to affect operation of the output circuit depending upon which of single-phase and multi-phase operation of the UPS is indicated.

Abstract: An uninterruptible power supply (UPS) system includes an AC power input configured to receive AC power from a single-phase AC power source or a multi-phase AC power source, a DC power source, an output circuit including a power output, a controllable switch configured to selectively couple at least one of the AC power input and the DC power source to the output circuit, and a processor coupled and configured to affect operation of the output circuit depending upon which of single-phase and multi-phase operation of the UPS is indicated.

Abstract: An uninterruptible power supply (UPS) system includes an AC power input configured to receive AC power from a single-phase AC power source or a multi-phase AC power source, a DC power source, an output circuit including a power output, a controllable switch configured to selectively couple at least one of the AC power input and the DC power source to the output circuit, and a processor coupled and configured to affect operation of the output circuit depending upon which of single-phase and multi-phase operation of the UPS is indicated.

Abstract: A system for pumping multiphase fluids includes a phase separator (14), a gas-gas jet pump (30) and a liquid pump (36). The phase separator (14) receives a LP multiphase fluid and separates a LP gas phase and a LP liquid phase from the LP multiphase fluid. The gas-gas jet pump (30) receives the LP gas phase from the phase separator (14) and a HP gas supply from a sustainable gas source, and has an outlet providing outlet gas at a pressure higher than that of the LP gas phase. The liquid pump (36) receives the LP liquid phase from the phase separator (14), and has an outlet providing outlet liquid at a pressure higher than that of the LP liquid phase.

Abstract: An uninterruptible power supply (UPS) system includes an AC power input configured to receive AC power from a single-phase AC power source or a multi-phase AC power source, a DC power source, an output circuit including a power output, a controllable switch configured to selectively couple at least one of the AC power input and the DC power source to the output circuit, and a processor coupled and configured to affect operation of the output circuit depending upon which of single-phase and multi- phase operation of the UPS is indicated.

Abstract: A hardware component is monitored in a computing system. The utilization of the hardware component is sampled at a predefined sampling rate for a predefined sampling period. The proportion of the sampled values taken during the sampling period that fall within a predefined range of values is determined. A value representative of the proportion along with time information identifying the time of the sampling period is stored. Storing occurs when the value representative of the proportion exceeds a predefined threshold.

Abstract: A master clock generator for a variable speed constant frequency electric power system includes a frequency select circuit for selecting an external or internal frequency reference signal and a phase comparator for producing a phase error signal representative of the phase difference between the frequency reference signal and an output clock signal. The phase error signal is combined with a control signal to produce an adjusted phase error signal. This adjusted phase error signal is integrated and a voltage control oscillator is used to produce the output signal in response to the integrated adjusted phase error signal. The control signal introduces a desired phase error between the reference signal and the output signal. Clamping circuits are provided to limit the maximum and minimum magnitudes of the integrated adjusted phase error signal, thereby limiting the maximum and minimum frequencies of the output clock signal.

Abstract: A circuit is provided for detecting phase error between two signals by producing a phase error signal having a series of pulses wherein the widths of the pulses are representative of the phase error and producing a polarity signal representative of the polarity of the phase error. The phase error signal and polarity signal are used to produce a count representing the magnitude and polarity of the phase error for each of the pulses in the phase error signal. This count is converted to an analog signal which is compared to a pair of reference level signals to produce an output signal representative of the acceptability of the phase error corresponding to each of the pulses in the phase error signal.

Abstract: An overcurrent trip circuit monitors the rate of rise of the current and the magnitude of the current in a power conductor and opens a circuit containing the power conductor when either the rate of rise of the current exceeds a first preselected limit value or the magnitude of the current exceeds a second preselected limit value. The inherent inductance in a metering shunt is used to produce a voltage signal that contains a component which is representative of the rate of change of current in a power conductor. This voltage signal is compared to a first reference signal to produce a trip signal when the voltage exceeds the first reference signal. In addition, the voltage signal is processed and the processed voltage signal is compared to a second reference signal to produce a second trip signal when the magnitude of the processed voltage signal exceeds the magnitude of the second reference signal. The power circuit is then opened in response to either of the first or second trip signals.

Abstract: The widths of pulses in an incoming pulse train are monitored by successively measuring the duration of the pulses in the pulse train and enabling a timing device when the duration of any of the pulses is more than a preselected magnitude. The timing device is reset and restarted when the duration of any of the pulses is greater than the preselected magnitude. An output signal, indicative of an acceptable condition, is produced when the timing device indicates the expiration of a predetermined time delay. An output signal, indicative of a non-acceptable condition, is produced when the duration of a pulse in the incoming pulse train exceeds the preselected magnitude. This invention encompasses both the pulse width monitoring method and circuits which perform this method.

Abstract: A method of selectively isolating faulty channels in a parallel electric power system having at least two controllable AC power sources includes the steps of producing a DC content signal representative of the magnitude of DC voltage in an AC output of one of the power sources and producing a differential current signal representative of differential DC current flowing in connected phases of the power sources. The DC content and differential current signals are combined to produce an error signal which is used to control the operation of the first power source, thereby reducing the magnitude of DC voltage in its output. When the error signal exceeds a predetermined threshold level, a trip signal can be produced and used to selectively isolate a failed channel in the power system. Following isolation of the channels, the differential current signal is disabled such that the error signal is only representative of the DC content signal for split channel operation.