Patents by Inventor Mitsuhiro Nakao

Mitsuhiro Nakao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5592020
    Abstract: Disclosed is a semiconductor device comprising an integrated circuit chip, a first lead having a portion extending substantially in parallel to one side plurality of the chip, and a second lead located adjacent to the first lead. Each of the first and second leads has a recess and a projection continuously. The first lead and second lead are arranged adjacent to each other with the recess and projection of the first lead being in engagement with the projection and recess of the second lead. Bonding wires are bonded on the projection of the first lead and the projection of the second lead. The bonding wires electrically connect the chip to the first lead and also to the second lead.
    Type: Grant
    Filed: June 5, 1995
    Date of Patent: January 7, 1997
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Mitsuhiro Nakao, Toshimitsu Ishikawa, Kazunori Hayashi
  • Patent number: 5395035
    Abstract: In the first operating unit, the bonding gap and the loop length of the bonding wire are calculated from the first and second bonding points. In the second operating unit, the length of the oblique line of the bonding wire, and the angle made between the oblique line and a line connecting the inner lead and the bed together are calculated from the bonding gap, the loop length, and the loop height. In the automatic operating unit, the reverse height, i.e. the distance by which the capillary is moved upward from the bonding pad position, the reverse amount, i.e. the distance by which the capillary, already ascended to the reverse height, is moved to the opposite side of the bonding position, and the capillary ascending amount, i.e. the distance by which the capillary, already moved by the reverse amount, is moved to the highest position of the capillary from the upper surface of the semiconductor chip are calculated from the length of the oblique line, the angle, and the loop height.
    Type: Grant
    Filed: December 2, 1993
    Date of Patent: March 7, 1995
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Mitsuhiro Nakao