Patents by Inventor Mitsushi Fujiki

Mitsushi Fujiki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8338249
    Abstract: A method for manufacturing a semiconductor device comprises: forming a lower electrode on a semiconductor substrate, sputtering a ferroelectric film on the lower electrode using a target, thermal treating the ferroelectric film in an atmosphere containing oxygen in accordance with an accumulated period of use of the target for fabricating the ferroelectric film, and forming an upper electrode on the ferroelectric film.
    Type: Grant
    Filed: February 15, 2008
    Date of Patent: December 25, 2012
    Assignee: Fujitsu Semiconductor Limited
    Inventors: Makoto Takahashi, Mitsushi Fujiki, Kenkichi Suezawa, Wensheng Wang, Ko Nakamura
  • Patent number: 7892916
    Abstract: An upper electrode layer is processed into plural electrode shapes with lithography and subsequent dry etching to pattern plural upper electrodes, followed by conducting an RTA treatment at a treatment temperature of a value in a range from 400° C. to 1000° C. and at an oxygen flow volume of a value in a range from 0.1 L/min to 100 L/min and, subsequently, by conducting an annealing treatment at a treatment temperature of 650° C. in an oxygen atmosphere for 60 minutes.
    Type: Grant
    Filed: March 30, 2005
    Date of Patent: February 22, 2011
    Assignee: Fujitsu Semiconductor Limited
    Inventors: Tomohiro Takamatsu, Mitsushi Fujiki
  • Publication number: 20100207178
    Abstract: A method for manufacturing a semiconductor device comprises: forming a lower electrode on a semiconductor substrate, sputtering a ferroelectric film on the lower electrode using a target, thermal treating the ferroelectric film in an atmosphere containing oxygen in accordance with an accumulated period of use of the target for fabricating the ferroelectric film, and forming an upper electrode on the ferroelectric film.
    Type: Application
    Filed: February 15, 2008
    Publication date: August 19, 2010
    Applicant: FUJITSU LIMITED
    Inventors: Makoto TAKAHASHI, Mitsushi Fujiki, Kenkichi Suezawa, Wensheng Wang, Ko Nakamura
  • Patent number: 7622346
    Abstract: A ferroelectric capacitor formation method necessary for stably fabricating an FeRAM and a semiconductor device fabrication method. After a PZT film is deposited on a lower electrode layer, the PZT film is crystallized by performing heat treatment in an atmosphere of a mixed gas which contains O2 gas and Ar gas. In this case, the flow rate of the O2 gas is controlled by one mass flow controller. The flow rate of the Ar gas used for purging and the flow rate of the Ar gas used for adjusting O2 gas concentration are controlled by different mass flow controllers. Before raising the temperature, the O2 gas, the Ar gas used for purging, and the Ar gas used for adjusting O2 gas concentration are made to flow at predetermined flow rates. Only the Ar gas used for purging is stopped, raising the temperature is begun, and the heat treatment is performed. At this time the O2 gas and the Ar gas used for adjusting O2 gas concentration flow at the predetermined flow rates.
    Type: Grant
    Filed: June 20, 2006
    Date of Patent: November 24, 2009
    Assignee: Fujitsu Microelectronics Limited
    Inventors: Mitsushi Fujiki, Katsuyoshi Matsuura, Genichi Komuro
  • Patent number: 7518173
    Abstract: A semiconductor device includes: a semiconductor substrate; a MOS transistor formed in the semiconductor substrate and having an insulated gate and source/drain regions on both sides of the insulated gate; a ferroelectric capacitor formed above the semiconductor substrate and having a lower electrode, a ferroelectric layer and an upper electrode; a metal film formed on the upper electrode and having a thickness of a half of or thinner than a thickness of the upper electrode; an interlayer insulating film burying the ferroelectric capacitor and the metal film; a conductive plug formed through the interlayer insulating film, reaching the metal film and including a conductive glue film and a tungsten body; and an aluminum wiring formed on the interlayer insulating film and connected to the conductive plug. A new problem near an upper electrode contact is solved which may otherwise be caused by adopting a W plug over the F capacitor.
    Type: Grant
    Filed: May 16, 2005
    Date of Patent: April 14, 2009
    Assignee: Fujitsu Microelectronics Limited
    Inventors: Yukinobu Hikosaka, Mitsushi Fujiki, Kazutoshi Izumi, Naoya Sashida, Aki Dote
  • Publication number: 20080203530
    Abstract: A semiconductor device includes a silicon substrate; a first interlayer insulating film provided on the silicon substrate; and a capacitor that is provided on the first interlayer insulating film and that includes a lower electrode, a capacitor dielectric film made of a ferroelectric substance, and an upper electrode, wherein the capacitor dielectric film does not contain a non-oriented component under the upper electrode.
    Type: Application
    Filed: February 25, 2008
    Publication date: August 28, 2008
    Applicant: FUJITSU LIMITED
    Inventor: Mitsushi FUJIKI
  • Publication number: 20080057598
    Abstract: A ferroelectric capacitor formation method that enables stable FeRAM mass production. When a ferroelectric capacitor of an FeRAM is formed, a ferroelectric layer is formed over a lower electrode layer by a sputtering method by keeping a stage at a temperature lower than or equal to 35° C. To crystallize the ferroelectric layer, first RTA treatment is performed in an atmosphere of a mixed gas which contains an inert gas and O2 gas a concentration of which is 1.25 volume percent or greater. The formation of an upper electrode layer, second RTA treatment, patterning, and the like are then performed to form the ferroelectric capacitor. By doing so, ferroelectric capacitors each having predetermined capacitor performance can be formed with a high yield and FeRAMs can stably be mass-produced.
    Type: Application
    Filed: August 30, 2007
    Publication date: March 6, 2008
    Applicant: FUJITSU LIMITED
    Inventors: Kenkichi SUEZAWA, Mitsushi FUJIKI, Makoto TAKAHASHI, Ko NAKAMURA, Wensheng WANG
  • Publication number: 20070249065
    Abstract: After an interlayer insulating film and a lower side layer of a conductive film for a bottom electrode and the like are formed above a substrate, a Pt film of a thickness of 50 nm to 500 nm, for example, about 175 nm is formed on the lower side layer as an upper side layer of a conductive film for a bottom electrode by a DC magnetron sputtering method. As the lower side layer, for example, a Ti film is formed. A substrate temperature at a time of forming the upper side layer is set at 250° C. to 450° C., for example, at 350° C. By forming the upper side layer in such a substrate temperature, the upper side layer intense in orientation in a [222] direction is obtained. Therefore, orientation of a ferroelectric film which is formed directly thereon to a [111] direction also becomes extremely favorable.
    Type: Application
    Filed: August 28, 2006
    Publication date: October 25, 2007
    Applicant: FUJITSU LIMITED
    Inventor: Mitsushi Fujiki
  • Publication number: 20070196932
    Abstract: A ferroelectric capacitor formation method necessary for stably fabricating an FeRAM and a semiconductor device fabrication method. After a PZT film is deposited on a lower electrode layer, the PZT film is crystallized by performing heat treatment in an atmosphere of a mixed gas which contains O2 gas and Ar gas. In this case, the flow rate of the O2 gas is controlled by one mass flow controller. The flow rate of the Ar gas used for purging and the flow rate of the Ar gas used for adjusting O2 gas concentration are controlled by different mass flow controllers. Before raising the temperature, the O2 gas, the Ar gas used for purging, and the Ar gas used for adjusting O2 gas concentration are made to flow at predetermined flow rates. Only the Ar gas used for purging is stopped, raising the temperature is begun, and the heat treatment is performed. At this time the O2 gas and the Ar gas used for adjusting O2 gas concentration flow at the predetermined flow rates.
    Type: Application
    Filed: June 20, 2006
    Publication date: August 23, 2007
    Applicant: FUJITSU LIMITED
    Inventors: Mitsushi Fujiki, Katsuyoshi Matsuura, Genichi Komuro
  • Publication number: 20070184595
    Abstract: An interlayer insulating film covering a ferroelectric capacitor is formed, and through the interlayer insulating film, contact holes each reaching a capacitor electrode are formed. A wiring connected to the capacitor electrode through the contact hole is further formed above the interlayer insulating film. A planar shape of the contact hole is a regular octagon, a regular rectangle with four angles thereof being rounded, an octagon with a length of each neighboring side thereof being different to each other, a circle, and so forth.
    Type: Application
    Filed: March 23, 2007
    Publication date: August 9, 2007
    Applicant: FUJITSU LIMITED
    Inventors: Jirou Miura, Mitsushi Fujiki, Aki Dote, Tomohiro Takamatsu
  • Publication number: 20070122917
    Abstract: Disclosed is a ferroelectric capacitor forming method of allowing a FeRAM to be stably mass-produced. In forming the ferroelectric capacitor for the FeRAM, a PZT layer is formed on a lower electrode layer by a sputtering method. Then, a first RTA treatment for crystallizing the PZT is performed in an environment controlled such that predetermined capacitor performance such as a data holding property can be obtained regardless of the amount of a target previously used (used hours) in the sputtering method. For example, the O2 gas flow rate is controlled in an appropriate range during the first RTA treatment. Thereafter, formation of an upper electrode layer or a second RTA treatment is performed. As a result, the ferroelectric capacitor having predetermined capacitor performance can be formed with high yield, so that the FeRAM can be stably mass-produced.
    Type: Application
    Filed: April 20, 2006
    Publication date: May 31, 2007
    Applicant: FUJITSU LIMITED
    Inventors: Mitsushi Fujiki, Kenkichi Suezawa, Makoto Takahashi, Ko Nakamura, Wensheng Wang
  • Patent number: 7211850
    Abstract: An interlayer insulating film covering a ferroelectric capacitor is formed, and through the interlayer insulating film, contact holes each reaching a capacitor electrode are formed. A wiring connected to the capacitor electrode through the contact hole is further formed above the interlayer insulating film. A planar shape of the contact hole is a regular octagon, a regular rectangle with four angles thereof being rounded, an octagon with a length of each neighboring side thereof being different to each other, a circle, and so forth.
    Type: Grant
    Filed: June 4, 2004
    Date of Patent: May 1, 2007
    Assignee: Fujitsu Limited
    Inventors: Jirou Miura, Mitsushi Fujiki, Aki Dote, Tomohiro Takamatsu
  • Publication number: 20070037298
    Abstract: A semiconductor device fabrication method includes the steps of forming a conductive plug in an insulating film so as to be connected to an element on a semiconductor substrate; forming a titanium aluminum nitride (TiAlN) oxygen barrier film over the conductive plug; forming a titanium (Ti) seed film over the oxygen barrier film; and forming a lower electrode film of a ferroelectric capacitor over the titanium seed film.
    Type: Application
    Filed: April 21, 2006
    Publication date: February 15, 2007
    Applicants: FUJITSU LIMITED, Seiko Epson Corporation
    Inventors: Katsuyoshi Matsuura, Mitsushi Fujiki, Hiroyuki Mitsui, Hiroaki Tamura
  • Publication number: 20060157762
    Abstract: A semiconductor device includes: a semiconductor substrate; a MOS transistor formed in the semiconductor substrate and having an insulated gate and source/drain regions on both sides of the insulated gate; a ferroelectric capacitor formed above the semiconductor substrate and having a lower electrode, a ferroelectric layer and an upper electrode; a metal film formed on the upper electrode and having a thickness of a half of or thinner than a thickness of the upper electrode; an interlayer insulating film burying the ferroelectric capacitor and the metal film; a conductive plug formed through the interlayer insulating film, reaching the metal film and including a conductive glue film and a tungsten body; and an aluminum wiring formed on the interlayer insulating film and connected to the conductive plug. A new problem near an upper electrode contact is solved which may otherwise be caused by adopting a W plug over the F capacitor.
    Type: Application
    Filed: May 16, 2005
    Publication date: July 20, 2006
    Applicant: FUJITSU LIMITED
    Inventors: Yukinobu Hikosaka, Mitsushi Fujiki, Kazutoshi Izumi, Naoya Sashida, Aki Dote
  • Publication number: 20060118847
    Abstract: An upper electrode layer is processed into plural electrode shapes with lithography and subsequent dry etching to pattern plural upper electrodes, followed by conducting an RTA treatment at a treatment temperature of a value in a range from 400° C. to 1000° C. and at an oxygen flow volume of a value in a range from 0.1 L/min to 100 L/min and, subsequently, by conducting an annealing treatment at a treatment temperature of 650° C. in an oxygen atmosphere for 60 minutes.
    Type: Application
    Filed: March 30, 2005
    Publication date: June 8, 2006
    Applicant: FUJITSU LIMITED
    Inventors: Tomohiro Takamatsu, Mitsushi Fujiki
  • Patent number: 6933156
    Abstract: A capacitor which has a lower electrode having a structure in which the first conductive layer containing a first metal, a second conductive layer that is formed on the first conductive layer and made of the metal oxide of the second metal different from the first metal, and a third conductive layer that is formed on the second conductive layer and made of a third metal different from the first metal. These layers are formed sequentially. A dielectric layer is formed on the lower electrode, and an upper electrode is formed on the capacitor dielectric layer.
    Type: Grant
    Filed: January 27, 2004
    Date of Patent: August 23, 2005
    Assignee: Fujitsu Limited
    Inventors: Wensheng Wang, Mitsushi Fujiki, Ko Nakamura
  • Publication number: 20050072998
    Abstract: An interlayer insulating film covering a ferroelectric capacitor is formed, and through the interlayer insulating film, contact holes each reaching a capacitor electrode are formed. A wiring connected to the capacitor electrode through the contact hole is further formed above the interlayer insulating film. A planar shape of the contact hole is a regular octagon, a regular rectangle with four angles thereof being rounded, an octagon with a length of each neighboring side thereof being different to each other, a circle, and so forth.
    Type: Application
    Filed: June 4, 2004
    Publication date: April 7, 2005
    Applicant: FUJITSU LIMITED
    Inventors: Jirou Miura, Mitsushi Fujiki, Aki Dote, Tomohiro Takamatsu
  • Publication number: 20040185579
    Abstract: Provided is a method of manufacturing a semiconductor device includes forming an interlayer insulating film above a silicon (semiconductor) substrate, forming an lower layer of a lower-electrode conductive film on the interlayer insulating film while keeping the substrate temperature at a temperature higher than room temperature and lower than 300° C., forming an upper layer of the lower-electrode conductive film on the lower layer and setting the upper and lower layers as the lower-electrode conductive film, forming a ferroelectric film on the lower-electrode conductive film, forming an upper-electrode conductive film on the ferroelectric film, and forming a ferroelectric capacitor by patterning the upper-electrode conductive film, the ferroelectric film, and the lower-electrode conductive film.
    Type: Application
    Filed: February 6, 2004
    Publication date: September 23, 2004
    Applicant: Fujitsu Limited
    Inventor: Mitsushi Fujiki
  • Publication number: 20040184218
    Abstract: There is provided the capacitor which has the lower electrode having a structure in which the first conductive layer containing a first metal, the second conductive layer that is formed on the first conductive layer and made of the metal oxide of the second metal different from the first metal, and the third conductive layer that is formed on the second conductive layer and made of the third metal different from the first metal are formed sequentially; the dielectric layer formed on the lower electrode; and the upper electrode formed on the capacitor dielectric layer.
    Type: Application
    Filed: January 27, 2004
    Publication date: September 23, 2004
    Applicant: Fujitsu Limited
    Inventors: Wensheng Wang, Mitsushi Fujiki, Ko Nakamura
  • Patent number: 6713808
    Abstract: There is provided the capacitor which has the lower electrode having a structure in which the first conductive layer containing a first metal, the second conductive layer that is formed on the first conductive layer and made of the metal oxide of the second metal different from the first metal, and the third conductive layer that is formed on the second conductive layer and made of the third metal different from the first metal are formed sequentially; the dielectric layer formed on the lower electrode; and the upper electrode formed on the capacitor dielectric layer.
    Type: Grant
    Filed: April 4, 2002
    Date of Patent: March 30, 2004
    Assignee: Fujitsu Limited
    Inventors: Wensheng Wang, Mitsushi Fujiki, Ko Nakamura