Patents by Inventor Mitsuyasu Asano

Mitsuyasu Asano has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070120869
    Abstract: An image display apparatus for displaying an image on a panel having pixels each including a plurality of subpixels of different colors includes an interpolation operator interpolating consecutive sampling values of pieces of input color data to correct phases of the pieces of input color data on the basis of positions of the subpixels in each pixel and output pieces of output color data; an area detector detecting a specific area from the image displayed on the panel by processing the input color data or the output color data; and a correction unit computing and outputting weighted averages of the pieces of input color data and the pieces of output color data on the basis of a detection result obtained by the area detector. The specific area is an edge portion, a portion where a luminance level gradually changes, or a repeated-pattern portion where a spatial frequency is high.
    Type: Application
    Filed: November 15, 2006
    Publication date: May 31, 2007
    Inventors: Koji Nishida, Mitsuyasu Asano, Kazuhiko Ueda
  • Publication number: 20070103570
    Abstract: A horizontal direction component pixel extractor extracts a pixel of interest and a horizontal direction component pixel thereof from an input video signal. A vertical direction component pixel extractor extracts the pixel of interest and a vertical direction component pixel thereof from the input video signal. A threshold setter sets a threshold value from the pixel of interest and the vertical processing direction component pixel thereof. A non-linear smoother non-linearly smoothes the pixel of interest using a horizontal processing direction component pixel in accordance with the set threshold value, thereby generating a video signal. A flat rate calculator calculates a flat rate in a vertical direction of the pixel of interest using a vertical processing direction component pixel. A mixer mixes the input video signal and the generated video signal using the flat rate, thereby outputting a horizontal direction smoothed video signal.
    Type: Application
    Filed: October 30, 2006
    Publication date: May 10, 2007
    Inventors: Tetsuji Inada, Kazuki Yokoyama, Mitsuyasu Asano, Kazuhiko Ueda
  • Publication number: 20070070221
    Abstract: The present invention relates to an image processing apparatus and method, a recording medium, and a program that can very sharply display video images which are subjected to frame rate conversion by suppressing a decrease in the image quality (blurred images) caused by imaging blur. A high frame converter 11 performs high frame rate conversion on an input moving picture. An imaging blur suppression processor 13 corrects each pixel value forming a subject frame based on at least one value corresponding to the subject frame of the parameter values representing imaging blur detected by an imaging blur characteristic detector 12. Accordingly, a moving picture having a higher rate than that of the input moving picture and having each pixel value suitably corrected to suppress imaging blur is output. The present invention is applicable to a television system.
    Type: Application
    Filed: July 6, 2005
    Publication date: March 29, 2007
    Applicant: Sony Corporation
    Inventors: Toru Nishi, Kazuhiko Ueda, Mitsuyasu Asano
  • Publication number: 20070008348
    Abstract: A video signal processing apparatus for outputting an output video signal to a display unit and displaying an image based on an input video signal on the display unit includes a signal processor for dividing the input video signal into a predetermined number of signals and outputting the signals as the output video signal. The signals as the output video signal drive associated areas obtained by dividing a display-capable area of the display unit. In accordance with the display unit, the predetermined number of signals is set so that the clock frequency of each of the signals output as the output video signal is less than or equal to a clock frequency that can be processed by the display unit.
    Type: Application
    Filed: July 6, 2006
    Publication date: January 11, 2007
    Inventors: Toru Nishi, Mitsuyasu Asano, Kazuhiko Ueda, Masuyoshi Kurokawa, Kazuhiko Nishibori
  • Publication number: 20060215927
    Abstract: The present invention relates to a signal processing apparatus and a method, a recording medium, and a program, in which portions except an edge can be smoothed while the edge whose change in pixel value is steep is held correctly. A pixel of attention is determined in step S11, and a neighbouring pixel is determined in step S12. In step S13, a difference in pixel values between the pixel of attention and each neighbouring pixel is calculated. In step S14, according to a relationship in size between the difference and a threshold value ?., flags are raised for the neighbouring pixel and a neighbouring pixel which are symmetrical. Furthermore, a flag is also raised for a neighbouring pixel away from, in view of the pixel of attention, the symmetrical neighbouring pixel for which the flag is raised. In step S15, 7-pixel taps centered around the pixel of attention are averaged by weight.
    Type: Application
    Filed: April 19, 2004
    Publication date: September 28, 2006
    Inventors: Shintaro Okada, Kazuhiko Ueda, Mitsuyasu Asano, Takeshi Kubozono, Kazuhiko Yokoyama
  • Patent number: 7106346
    Abstract: An n-filter according to the present invention includes a nonlinear filter, a pattern detector, and a switch. The nonlinear filter maintains a steep edge whose size is larger than a predetermined threshold in fluctuations of pixels constituting an input image signal and, at the same time, smoothes a non-edge portion that does not include the edge. The pattern detector detects a fine edge in the fluctuations of the pixels constituting the input image signal and notifies the switch that the fine edge exists. The switch outputs the input image signal or an image signal output from the nonlinear filter to the subsequent stage in accordance with the notification from the pattern detector.
    Type: Grant
    Filed: July 8, 2004
    Date of Patent: September 12, 2006
    Assignee: Sony Corporation
    Inventors: Kazuki Yokoyama, Kazuhiko Ueda, Mitsuyasu Asano, Takeshi Kubozono, Tetsuji Inada
  • Publication number: 20060146168
    Abstract: An image processing apparatus includes a corrector for correcting a pixel value of each of a plurality of pixels forming each access unit to be processed, based on at least one of the parameter values corresponding to the access unit to be processed. The corrector includes an acquisition unit for acquiring input pixel values, a first mean value calculating unit for calculating a first mean pixel value, a second mean value calculating unit for calculating a second mean pixel value, a correction value determination unit for determining a correction value, and an adding unit for adding the correction value to the input pixel value of a target pixel.
    Type: Application
    Filed: December 5, 2005
    Publication date: July 6, 2006
    Inventors: Toru Nishi, Kazuhiko Ueda, Mitsuyasu Asano
  • Publication number: 20050237432
    Abstract: An image-processing apparatus includes an average-luminance calculating unit that calculates the average luminance of pixels in an image, a correction-factor calculating unit that calculates a correction factor corresponding to the luminance of each pixel, a correction-value calculating unit that calculates a correction value corresponding to each pixel based on the average luminance and the correction factor, and an adding unit that adds the correction value to the luminance. The correction-value calculating unit sets the correction value to a maximum value of zero when the luminance has a maximum value.
    Type: Application
    Filed: April 19, 2005
    Publication date: October 27, 2005
    Inventors: Kazuki Yokoyama, Kazuhiko Ueda, Mitsuyasu Asano, Tetsuji Inada
  • Publication number: 20050232356
    Abstract: A histogram section determines as a motion vector at a pixel of interest the candidate motion vector with highest frequency from among a candidate motion vector at the pixel of interest and candidate motion vectors at pixels neighboring the pixel of interest supplied by a template matching section, and supplies it to a motion-vector correcting section. The motion-vector correction section evaluates the confidence level of the motion vector supplied by the histogram section based on the luminance gradient around the pixel of interest detected by a luminance-gradient detecting section and a control signal indicating whether correction should be carried out supplied by the template matching section. If it is determined that the confidence level of the motion vector is low, the motion vector is corrected.
    Type: Application
    Filed: February 24, 2005
    Publication date: October 20, 2005
    Inventors: Shinichiro Gomi, Toru Nishi, Kazuki Yokoyama, Mitsuyasu Asano, Masami Ogata, Kazuhiko Ueda
  • Publication number: 20050035977
    Abstract: An n-filter according to the present invention includes a nonlinear filter, a pattern detector, and a switch. The nonlinear filter maintains a steep edge whose size is larger than a predetermined threshold in fluctuations of pixels constituting an input image signal and, at the same time, smoothes a non-edge portion that does not include the edge. The pattern detector detects a fine edge in the fluctuations of the pixels constituting the input image signal and notifies the switch that the fine edge exists. The switch outputs the input image signal or an image signal output from the nonlinear filter to the subsequent stage in accordance with the notification from the pattern detector.
    Type: Application
    Filed: July 8, 2004
    Publication date: February 17, 2005
    Inventors: Kazuki Yokoyama, Kazuhiko Ueda, Mitsuyasu Asano, Takeshi Kubozono, Tetsuji Inada
  • Publication number: 20050030302
    Abstract: A holding type display such as a liquid-crystal display for controlling motion blur is disclosed. A step edge detector detects an edge portion of a moving step edge in video data in an input frame or an input field. A corrector corrects a pixel value of a pixel at the edge portion of the step edge detected by the step edge detector, based on a spatial amount of motion of the corresponding pixel supplied by a motion detector.
    Type: Application
    Filed: July 1, 2004
    Publication date: February 10, 2005
    Inventors: Toru Nishi, Kazuhiko Ueda, Mitsuyasu Asano, Kazuki Yokoyama, Tetsuji Inada
  • Publication number: 20040246378
    Abstract: In each of stages of a nonlinear filter, a successively determined target signal and plural adjacent signals are weighted-averaged with plural sets of different coefficients to calculate plural smoothed signals. Differences in level between the target signal and each of adjacent signals and signals arranged within the predetermined interval from the each of the adjacent signals are compared with a threshold value. According to the comparison, flags are set to the adjacent signal, to an adjacent signal arranged at a symmetrical position, and to adjacent signals arranged beyond the adjacent signals. The intervals of adjacent signals are different among stages. The target signal in level is used instead of the adjacent signals with smoothed signals, which are selected according to the flags. Weighting coefficients may be calculated on the basis of the comparison result, and smoothed signals may be synthesized according to the weighting coefficients.
    Type: Application
    Filed: March 22, 2004
    Publication date: December 9, 2004
    Applicant: SONY CORPORATION
    Inventors: Shintaro Okada, Kazuhiko Ueda, Mitsuyasu Asano, Takeshi Kubozono, Kazuki Yokoyama
  • Publication number: 20040071361
    Abstract: An input signal is accurately separated into a component in which a change in signal level is sharp and having a large edge, and the other components.
    Type: Application
    Filed: May 22, 2003
    Publication date: April 15, 2004
    Inventors: Mitsuyasu Asano, Kazuhiko Ueda, Takeshi Kubozono, Kazuki Yokoyama
  • Patent number: 5146330
    Abstract: A noise reduction circuit (13) in which a difference signal (S.sub.I -S.sub.I1) between the original video signal (S.sub.I) and a delayed video signal (S.sub.I1) obtained by passing the original video signal (S.sub.I) through a delay circuit (5) is obtained, and a signal obtained by passing the above difference signal (S.sub.I -S.sub.I1) through a gain control amplifier (8) is subtracted from the above original video signal (S.sub.I), and the gain which reflects movement in the gain control amplifier (8) is controlled by a movement detection signal (S.sub.M) of the above original video signal (S.sub.z) and a detection signal (S.sub.c) which reflects the input electric field strength so as not to decrease the gain of the gain control amplifier (8) at middle to weak electric field, the noise reduction circuit may be applied to a television receiver, etc.
    Type: Grant
    Filed: June 10, 1991
    Date of Patent: September 8, 1992
    Assignee: Sony Corporation
    Inventors: Takashi Okada, Masumi Ogawa, Mitsuyasu Asano, Masaru Nonogaki
  • Patent number: 5005081
    Abstract: A noise reduction circuit in which a first signal (S .sub.h2) is obtained by passing the input video signal (S .sub.I ) through a low frequency shut-off filter (10) and another a limiter (11), a second before signal (S .sub.H21) is obtained by passing the above obtained signal (S .sub.H2) through a field or frame delay circuit (5) and the difference between the two signals (S .sub.H2 - S.sub.H21) is subtracted from the above input video signal (S .sub.I ) so as not to lower the definition of image, the noise reduction circuit being capable of application in a television receiver etc.
    Type: Grant
    Filed: January 10, 1989
    Date of Patent: April 2, 1991
    Assignee: Sony Corporation
    Inventor: Mitsuyasu Asano
  • Patent number: 4961113
    Abstract: A noise reduction circuit in which a video signal (S.sub.I) is divided into a first signal (S.sub.L) having low frequency component and a second signal (S.sub.H1) having high frequency component, the above second signal (S.sub.H1) is divided into a third signal (S.sub.H2) having an amplitude more than a predetermined value and a fourth signal (S.sub.H3) having an amplitute less than the predetermined value, a noise reduction process using a delay circuit (12) is applied to the above fourth signal (S.sub.H3) to obtain a fifth signal (S.sub.H4), and the above first signal (S.sub.L), third signal (S.sub.H2) and fifth signal (S.sub.H4) are added, the noise reduction circuit being applicable to apply to a television receiver, etc.
    Type: Grant
    Filed: January 10, 1989
    Date of Patent: October 2, 1990
    Assignee: Sony Corporation
    Inventors: Takashi Okada, Masumi Ogawa, Mitsuyasu Asano, Masaru Nonogaki