Patents by Inventor Motoyoshi KUBOUCHI
Motoyoshi KUBOUCHI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240128359Abstract: A method of manufacturing a semiconductor device comprising a transistor section and a diode section each having a drift region of a first conductivity-type inside a semiconductor substrate, and a base region of a second conductivity-type above the drift region. A particle beam is irradiated from an upper surface of the semiconductor substrate forming a lifetime control region including lifetime killers below the base region from at least a part of the transistor section to the diode section. A threshold value adjusting section is formed for adjusting a threshold value of the transistor section, including a thickened portion Wgi of a gate insulating film in a gate trench section adjacent to the base region, the thickened portion having a dielectric constant less than or equal to 0.9 times a remaining portion of the gate insulating film in the gate trench section.Type: ApplicationFiled: December 25, 2023Publication date: April 18, 2024Inventor: Motoyoshi KUBOUCHI
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Publication number: 20240097015Abstract: A semiconductor device includes: a semiconductor substrate of a first conductivity-type: an insulated gate electrode structure buried in a first trench provided in the semiconductor substrate; a base region of a second conductivity-type provided in the semiconductor substrate so as to be in contact with the first trench; a first main electrode region of the first conductivity-type provided at an upper part of the base region so as to be in contact with the first trench: a polysilicon film of the second conductivity-type having a higher impurity concentration than the base region and buried in a second trench provided in the semiconductor substrate so as to be in contact with the base region; and a second main electrode region provided on a bottom surface side of the semiconductor substrate.Type: ApplicationFiled: August 28, 2023Publication date: March 21, 2024Applicant: FUJI ELECTRIC CO., LTD.Inventors: Ryouichi KAWANO, Motoyoshi KUBOUCHI
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Publication number: 20240079286Abstract: In a semiconductor device, it is preferable to suppress a variation in characteristics of a temperature sensor. The semiconductor device is provided that includes a semiconductor substrate having a first conductivity type drift region, a transistor section provided in the semiconductor substrate, a diode section provided in the semiconductor substrate, a second conductivity type well region exposed at an upper surface of the semiconductor substrate, a temperature sensing unit that is adjacent to the diode section in top view and is provided above the well region, and an upper lifetime control region that is provided in the diode section, at the upper surface side of the semiconductor substrate, and in a region not overlapping with the temperature sensing unit in top view.Type: ApplicationFiled: November 13, 2023Publication date: March 7, 2024Inventors: Motoyoshi KUBOUCHI, Soichi YOSHIDA
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Publication number: 20240055506Abstract: To provide a manufacturing method of a semiconductor device including forming a lifetime control region from the side of a front surface of a semiconductor substrate, ion-implanting Ti into a bottom surface of a contact hole provided so as to penetrate through an interlayer dielectric film arranged on the front surface of the semiconductor substrate, and forming a Ti silicide layer at the bottom surface of the contact hole with anneal.Type: ApplicationFiled: October 23, 2023Publication date: February 15, 2024Inventors: Takashi YOSHIMURA, Makoto SHIMOSAWA, Motoyoshi KUBOUCHI, Misaki UCHIDA
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Patent number: 11901443Abstract: Provided is a semiconductor device comprising a semiconductor substrate having a transistor section and a diode section, wherein both the transistor section and the diode section each have a drift region of a first conductivity-type provided inside the semiconductor substrate, and a base region of a second conductivity-type provided above the drift region inside the semiconductor substrate, inside the semiconductor substrate, a lifetime control region including lifetime killers is provided below the base region from at least a part of the transistor section to the diode section, and in the transistor section, a threshold value adjusting section for adjusting a threshold value of the transistor section is provided overlapping the lifetime control region as seen from an upper surface of the semiconductor substrate.Type: GrantFiled: July 28, 2020Date of Patent: February 13, 2024Assignee: FUJI ELECTRIC CO., LTD.Inventor: Motoyoshi Kubouchi
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Publication number: 20240047535Abstract: A semiconductor device, including a semiconductor substrate having a transistor portion and a diode portion, a drift region of a first conductivity type provided in the semiconductor substrate, a first electrode provided on one main surface side of the semiconductor substrate, and a second electrode provided on another main surface side of the semiconductor substrate, is provided. The diode portion includes a high concentration region and a crystalline defect region. The high concentration region has a higher doping concentration than the drift region and includes hydrogen. The doping concentration of the high concentration region at a peak position in a depth direction of the semiconductor substrate is equal to or less than 1.0×1015/cm3. The crystalline defect region is provided on the one main surface side of the semiconductor substrate relative to the peak position, has a higher crystalline defect density than the drift region, and includes hydrogen.Type: ApplicationFiled: October 12, 2023Publication date: February 8, 2024Inventors: Takashi YOSHIMURA, Yuichi ONOZAWA, Hiroshi TAKISHITA, Misaki MEGURO, Motoyoshi KUBOUCHI, Naoko KODAMA
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Publication number: 20230402511Abstract: Provided is a semiconductor device including a drift region, a buffer region which is provided in a back surface side of a semiconductor substrate relative to the drift region and has a first peak of a doping concentration, and a first lattice defect region which is provided in a front surface side of the semiconductor substrate relative to the first peak in a depth direction of the semiconductor substrate, in which the buffer region has a hydrogen peak which is provided in the front surface side of the semiconductor substrate relative to the first lattice defect region, and an integrated concentration obtained by integrating the doping concentration in a direction from an upper end of the drift region to the hydrogen peak in the depth direction of the semiconductor substrate is equal to or larger than a critical integrated concentration.Type: ApplicationFiled: August 25, 2023Publication date: December 14, 2023Inventors: Motoyoshi KUBOUCHI, Takashi YOSHIMURA, Yuki SAWA, Shogo YAMAGUCHI
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Patent number: 11830782Abstract: In a semiconductor device, it is preferable to suppress a variation in characteristics of a temperature sensor. The semiconductor device is provided that includes a semiconductor substrate having a first conductivity type drift region, a transistor section provided in the semiconductor substrate, a diode section provided in the semiconductor substrate, a second conductivity type well region exposed at an upper surface of the semiconductor substrate, a temperature sensing unit that is adjacent to the diode section in top view and is provided above the well region, and an upper lifetime control region that is provided in the diode section, at the upper surface side of the semiconductor substrate, and in a region not overlapping with the temperature sensing unit in top view.Type: GrantFiled: May 11, 2021Date of Patent: November 28, 2023Assignee: FUJI ELECTRIC CO., LTD.Inventors: Motoyoshi Kubouchi, Soichi Yoshida
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Patent number: 11824095Abstract: Provided is a semiconductor device including a semiconductor substrate; a hydrogen donor that is provide inside the semiconductor substrate in a depth direction, has a doping concentration that is higher than a doping concentration of a dopant of the semiconductor substrate, has a doping concentration distribution peak at a first position that is a predetermined distance in the depth direction of the semiconductor substrate away from one main surface of the semiconductor substrate, and has a tail of the doping concentration distribution where the doping concentration is lower than at the peak, farther on the one main surface side than where the first position is located; and a crystalline defect region having a crystalline defect density center peak at a position shallower than the first position, in the depth direction of the semiconductor substrate.Type: GrantFiled: January 17, 2022Date of Patent: November 21, 2023Assignee: FUJI ELECTRIC CO., LTD.Inventors: Takashi Yoshimura, Yuichi Onozawa, Hiroshi Takishita, Misaki Meguro, Motoyoshi Kubouchi, Naoko Kodama
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Publication number: 20230369137Abstract: A semiconductor device includes trench portions arrayed in a first direction on an upper surface side of a semiconductor substrate, a first conductivity type lower surface region provided in a part of a lower surface of the semiconductor substrate, a second conductivity type base region provided on the upper surface side, a first conductivity type first region disposed between the base region and the lower surface region, a first conductivity type upper surface region provided on an upper surface of the semiconductor substrate, and a second conductivity type bottom region disposed continuously in the first direction to be in contact with bottom portions of the trench portions. In a cross section along the first direction and perpendicular to the upper and lower surfaces and passing through the lower surface region, one end portion of the bottom region in the first direction locates directly above the lower surface region.Type: ApplicationFiled: July 14, 2023Publication date: November 16, 2023Inventors: Motoyoshi KUBOUCHI, Kosuke YOSHIDA, Soichi YOSHIDA, Koh YOSHIKAWA, Nao SUGANUMA
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Publication number: 20230317812Abstract: Provided is a semiconductor device including a MOS gate structure provided in a semiconductor substrate, including: an interlayer dielectric film which includes a contact hole and is provided above the semiconductor substrate; a conductive first barrier metal layer provided on side walls of the interlayer dielectric film in the contact hole; a conductive second barrier metal layer stacked on the first barrier metal layer in the contact hole; and a silicide layer provided on an upper surface of the semiconductor substrate below the contact hole, in which the first barrier metal layer is more dense than the second barrier metal layer, and a film thickness thereof is 1 nm or more and 10 nm or less.Type: ApplicationFiled: February 22, 2023Publication date: October 5, 2023Inventors: Takashi YOSHIMURA, Makoto SHIMOSAWA, Motoyoshi KUBOUCHI, Misaki UCHIDA
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Patent number: 11756868Abstract: A semiconductor device, including a semiconductor module and a conducting board. The semiconductor module includes a semiconductor chip and an external connecting terminal which has a first end electrically connected to the semiconductor chip and a second end extending from the semiconductor chip. The conducting board has a terminal hole penetrating therethrough, an inlet and an outlet of the terminal hole being respectively on two opposite surfaces of the conducting board. The conducting board is electrically connected to the external connecting terminal, of which the second end fits into the terminal hole from the inlet toward the outlet, and is fixed therein by solder. At least one of the terminal hole and the second end of the external connecting terminal has a lock part. The second end of the external connecting terminal, inserted into the terminal hole, is locked by the lock part and thereby remains in the terminal hole.Type: GrantFiled: September 30, 2020Date of Patent: September 12, 2023Assignee: FUJI ELECTRIC CO., LTD.Inventor: Motoyoshi Kubouchi
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Patent number: 11742249Abstract: A fabrication method for a semiconductor device includes measuring a thickness of a semiconductor substrate in which a bulk donor of a first conductivity type is entirely distributed, adjusting an implantation condition in accordance with the thickness of the semiconductor substrate and implanting hydrogen ions from a lower surface of the semiconductor substrate to an upper surface side of the semiconductor substrate, and annealing the semiconductor substrate and forming, in a passage region through which the hydrogen ions have passed, a first high concentration region of the first conductivity type in which a donor concentration is higher than a doping concentration of the bulk donor.Type: GrantFiled: September 5, 2022Date of Patent: August 29, 2023Assignee: FUJI ELECTRIC CO., LTD.Inventors: Motoyoshi Kubouchi, Kosuke Yoshida, Soichi Yoshida, Koh Yoshikawa, Nao Suganuma
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Publication number: 20230261094Abstract: A semiconductor device includes: a semiconductor substrate; a plurality of trenches provided on a top surface side of the semiconductor substrate; am insulated gate electrode structure buried inside the respective trenches; an interlayer insulating film deposited on top surfaces of the semiconductor substrate and the insulated gate electrode structure; and a silicide layer deposited at a bottom of a contact hole penetrating the interlayer insulating film so as to be in contact with the top surface of the semiconductor substrate interposed between the trenches adjacent to each other, wherein at least a part of a bottom surface of the silicide layer is located at a higher position than a bottom surface of the interlayer insulating film.Type: ApplicationFiled: December 27, 2022Publication date: August 17, 2023Applicant: FUJI ELECTRIC CO., LTD.Inventor: Motoyoshi KUBOUCHI
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Publication number: 20230261044Abstract: Provided is a semiconductor device including: a buffer region having one or more doping concentration peaks having a higher doping concentration than a drift region; and a lifetime control portion provided at a position overlapping a shallowest concentration peak closest to a lower surface of a semiconductor substrate among the doping concentration peaks provided in the buffer region, and in which a carrier lifetime shows a local minimum value, in which the semiconductor substrate has a critical depth position at which an integrated value, which is obtained by integrating doping concentrations from an upper end of the drift region toward the lower surface, reaches a critical integrated concentration of the semiconductor substrate, and a depth position at which the carrier lifetime shows the local minimum value in the lifetime control portion is arranged closer to the lower surface than the critical depth position.Type: ApplicationFiled: December 22, 2022Publication date: August 17, 2023Inventors: Yuki SAWA, Motoyoshi KUBOUCHI, Takashi YOSHIMURA
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Publication number: 20230207674Abstract: Provided is a semiconductor device including: a drift region of a first conductivity type provided in a semiconductor substrate; a base region of a second conductivity type provided above the drift region; an emitter region of a first conductivity type provided above the base region; a second conductivity type region provided above the drift region; a plurality of trench portions extending in a predetermined extending direction; and an interlayer dielectric film provided above the semiconductor substrate and includes a first contact hole portion and second contact hole portion, in which the second conductivity type region and the emitter region are provided alternately in the extending direction, the first contact hole portion is provided alternately with the second contact hole portion in the extending direction, and a lower end of the first contact hole portion is provided at a different depth from a lower end of the second contact hole portion.Type: ApplicationFiled: December 23, 2022Publication date: June 29, 2023Inventors: Motoyoshi KUBOUCHI, Makoto SHIMOSAWA, Makoto ENDOU
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Publication number: 20230197772Abstract: Provided is a semiconductor device including: a semiconductor substrate having bulk donors distributed throughout the semiconductor substrate; a high-concentration hydrogen peak provided on the semiconductor substrate and having a hydrogen dose amount of 3×1015/cm2 or more; a high-concentration region including a position overlapping with the high-concentration hydrogen peak in a depth direction of the semiconductor substrate and having a donor concentration higher than a bulk donor concentration; and a lifetime adjustment portion provided at a position overlapping with the high-concentration hydrogen peak in the depth direction and having a carrier lifetime indicating a minimum value.Type: ApplicationFiled: February 22, 2023Publication date: June 22, 2023Inventor: Motoyoshi KUBOUCHI
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Publication number: 20230078856Abstract: A power converter, includes: a first line to which a first voltage is applied; a second line to which a second voltage lower than the first voltage is applied; a third line to which a third voltage lower than the second voltage is applied; a first bridge circuit that is provided between the first line and the second line, the first bridge circuit including a plurality of first switching elements; a second bridge circuit that is provided between the second line and the third line, the second bridge circuit including a plurality of second switching elements; and a voltage output circuit configured to generate a predetermined direct current (DC) voltage based on operations of the first and second bridge circuits.Type: ApplicationFiled: July 28, 2022Publication date: March 16, 2023Applicant: FUJI ELECTRIC CO., LTD.Inventor: Motoyoshi KUBOUCHI
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Publication number: 20230040096Abstract: A fabrication method for a semiconductor device includes measuring a thickness of a semiconductor substrate in which a bulk donor of a first conductivity type is entirely distributed, adjusting an implantation condition in accordance with the thickness of the semiconductor substrate and implanting hydrogen ions from a lower surface of the semiconductor substrate to an upper surface side of the semiconductor substrate, and annealing the semiconductor substrate and forming, in a passage region through which the hydrogen ions have passed, a first high concentration region of the first conductivity type in which a donor concentration is higher than a doping concentration of the bulk donor.Type: ApplicationFiled: September 5, 2022Publication date: February 9, 2023Inventors: Motoyoshi KUBOUCHI, Kosuke YOSHIDA, Soichi YOSHIDA, Koh YOSHIKAWA, Nao SUGANUMA
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Publication number: 20220375933Abstract: A semiconductor device includes a semiconductor substrate including an active region and an outer peripheral region. The active region includes a transistor portion and a diode portion. The outer peripheral region includes a current sensing unit. A lifetime control region including a lifetime killer is provided from the diode portion to at least a part of the transistor portion. The current sensing unit includes a sense transistor non-irradiation region not provided with the lifetime control region and a sense transistor irradiation region provided with the lifetime control region.Type: ApplicationFiled: March 22, 2022Publication date: November 24, 2022Inventor: Motoyoshi KUBOUCHI