Patents by Inventor Mullangi Venkata Ratna Reddy

Mullangi Venkata Ratna Reddy has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12262061
    Abstract: A de-blocking filter includes a reconstructed memory that is configured to store reconstructed pixels corresponding to a current macroblock of a video image to be filtered. The current macroblock includes a set of sub-blocks, each sub-block having horizontal edges and vertical edges. An internal pixel buffer in the de-blocking filter is configured to store pixels corresponding to the set of sub-blocks from the reconstructed memory, and to store partially filtered pixels corresponding to a set of partially filtered macroblocks. An edge order controller in the de-blocking filter is configured to load the pixels corresponding to the set of sub-blocks into a filter engine from the internal pixel buffer, to filter the set of sub-blocks, such that, at least one horizontal edge is filtered before filtering all vertical edges of the set of sub-blocks.
    Type: Grant
    Filed: July 10, 2023
    Date of Patent: March 25, 2025
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Niraj Nandan, Mullangi Venkata Ratna Reddy
  • Publication number: 20230353789
    Abstract: A de-blocking filter includes a reconstructed memory that is configured to store reconstructed pixels corresponding to a current macroblock of a video image to be filtered. The current macroblock includes a set of sub-blocks, each sub-block having horizontal edges and vertical edges. An internal pixel buffer in the de-blocking filter is configured to store pixels corresponding to the set of sub-blocks from the reconstructed memory, and to store partially filtered pixels corresponding to a set of partially filtered macroblocks. An edge order controller in the de-blocking filter is configured to load the pixels corresponding to the set of sub-blocks into a filter engine from the internal pixel buffer, to filter the set of sub-blocks, such that, at least one horizontal edge is filtered before filtering all vertical edges of the set of sub-blocks.
    Type: Application
    Filed: July 10, 2023
    Publication date: November 2, 2023
    Inventors: Niraj Nandan, Mullangi Venkata Ratna Reddy
  • Patent number: 11700396
    Abstract: A de-blocking filter includes a reconstructed memory that is configured to store reconstructed pixels corresponding to a current macroblock of a video image to be filtered. The current macroblock includes a set of sub-blocks, each sub-block having horizontal edges and vertical edges. An internal pixel buffer in the de-blocking filter is configured to store pixels corresponding to the set of sub-blocks from the reconstructed memory, and to store partially filtered pixels corresponding to a set of partially filtered macroblocks. An edge order controller in the de-blocking filter is configured to load the pixels corresponding to the set of sub-blocks into a filter engine from the internal pixel buffer, to filter the set of sub-blocks, such that, at least one horizontal edge is filtered before filtering all vertical edges of the set of sub-blocks.
    Type: Grant
    Filed: November 10, 2021
    Date of Patent: July 11, 2023
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Niraj Nandan, Mullangi Venkata Ratna Reddy
  • Publication number: 20220070499
    Abstract: A de-blocking filter includes a reconstructed memory that is configured to store reconstructed pixels corresponding to a current macroblock of a video image to be filtered. The current macroblock includes a set of sub-blocks, each sub-block having horizontal edges and vertical edges. An internal pixel buffer in the de-blocking filter is configured to store pixels corresponding to the set of sub-blocks from the reconstructed memory, and to store partially filtered pixels corresponding to a set of partially filtered macroblocks. An edge order controller in the de-blocking filter is configured to load the pixels corresponding to the set of sub-blocks into a filter engine from the internal pixel buffer, to filter the set of sub-blocks, such that, at least one horizontal edge is filtered before filtering all vertical edges of the set of sub-blocks.
    Type: Application
    Filed: November 10, 2021
    Publication date: March 3, 2022
    Inventors: Niraj Nandan, Mullangi Venkata Ratna Reddy
  • Patent number: 11202102
    Abstract: A de-blocking filter includes a reconstructed memory that is configured to store reconstructed pixels corresponding to a current macroblock of a video image to be filtered. The current macroblock includes a set of sub-blocks, each sub-block having horizontal edges and vertical edges. An internal pixel buffer in the de-blocking filter is configured to store pixels corresponding to the set of sub-blocks from the reconstructed memory, and to store partially filtered pixels corresponding to a set of partially filtered macroblocks. An edge order controller in the de-blocking filter is configured to load the pixels corresponding to the set of sub-blocks into a filter engine from the internal pixel buffer, to filter the set of sub-blocks, such that, at least one horizontal edge is filtered before filtering all vertical edges of the set of sub-blocks.
    Type: Grant
    Filed: April 2, 2020
    Date of Patent: December 14, 2021
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Niraj Nandan, Mullangi Venkata Ratna Reddy
  • Publication number: 20200236405
    Abstract: A de-blocking filter includes a reconstructed memory that is configured to store reconstructed pixels corresponding to a current macroblock of a video image to be filtered. The current macroblock includes a set of sub-blocks, each sub-block having horizontal edges and vertical edges. An internal pixel buffer in the de-blocking filter is configured to store pixels corresponding to the set of sub-blocks from the reconstructed memory, and to store partially filtered pixels corresponding to a set of partially filtered macroblocks. An edge order controller in the de-blocking filter is configured to load the pixels corresponding to the set of sub-blocks into a filter engine from the internal pixel buffer, to filter the set of sub-blocks, such that, at least one horizontal edge is filtered before filtering all vertical edges of the set of sub-blocks.
    Type: Application
    Filed: April 2, 2020
    Publication date: July 23, 2020
    Inventors: Niraj Nandan, Mullangi Venkata Ratna Reddy
  • Patent number: 10652582
    Abstract: A de-blocking filter includes a reconstructed memory that is configured to store reconstructed pixels corresponding to a current macroblock of a video image to be filtered. The current macroblock includes a set of sub-blocks, each sub-block having horizontal edges and vertical edges. An internal pixel buffer in the de-blocking filter is configured to store pixels corresponding to the set of sub-blocks from the reconstructed memory, and to store partially filtered pixels corresponding to a set of partially filtered macroblocks. An edge order controller in the de-blocking filter is configured to load the pixels corresponding to the set of sub-blocks into a filter engine from the internal pixel buffer, to filter the set of sub-blocks, such that, at least one horizontal edge is filtered before filtering all vertical edges of the set of sub-blocks.
    Type: Grant
    Filed: January 15, 2018
    Date of Patent: May 12, 2020
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Niraj Nandan, Mullangi Venkata Ratna Reddy
  • Publication number: 20180184125
    Abstract: A de-blocking filter includes a reconstructed memory that is configured to store reconstructed pixels corresponding to a current macroblock of a video image to be filtered. The current macroblock includes a set of sub-blocks, each sub-block having horizontal edges and vertical edges. An internal pixel buffer in the de-blocking filter is configured to store pixels corresponding to the set of sub-blocks from the reconstructed memory, and to store partially filtered pixels corresponding to a set of partially filtered macroblocks. An edge order controller in the de-blocking filter is configured to load the pixels corresponding to the set of sub-blocks into a filter engine from the internal pixel buffer, to filter the set of sub-blocks, such that, at least one horizontal edge is filtered before filtering all vertical edges of the set of sub-blocks.
    Type: Application
    Filed: January 15, 2018
    Publication date: June 28, 2018
    Inventors: Niraj Nandan, Mullangi Venkata Ratna Reddy
  • Patent number: 9872044
    Abstract: A de-blocking filter includes a reconstructed memory that is configured to store reconstructed pixels corresponding to a current macroblock of a video image to be filtered. The current macroblock includes a set of sub-blocks, each sub-block having horizontal edges and vertical edges. An internal pixel buffer in the de-blocking filter is configured to store pixels corresponding to the set of sub-blocks from the reconstructed memory, and to store partially filtered pixels corresponding to a set of partially filtered macroblocks. An edge order controller in the de-blocking filter is configured to load the pixels corresponding to the set of sub-blocks into a filter engine from the internal pixel buffer, to filter the set of sub-blocks, such that, at least one horizontal edge is filtered before filtering all vertical edges of the set of sub-blocks.
    Type: Grant
    Filed: May 15, 2014
    Date of Patent: January 16, 2018
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Niraj Nandan, Mullangi Venkata Ratna Reddy
  • Patent number: 9612962
    Abstract: In certain embodiments, methods and systems for multimedia data processing are provided. In an embodiment, a method for processing multimedia data includes defining one or more pixel block regions in a first cache so as to cache a plurality of reference pixel blocks corresponding to reference data. A reference pixel block from among the plurality of reference pixel blocks is assigned to a pixel block region from among the one or more pixel block regions based on a predetermined criterion. The reference pixel block is associated with a tag based on the pixel block region so as to facilitate a search of the reference data in order to process a plurality of pixel blocks associated with a multimedia frame of the multimedia data.
    Type: Grant
    Filed: November 12, 2014
    Date of Patent: April 4, 2017
    Assignee: Texas Instruments Incorporated
    Inventors: Hetul Sanghvi, Mullangi Venkata Ratna Reddy, Ajit Deepak Gupte, Arindam Basak
  • Patent number: 9602841
    Abstract: A system and method for decoding video encoded using scalable video coding. In one embodiment, a decoder for scalable video coding (SVC) includes an SVC access unit analyzer and decoding logic. The SVC access unit analyzer is configured to examine an SVC access unit prior to layered decoding of the access unit, to determine, based on the examination, what operations the access unit specifies for each layer of the decoding, and to determine, based on the determined operations to be performed for each layer of the decoding, what data to store for use by a subsequent layer of the decoding. The decoding logic is configured to decode the access unit via a plurality of decoding layers; and to store at each decoding layer, for use by a subsequent decoding layer, the data determined by the SVC access unit analyzer to be used by the subsequent decoding layer.
    Type: Grant
    Filed: October 30, 2012
    Date of Patent: March 21, 2017
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Manu Mathew, Mullangi Venkata Ratna Reddy
  • Publication number: 20150074318
    Abstract: In certain embodiments, methods and systems for multimedia data processing are provided. In an embodiment, a method for processing multimedia data includes defining one or more pixel block regions in a first cache so as to cache a plurality of reference pixel blocks corresponding to reference data. A reference pixel block from among the plurality of reference pixel blocks is assigned to a pixel block region from among the one or more pixel block regions based on a predetermined criterion. The reference pixel block is associated with a tag based on the pixel block region so as to facilitate a search of the reference data in order to process a plurality of pixel blocks associated with a multimedia frame of the multimedia data.
    Type: Application
    Filed: November 12, 2014
    Publication date: March 12, 2015
    Inventors: Hetul Sanghvi, Mullangi Venkata Ratna Reddy, Ajit Deepak Gupta, Arindam Basak
  • Publication number: 20140341308
    Abstract: A de-blocking filter includes a reconstructed memory that is configured to store reconstructed pixels corresponding to a current macroblock of a video image to be filtered. The current macroblock includes a set of sub-blocks, each sub-block having horizontal edges and vertical edges. An internal pixel buffer in the de-blocking filter is configured to store pixels corresponding to the set of sub-blocks from the reconstructed memory, and to store partially filtered pixels corresponding to a set of partially filtered macroblocks. An edge order controller in the de-blocking filter is configured to load the pixels corresponding to the set of sub-blocks into a filter engine from the internal pixel buffer, to filter the set of sub-blocks, such that, at least one horizontal edge is filtered before filtering all vertical edges of the set of sub-blocks.
    Type: Application
    Filed: May 15, 2014
    Publication date: November 20, 2014
    Applicant: Texas Instruments Incorporated
    Inventors: Niraj Nandan, Mullangi Venkata Ratna Reddy
  • Publication number: 20140119436
    Abstract: A system and method for decoding video encoded using scalable video coding. In one embodiment, a decoder for scalable video coding (SVC) includes an SVC access unit analyzer and decoding logic. The SVC access unit analyzer is configured to examine an SVC access unit prior to layered decoding of the access unit, to determine, based on the examination, what operations the access unit specifies for each layer of the decoding, and to determine, based on the determined operations to be performed for each layer of the decoding, what data to store for use by a subsequent layer of the decoding. The decoding logic is configured to decode the access unit via a plurality of decoding layers; and to store at each decoding layer, for use by a subsequent decoding layer, the data determined by the SVC access unit analyzer to be used by the subsequent decoding layer.
    Type: Application
    Filed: October 30, 2012
    Publication date: May 1, 2014
    Applicant: Texas Instruments Incorporated
    Inventors: Manu Mathew, Mullangi Venkata Ratna Reddy
  • Publication number: 20140071146
    Abstract: In certain embodiments, methods and systems for multimedia data processing are provided. In an embodiment, a method for processing multimedia data includes defining one or more pixel block regions in a first cache so as to cache a plurality of reference pixel blocks corresponding to reference data. A reference pixel block from among the plurality of reference pixel blocks is assigned to a pixel block region from among the one or more pixel block regions based on a predetermined criterion. The reference pixel block is associated with a tag based on the pixel block region so as to facilitate a search of the reference data in order to process a plurality of pixel blocks associated with a multimedia frame of the multimedia data.
    Type: Application
    Filed: September 7, 2012
    Publication date: March 13, 2014
    Applicant: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Hetul Sanghvi, Mullangi Venkata Ratna Reddy, Ajit Deepak Gupte, Arindam Basak