Patents by Inventor Munehiro Kozuma

Munehiro Kozuma has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10390075
    Abstract: A semiconductor device that is suitable for high-speed operation is provided. The semiconductor device includes a decoder. The decoder includes a first circuit. The first circuit is configured to operate in synchronization with a clock signal. The first circuit is configured to perform image processing. A circuit configuration of the first circuit can be changed. Clock gating is performed on the first circuit to prevent the clock signal from being input to the first circuit when the circuit configuration of the first circuit is being changed. A broadcasting system including the semiconductor device is also provided.
    Type: Grant
    Filed: October 10, 2017
    Date of Patent: August 20, 2019
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Munehiro Kozuma
  • Publication number: 20190229216
    Abstract: A novel semiconductor device is provided. The semiconductor device includes a programmable logic device including a programmable logic element, a control circuit, and a detection circuit. The programmable logic device includes a plurality of contexts. The control circuit is configured to control selection of the contexts. The detection circuit is configured to output a signal corresponding to the amount of radiation. The control circuit is configured to switch between a first mode and a second mode in accordance with the signal corresponding to the amount of radiation. The first mode is a mode in which the programmable logic device performs processing by a multi-context method, and the second mode is a mode in which the programmable logic device performs processing using a majority signal of signals output from the logic element multiplexed by the plurality of contexts.
    Type: Application
    Filed: April 4, 2019
    Publication date: July 25, 2019
    Inventors: Takashi NAKAGAWA, Yoshiyuki KUROKAWA, Munehiro KOZUMA
  • Patent number: 10263119
    Abstract: A novel semiconductor device is provided. The semiconductor device includes a programmable logic device including a programmable logic element, a control circuit, and a detection circuit. The programmable logic device includes a plurality of contexts. The control circuit is configured to control selection of the contexts. The detection circuit is configured to output a signal corresponding to the amount of radiation. The control circuit is configured to switch between a first mode and a second mode in accordance with the signal corresponding to the amount of radiation. The first mode is a mode in which the programmable logic device performs processing by a multi-context method, and the second mode is a mode in which the programmable logic device performs processing using a majority signal of signals output from the logic element multiplexed by the plurality of contexts.
    Type: Grant
    Filed: September 7, 2017
    Date of Patent: April 16, 2019
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Takashi Nakagawa, Yoshiyuki Kurokawa, Munehiro Kozuma
  • Publication number: 20190096206
    Abstract: An imaging device with low power consumption is provided. It includes a pixel capable of outputting difference data between two different frames, a circuit determining the significance of the difference data, a circuit controlling power supply, an A/D converter, and the like; obtains image data and then obtains difference data; and shuts off power supply to the A/D converter and the like in the case where it is determined that there is no difference, and continues or restarts the power supply to the A/D converter and the like when it is determined that there is a difference. Determining the significance of the difference data can be performed row by row in a pixel array or at nearly the same time in all the pixels included in the pixel array.
    Type: Application
    Filed: March 9, 2017
    Publication date: March 28, 2019
    Inventors: Takashi NAKAGAWA, Munehiro KOZUMA, Yoshiyuki KUROKAWA, Takayuki IKEDA
  • Patent number: 10230368
    Abstract: A programmable logic device includes a plurality of programmable logic elements (PLE) whose electrical connection is controlled by first configuration data. Each of The PLEs includes an LUT in which a relationship between a logic level of an input signal and a logic level of an output signal is determined by second configuration data, an FF to which the output signal of the LUT is input, and an MUX. The MUX includes at least two switches each including first and second transistor. A signal including third configuration data is input to a gate of the second transistor through the first transistor. The output signal of the LUT or an output signal of the FF is input to one of a source and a drain of the second transistor.
    Type: Grant
    Filed: June 24, 2016
    Date of Patent: March 12, 2019
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Munehiro Kozuma, Yoshiyuki Kurokawa, Takayuki Ikeda, Takeshi Aoki
  • Patent number: 10216999
    Abstract: A display system is provided. The display system includes an imaging device, a processing device, and a display device that includes first and second display elements. The imaging device has a function of supplying imaging data based on a captured image. The processing device has a function of receiving the imaging data, supplying first image data containing at least part of the captured image, performing determination processing for determining whether the captured image contains a predetermined object, performing image processing based on the result of the determination processing, and supplying second image data based on the image processing. The display device has a function of receiving the first and second image data. The first display element has a function of displaying an image based on the first image data, and the second display element has a function of displaying an image based on the second image data.
    Type: Grant
    Filed: September 13, 2017
    Date of Patent: February 26, 2019
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Munehiro Kozuma, Yoshiyuki Kurokawa
  • Patent number: 10177767
    Abstract: A semiconductor device includes a configuration memory that has functions of holding configuration data and generating a signal based on the configuration data, a context generator that has a function of generating a signal for controlling context switch, a clock generator that has a function of operating in a first mode or a second mode in accordance with the signal generated in the configuration memory, and a PLD. A clock signal is input to the context generator and the clock generator. The clock generator outputs the clock signal to the PLD in the first mode and stops outputting the clock signal to the PLD in the second mode.
    Type: Grant
    Filed: November 8, 2016
    Date of Patent: January 8, 2019
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Munehiro Kozuma
  • Patent number: 10141054
    Abstract: A semiconductor device that has a long data retention time during stop of supply of power supply voltage by reducing leakage current due to miniaturization of a semiconductor element. In a structure where charge corresponding to data is held with the use of low off-state current of a transistor containing an oxide semiconductor in its channel formation region, a transistor for reading data and a transistor for storing charge are separately provided, thereby decreasing leakage current flowing through a gate insulating film.
    Type: Grant
    Filed: August 9, 2016
    Date of Patent: November 27, 2018
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Takeshi Aoki, Munehiro Kozuma, Yoshiyuki Kurokawa
  • Patent number: 10027324
    Abstract: Skew of a multi-context PLD in context switch is reduced to achieve low power consumption. The frequency of a clock signal is switched in context switch operation in accordance with circuit operation to secure time required for context switch. By returning the frequency of the clock signal to the original frequency after executing the context switch, the PLD can maintain high-speed processing and perform the context switch accurately and safely. The time required for the context switch mainly depends on a hardware structure (circuit layout including a parasitic component). Thus, the reliability in the context switch can be improved when time that is equal to or longer than the longest time required for circuit change is secured.
    Type: Grant
    Filed: March 28, 2017
    Date of Patent: July 17, 2018
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Munehiro Kozuma, Yoshiyuki Kurokawa
  • Patent number: 10002656
    Abstract: A semiconductor device capable of generating a signal (e.g., a potential signal or a current signal) suitable for usage environment or a purpose. The semiconductor device includes a first memory circuit, a first circuit, and a second memory circuit. The first circuit converts a digital signal input from the first memory circuit into an analog signal. The first memory circuit includes an input node, an output node, a transistor, and a capacitor. The capacitor is electrically connected to the output node. The transistor can control a conduction state between the input node and the output node. An analog signal is input to the input node from the first circuit. The transistor includes an oxide semiconductor layer where a channel formation region is formed.
    Type: Grant
    Filed: April 26, 2016
    Date of Patent: June 19, 2018
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Takayuki Ikeda, Yoshiyuki Kurokawa, Munehiro Kozuma
  • Patent number: 9998119
    Abstract: Provided is a semiconductor device in which leakage current due to miniaturization of a semiconductor element is reduced and delay at a time of context switch of a multi-context PLD is reduced. A first transistor and a second transistor included in a charge retention circuit functioning as a configuration memory each include an oxide semiconductor in a semiconductor layer serving as a channel formation region. One of a source and a drain of the first transistor is electrically connected to a gate of the second transistor. One of a source and a drain of the second transistor is connected to a switch for context switch. In the switch used for context switch, electrostatic capacitance on an input side to which the one of the source and the drain of the second transistor is connected is larger than electrostatic capacitance on an output side.
    Type: Grant
    Filed: May 12, 2017
    Date of Patent: June 12, 2018
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shintaro Harada, Munehiro Kozuma, Yoshiyuki Kurokawa
  • Patent number: 9992442
    Abstract: A decoder with reduced power consumption is provided. The decoder includes a first circuit and a second circuit for holding data. The second circuit includes a first transistor, a second transistor, and a third transistor. The first transistor and the second transistor include an oxide semiconductor in a channel formation region. The third transistor includes silicon in a channel formation region. A gate of the second transistor is electrically connected to one of a source and a drain of the first transistor and a gate of the third transistor is electrically connected to one of a source and a drain of the second transistor. The decoder is configured to provide or stop power supply to the semiconductor device depending on a packet ID of a header portion of the data and to perform data storing or restoring of data between the first circuit and the second circuit.
    Type: Grant
    Filed: October 10, 2017
    Date of Patent: June 5, 2018
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Takeshi Aoki, Munehiro Kozuma, Yoshiyuki Kurokawa
  • Patent number: 9985069
    Abstract: An object is to achieve low-power consumption by reducing the off-state current of a transistor in a photosensor. A semiconductor device including a photosensor having a photodiode, a first transistor, and a second transistor; and a read control circuit including a read control transistor, in which the photodiode has a function of supplying charge based on incident light to a gate of the first transistor; the first transistor has a function of storing charge supplied to its gate and converting the charge stored into an output signal; the second transistor has a function of controlling reading of the output signal; the read control transistor functions as a resistor converting the output signal into a voltage signal; and semiconductor layers of the first transistor, the second transistor, and the read control transistor are formed using an oxide semiconductor.
    Type: Grant
    Filed: June 16, 2015
    Date of Patent: May 29, 2018
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yoshiyuki Kurokawa, Takayuki Ikeda, Hikaru Tamura, Munehiro Kozuma
  • Patent number: 9979386
    Abstract: A semiconductor device that suppresses operation delay due to stop and restart of the supply of a power supply potential is provided. A potential corresponding to data held while power supply potential is continuously supplied is backed up in a node connected to a capacitor while the supply of the power supply potential is stopped. Then, by utilizing change in resistance of a channel in a transistor whose gate is the node, the data is restored with restart of the supply of the power supply potential. Note that by supplying a high potential to the node before the data back up, high-speed and accurate data back up is possible.
    Type: Grant
    Filed: February 25, 2015
    Date of Patent: May 22, 2018
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Munehiro Kozuma, Takayuki Ikeda, Yoshiyuki Kurokawa, Takeshi Aoki, Takashi Nakagawa
  • Patent number: 9954531
    Abstract: A novel electronic device including a reconfigurable circuit is provided. In the electronic device including a reconfigurable circuit capable of executing multi-context operation, a context selection signal is locally generated. For example, a context selection signal is generated in the reconfigurable circuit with the use of context determination data contained in an output of another logic block, for example. The range of application of the context selection signal can be set as appropriate by a user. Thus, multi-context operation performed locally and partly enables efficient use of the circuit. Memory usage can be reduced and its efficiency can be improved compared to the case of using global multi-context driving. Other embodiments may be disclosed and claimed.
    Type: Grant
    Filed: February 23, 2016
    Date of Patent: April 24, 2018
    Assignee: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Takayuki Ikeda, Munehiro Kozuma, Takeshi Aoki
  • Publication number: 20180109835
    Abstract: A semiconductor device that is suitable for high-speed operation is provided. The semiconductor device includes a decoder. The decoder includes a first circuit. The first circuit is configured to operate in synchronization with a clock signal. The first circuit is configured to perform image processing. A circuit configuration of the first circuit can be changed. Clock gating is performed on the first circuit to prevent the clock signal from being input to the first circuit when the circuit configuration of the first circuit is being changed. A broadcasting system including the semiconductor device is also provided.
    Type: Application
    Filed: October 10, 2017
    Publication date: April 19, 2018
    Inventor: Munehiro KOZUMA
  • Publication number: 20180109752
    Abstract: A decoder with reduced power consumption is provided. The decoder includes a first circuit and a second circuit for holding data. The second circuit includes a first transistor, a second transistor, and a third transistor. The first transistor and the second transistor include an oxide semiconductor in a channel formation region. The third transistor includes silicon in a channel formation region. A gate of the second transistor is electrically connected to one of a source and a drain of the first transistor and a gate of the third transistor is electrically connected to one of a source and a drain of the second transistor. The decoder is configured to provide or stop power supply to the semiconductor device depending on a packet ID of a header portion of the data and to perform data storing or restoring of data between the first circuit and the second circuit.
    Type: Application
    Filed: October 10, 2017
    Publication date: April 19, 2018
    Inventors: Takeshi AOKI, Munehiro KOZUMA, Yoshiyuki KUROKAWA
  • Patent number: 9935617
    Abstract: A semiconductor device that can operate normally with lower power consumption is provided. The semiconductor device includes a pair of first circuits which each include a first transistor and a second transistor capable of controlling the supply of a first signal to a gate of the first transistor, and a second circuit which is capable of generating a second signal which is to be supplied to a gate of the second transistor and which has a larger amplitude than the first signal. One of a source and a drain of one of the first transistors included in the pair of first circuits is electrically connected to one of a source and a drain of the other of the first transistors. The first signals supplied to the gates of the first transistors in the pair of first circuits have potentials with different logic levels.
    Type: Grant
    Filed: December 18, 2014
    Date of Patent: April 3, 2018
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Takeshi Aoki, Munehiro Kozuma, Yoshiyuki Kurokawa
  • Publication number: 20180090111
    Abstract: A small semiconductor device is provided. The semiconductor device includes a register, switches, a memory circuit, a controller, and a display. An output terminal of the register is electrically connected to two or more of the switches. The switches are electrically connected to the memory circuit. The register has a function of retaining data corresponding to a parameter used when the controller operates. The switches have a function of selecting the memory circuit to which the data retained in the register is to be output. The memory circuit has a function of retaining the data output from the register. The controller has a function of reading the data retained in the memory circuit to control operation of the display.
    Type: Application
    Filed: September 20, 2017
    Publication date: March 29, 2018
    Inventor: Munehiro KOZUMA
  • Publication number: 20180090616
    Abstract: A novel semiconductor device is provided. The semiconductor device includes a programmable logic device including a programmable logic element, a control circuit, and a detection circuit. The programmable logic device includes a plurality of contexts. The control circuit is configured to control selection of the contexts. The detection circuit is configured to output a signal corresponding to the amount of radiation. The control circuit is configured to switch between a first mode and a second mode in accordance with the signal corresponding to the amount of radiation. The first mode is a mode in which the programmable logic device performs processing by a multi-context method, and the second mode is a mode in which the programmable logic device performs processing using a majority signal of signals output from the logic element multiplexed by the plurality of contexts.
    Type: Application
    Filed: September 7, 2017
    Publication date: March 29, 2018
    Inventors: Takashi NAKAGAWA, Yoshiyuki KUROKAWA, Munehiro KOZUMA