Patents by Inventor Munehiro Kozuma

Munehiro Kozuma has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12190079
    Abstract: A semiconductor device having a novel structure is provided. The semiconductor device includes a plurality of operation circuits that can switch different kinds of operation processing; a plurality of switch circuits that can switch a connection state between the operation circuits; and a controller. The operation circuit includes a first memory that stores data corresponding to a weight parameter used in the plurality of kinds of operation processing. The operation circuit executes a product-sum operation by switching weight data in accordance with a context. The switch circuit includes a second memory that stores data for switching a plurality of connection states in response to switching of a second context signal. The controller generates a second context signal on the basis of a first context signal. The amount of data stored in the second memory can be smaller than the amount of data stored in the first memory in the operation circuit.
    Type: Grant
    Filed: April 8, 2022
    Date of Patent: January 7, 2025
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Munehiro Kozuma, Takeshi Aoki, Seiichi Yoneda, Yoshiyuki Kurokawa
  • Publication number: 20250004546
    Abstract: An electronic device with a novel structure is provided. The electronic device includes a display apparatus, a gaze detection portion, and an arithmetic portion. The display apparatus includes a display portion divided into a plurality of sub-display portions and a functional circuit including a luminance conversion circuit. The gaze detection portion has a function of detecting the user's gaze. The arithmetic portion has a function of allocating the plurality of sub-display portions to a first section or a second section with the use of the detection result of the gaze detection portion. The functional circuit has a function of performing display on the sub-display portion included in the first section with a first driving frequency and performing display on the sub-display portion included in the second section with a second driving frequency lower than the first driving frequency.
    Type: Application
    Filed: November 25, 2022
    Publication date: January 2, 2025
    Inventors: Yuki OKAMOTO, Minato ITO, Munehiro KOZUMA, Tatsuya ONUKI
  • Publication number: 20240396105
    Abstract: A semiconductor device that inhibits deterioration of a secondary battery is provided. The semiconductor device includes a secondary battery module and a first circuit. The secondary battery module includes a secondary battery and a sensor. The first circuit includes a variable resistor. The sensor has a function of measuring a temperature of the secondary battery. The first circuit has a function of judging the charge voltage of the secondary battery and outputting a first result; a function of judging the temperature of the secondary battery measured by the sensor and outputting a second result; a function of determining the magnitude of the variable resistor on the basis of the first result and the second result; a function of discharging the charge voltage through the variable resistor; and a function of stopping discharge when the charge voltage reaches a specified voltage.
    Type: Application
    Filed: May 29, 2024
    Publication date: November 28, 2024
    Inventors: Ryota TAJIMA, Kei TAKAHASHI, Hiroki INOUE, Munehiro KOZUMA, Takahiro FUKUTOME
  • Publication number: 20240373709
    Abstract: An object is to provide a semiconductor device in which the number of control wirings is reduced. In a semiconductor device of one embodiment of the present invention, a first wiring (GLa) is connected to a first input terminal (54a) of a logic circuit (54) and a gate of a sixth transistor (M6); a second wiring (GLb) is connected to a second input terminal (54b) of the logic circuit (54), a gate of the third transistor (M3), a gate of the fourth transistor (M4), and a gate of the fifth transistor (M5); a gate of the first transistor (M1) is connected to an output terminal (54y) of the logic circuit (54); and the logic circuit (54) has a function of outputting a signal obtained by a logic operation of a signal input to the first input terminal (54a) and a signal input to the second input terminal (54b) to the output terminal (54y).
    Type: Application
    Filed: August 29, 2022
    Publication date: November 7, 2024
    Inventors: Yuki OKAMOTO, Tatsuya ONUKI, Hidetomo KOBAYASHI, Takanori MATSUZAKI, Munehiro KOZUMA
  • Patent number: 12136465
    Abstract: A semiconductor device with a small circuit area and low power consumption is provided. The semiconductor device includes first to fourth cells, a current mirror circuit, and first to fourth wirings, and the first to fourth cells each include a first transistor, a second transistor, and a capacitor. In each of the first to fourth cells, a first terminal of the first transistor is electrically connected to a first terminal of the capacitor and a gate of the second transistor. The first wiring is electrically connected to first terminals of the second transistors in the first cell and the second cell, the second wiring is electrically connected to first terminals of the second transistors in the third cell and the fourth cell, the third wiring is electrically connected to second terminals of the capacitors in the first cell and the third cell, and the fourth wiring is electrically connected to second terminals of the capacitors in the second cell and the fourth cell.
    Type: Grant
    Filed: May 6, 2021
    Date of Patent: November 5, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Takeshi Aoki, Yoshiyuki Kurokawa, Munehiro Kozuma, Takuro Kanemura, Tatsunori Inoue
  • Publication number: 20240364343
    Abstract: A semiconductor device using unipolar transistors, in which high and low levels are expressed using high and low power supply potentials, is provided. The semiconductor device includes four transistors, two capacitors, two wirings, two input terminals, and an output terminal. A source or a drain of the first transistor and a source or a drain of the fourth transistor are electrically connected to the first wiring. A gate of the fourth transistor is electrically connected to the first input terminal, and a gate of the second transistor is electrically connected to the second input terminal. A source or a drain of the second transistor and a source or a drain of the third transistor are electrically connected to the second wiring. The first transistor, the second transistor, and the two capacitors are electrically connected to the output terminal.
    Type: Application
    Filed: July 9, 2024
    Publication date: October 31, 2024
    Inventors: Hiroki INOUE, Munehiro KOZUMA, Takeshi AOKI, Shuji FUKAI, Fumika AKASAWA, Shintaro HARADA, Sho NAGAO
  • Patent number: 12120443
    Abstract: A semiconductor device that has low power consumption and is capable of performing a product-sum operation is provided. The semiconductor device includes first and second cells, a first circuit, and first to third wirings. Each of the first and second cells includes a capacitor, and a first terminal of each of the capacitors is electrically connected to the third wiring. Each of the first and second cells has a function of feeding a current based on a potential held at a second terminal of the capacitor, to a corresponding one of the first and second wirings. The first circuit is electrically connected to the first and second wirings and stores currents I1 and I2 flowing through the first and second wirings. When the potential of the third wiring changes and accordingly the amount of current of the first wiring changes from I1 to I3 and the amount of current of the second wiring changes from I2 to I4, the first circuit generates a current with an amount I1?I2?I3+I4.
    Type: Grant
    Filed: January 8, 2021
    Date of Patent: October 15, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yoshiyuki Kurokawa, Munehiro Kozuma, Takeshi Aoki, Takuro Kanemura
  • Publication number: 20240331641
    Abstract: To provide a display apparatus with a novel structure. A display portion including a first subpixel, a second subpixel, a first gate line supplied with a first selection signal to scan the first subpixel, and a second gate line supplied with a second selection signal to scan the second subpixel; and a driver control circuit including a gate line driver circuit, a switching portion that allots the first selection signal or the second selection signal output from the gate line driver circuit to the first gate line or the second gate line to be output, and a timing control circuit that controls the switching portion are included.
    Type: Application
    Filed: July 28, 2022
    Publication date: October 3, 2024
    Inventors: Munehiro KOZUMA, Tatsuya ONUKI, Hidetomo KOBAYASHI
  • Publication number: 20240331630
    Abstract: A novel electronic device is provided. The electronic device includes a display apparatus, an arithmetic portion, and a gaze detection portion, and the display apparatus includes a functional circuit and a display portion divided into a plurality of sub-display portions. The gaze detection portion has a function of detecting a user's gaze. The arithmetic portion has a function of dividing the plurality of sub-display portions between a first section and a second section using a detection result of the gaze detection portion. The first section includes a region overlapping with a user's gaze point. The functional circuit has a function of making a driving frequency of the second section lower than a driving frequency of the first section.
    Type: Application
    Filed: June 30, 2022
    Publication date: October 3, 2024
    Inventors: Munehiro KOZUMA, Tatsuya ONUKI, Hidetomo KOBAYASHI, Takanori MATSUZAKI, Yuki OKAMOTO, Minato ITO, Yusuke KOUMURA, Yoshiyuki KUROKAWA, Hisao IKEDA, Hiromichi GODO
  • Publication number: 20240321205
    Abstract: The invention of the application is the invention regarding a semiconductor device and a method for driving the semiconductor device. The semiconductor device includes first and second transistors, first to fifth switches, first to third capacitors, and a display element.
    Type: Application
    Filed: June 23, 2022
    Publication date: September 26, 2024
    Inventors: Yuki OKAMOTO, Tatsuya ONUKI, Hidetomo KOBAYASHI, Munehiro KOZUMA, Takanori MATSUZAKI, Susumu KAWASHIMA, Yutaka OKAZAKI
  • Patent number: 12080377
    Abstract: A semiconductor device with a novel structure is provided. The semiconductor device includes a plurality of arithmetic blocks each including an arithmetic circuit portion and a memory circuit portion. The arithmetic circuit portion and the memory circuit portion are electrically connected to each other. The arithmetic circuit portion and the memory circuit portion have an overlap region. The arithmetic circuit portion includes, for example, a Si transistor, and the memory circuit portion includes, for example, an OS transistor. The arithmetic circuit portion has a function of performing product-sum operation. The memory circuit portion has a function of retaining weight data. A first driver circuit has a function of writing the weight data to the memory circuit portion. The weight data is written to all the memory circuit portions included in the same column with the use of the first driver circuit.
    Type: Grant
    Filed: March 4, 2021
    Date of Patent: September 3, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yuki Okamoto, Tatsuya Onuki, Munehiro Kozuma, Takanori Matsuzaki
  • Patent number: 12062764
    Abstract: A semiconductor device that inhibits deterioration of a secondary battery is provided. The semiconductor device includes a secondary battery module and a first circuit. The secondary battery module includes a secondary battery and a sensor. The first circuit includes a variable resistor. The sensor has a function of measuring a temperature of the secondary battery. The first circuit has a function of judging the charge voltage of the secondary battery and outputting a first result; a function of judging the temperature of the secondary battery measured by the sensor and outputting a second result; a function of determining the magnitude of the variable resistor on the basis of the first result and the second result; a function of discharging the charge voltage through the variable resistor; and a function of stopping discharge when the charge voltage reaches a specified voltage.
    Type: Grant
    Filed: January 6, 2020
    Date of Patent: August 13, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Ryota Tajima, Kei Takahashi, Hiroki Inoue, Munehiro Kozuma, Takahiro Fukutome
  • Publication number: 20240265882
    Abstract: A semiconductor device having redundancy is provided. The semiconductor device includes a first driver circuit, a second driver circuit, a first selection circuit, a second selection circuit, and a switch circuit. An output terminal of the first driver circuit is electrically connected to an input terminal of the first selection circuit and a first terminal of the switch circuit, and an output terminal of the second driver circuit is electrically connected to an input terminal of the second selection circuit and a second terminal of the switch circuit.
    Type: Application
    Filed: May 20, 2022
    Publication date: August 8, 2024
    Inventors: Munehiro KOZUMA, Tatsuya ONUKI, Takanori MATSUZAKI, Minato ITO
  • Patent number: 12040007
    Abstract: A semiconductor device with reduced power consumption is provided. The semiconductor device includes a transmitter unit, a receiver unit, a bias-outputting unit, and a controller unit. The bias-outputting unit has a plurality of memory units. The plurality of memory units each retains information to determine transmission power. The receiver unit receives a request signal transmitted from a base station and supplies it to the controller unit. The controller unit selects one of the plurality of memory units according to the request signal. The memory unit has an OS transistor and retains information when power supply is stopped.
    Type: Grant
    Filed: April 13, 2020
    Date of Patent: July 16, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Munehiro Kozuma, Takayuki Ikeda, Kei Takahashi, Takeshi Aoki
  • Patent number: 12040795
    Abstract: A semiconductor device using unipolar transistors, in which high and low levels are expressed using high and low power supply potentials, is provided. The semiconductor device includes four transistors, two capacitors, two wirings, two input terminals, and an output terminal. A source or a drain of the first transistor and a source or a drain of the fourth transistor are electrically connected to the first wiring. A gate of the fourth transistor is electrically connected to the first input terminal, and a gate of the second transistor is electrically connected to the second input terminal. A source or a drain of the second transistor and a source or a drain of the third transistor are electrically connected to the second wiring. The first transistor, the second transistor, and the two capacitors are electrically connected to the output terminal.
    Type: Grant
    Filed: December 10, 2019
    Date of Patent: July 16, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hiroki Inoue, Munehiro Kozuma, Takeshi Aoki, Shuji Fukai, Fumika Akasawa, Shintaro Harada, Sho Nagao
  • Patent number: 12040653
    Abstract: The safety is ensured in such a manner that with an abnormality detection system of a secondary battery, abnormality of a secondary battery is detected, for example, a phenomenon that lowers the safety of the secondary battery is detected early, and a user is warned or the use of the secondary battery is stopped. The abnormality detection system of the secondary battery determines whether the temperature of the secondary battery is within a temperature range in which normal operation can be performed on the basis of temperature data obtained with a temperature sensor. In the case where the temperature of the secondary battery is high, a cooling device is driven by a control signal from the abnormality detection system of the secondary battery. The abnormality detection system of the secondary battery includes at least a memory means. The memory means has a function of holding an analog signal and includes a transistor using an oxide semiconductor for a semiconductor layer.
    Type: Grant
    Filed: October 15, 2019
    Date of Patent: July 16, 2024
    Assignee: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Munehiro Kozuma, Takayuki Ikeda, Takanori Matsuzaki, Kei Takahashi, Mayumi Mikami, Shunpei Yamazaki
  • Publication number: 20240196653
    Abstract: A novel display device is provided. The display device includes a first layer including a driver circuit, a second layer including a plurality of pixel circuits, and a third layer including a plurality of light-emitting elements; the second layer is provided over the first layer; the third layer is provided over the second layer; and a conductive layer is provided between the driver circuit and the plurality of pixel circuits. The driver circuit has a function of controlling operations of the plurality of pixel circuits. One of the plurality of pixel circuits is electrically connected to one of the plurality of light-emitting elements. The pixel circuit has a function of controlling emission luminance of the light-emitting element.
    Type: Application
    Filed: April 1, 2022
    Publication date: June 13, 2024
    Inventors: Yuki OKAMOTO, Susumu KAWASHIMA, Tatsuya ONUKI, Hidetomo KOBAYASHI, Munehiro KOZUMA, Takanori MATSUZAKI, Shunpei YAMAZAKI
  • Patent number: 12009688
    Abstract: The safety is ensured in such a manner that with an abnormality detection system of a secondary battery, abnormality of a secondary battery is detected, for example, a phenomenon that lowers the safety of the secondary battery is detected early, and a user is warned or the use of the secondary battery is stopped. The abnormality detection system of the secondary battery determines whether the temperature of the secondary battery is within a temperature range in which normal operation can be performed on the basis of temperature data obtained with a temperature sensor. In the case where the temperature of the secondary battery is high, a cooling device is driven by a control signal from the abnormality detection system of the secondary battery. The abnormality detection system of the secondary battery includes at least a memory means. The memory means has a function of holding an analog signal and includes a transistor using an oxide semiconductor for a semiconductor layer.
    Type: Grant
    Filed: October 15, 2019
    Date of Patent: June 11, 2024
    Assignee: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Munehiro Kozuma, Takayuki Ikeda, Takanori Matsuzaki, Kei Takahashi, Mayumi Mikami, Shunpei Yamazaki
  • Patent number: 12002535
    Abstract: A semiconductor device in which energy required for data transfer between an arithmetic device and a memory is reduced is provided. The semiconductor device includes a peripheral circuit and a memory cell array. The peripheral circuit has a function of a driver circuit and a control circuit for the memory cell array, and an arithmetic function. The peripheral circuit includes a sense amplifier circuit and an arithmetic circuit, and the memory cell array includes a memory cell and a bit line. The sense amplifier circuit has a function of determining whether the bit line is at a high level or a low level, and outputs the result to the arithmetic circuit. The arithmetic circuit has a function of performing a product-sum operation, the result of which is output from the semiconductor device.
    Type: Grant
    Filed: September 8, 2020
    Date of Patent: June 4, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Takeshi Aoki, Munehiro Kozuma, Masashi Fujita, Takahiko Ishizu
  • Publication number: 20240179987
    Abstract: A display apparatus with a driver circuit having redundancy is provided. The display apparatus includes a first layer and a second layer positioned above the first layer. The first layer includes a first driver circuit and a second driver circuit. The second layer includes a first pixel region and a second pixel region. The first pixel region includes a first pixel circuit and the second pixel region includes a second pixel circuit. The first pixel region includes a region overlapping with the first circuit and the second pixel region includes a region overlapping with the second circuit. The first pixel circuit is electrically connected to the first driver circuit through a first wiring, the second pixel circuit is electrically connected to the second driver circuit through a second wiring, and the first wiring is electrically connected to the second wiring through a switch.
    Type: Application
    Filed: March 18, 2022
    Publication date: May 30, 2024
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Minato ITO, Munehiro KOZUMA, Yuki OKAMOTO, Yusuke KOUMURA