Abstract: A video picture written in the bit map memory (4) is displayed in a predetermined area on the display screen (70) of the display device (7) within the computer main body (100). The masking memory (2) having a bit number equal to or less than the number of the pixels of the video picture to be inputted is provided separate from the bit map memory (4). When the pixel data of the video picture data has been inputted, the input pixel data is selectively written in the bit map memory (4) based on the contents of the masking memory (2). In displaying a compressed picture of the input video picture on the display screen, an oblique line generating algorithm is used.

Abstract: Compressed image data of a desired picture is read out from a memory having compressed image data of a sequential format stored therein and then subjected to an examination with respect to a plurality of frequency components of the read-out compressed image data. Part of the plurality of frequency components is deleted to obtain compressed image data of a quality lower than an original quality of the compressed image data. The obtained compressed image data of the lower quality is decoded and displayed on a display. The plurality of frequency components are deleted in a stepwise manner according to a traffic state of a transmission line through which the compressed image data is to be transmitted. For maintaining a picture frame rate to be constant, the plurality of frequency components may be deleted in a stepwise manner. For obtaining a desired decoding rate, the plurality of frequency components may be deleted in a stepwise manner.

Abstract: A method of converting and displaying scan lines for displaying interlace video signals permitting television or the like, represented by the NTSC standard, on a non-interlace display apparatus, including a reduction of images. Scan lines of a video signal are converted by a horizontal coordinate conversion circuit, a horizontal filtering circuit, a vertical coordinate conversion circuit, a vertical filtering circuit, and a one-scan line portion of line memory. The coordinates are converted on the basis of the coordinate system of the frame of the interlace video signal; and filtering in the vertical direction is performed in field units based on the coordinate conversion.