Abstract: A circuit and methods describing a complementary metal-oxide semiconductor (CMOS) rectifier for use in radio frequency (RF) energy harvesting with body biasing by the RF input to control the threshold voltage of each transistor. The CMOS rectifier includes an energy harvesting antenna, and multiple rectifier stages. The antenna receives electromagnetic radiation from the environment and generates a DC current. The oscillating input current is an RF+ positive current during a first half cycle and is an RF? negative current during a second half cycle. A first rectifier stage includes a first capacitor connected to the RF+ positive current, a second capacitor connected to the RF? negative current and a cross coupled CMOS circuit connected to the antenna.

Abstract: The present disclosure relates to a compact temperature sensor displaying a temperature-resistance relationship. The temperature sensor comprises cross-coupled CMOS technology exhibits negative resistance, resulting in resistance-sensitive temperature sensing and amplification. The temperature sensor can be tuned to operate across a wide range of temperatures via modulation of a biasing current. The present disclosure further relates to subthreshold operation of CMOS technology.

Abstract: The present disclosure relates to a compact temperature sensor displaying a temperature-resistance relationship. The temperature sensor comprises cross-coupled CMOS technology exhibits negative resistance, resulting in resistance-sensitive temperature sensing and amplification. The temperature sensor can be tuned to operate across a wide range of temperatures via modulation of a biasing current. The present disclosure further relates to subthreshold operation of CMOS technology.

Abstract: A tunable impedance multiplier with high multiplication factor is described. A single externally connected resistor is used and the multiplier is free of passive elements. The circuit can realize a positive or a negative impedance multiplier. Applications of the design to low and high pass filters are also presented. The simulation and experimental results show that the new design enjoys a multiplication factor above 400 at 2 Hz-to 7 MHz.

Abstract: A tunable impedance multiplier with high multiplication factor is described. A single externally connected resistor is used and the multiplier is free of passive elements. The circuit can realize a positive or a negative impedance multiplier. Applications of the design to low and high pass filters are also presented. The simulation and experimental results show that the new design enjoys a multiplication factor above 400 at 2 Hz-to 7 MHz.

Abstract: A tunable impedance multiplier with high multiplication factor is described. A single externally connected resistor is used and the multiplier is free of passive elements. The circuit can realize a positive or a negative impedance multiplier. Applications of the design to low and high pass filters are also presented. The simulation and experimental results show that the new design enjoys a multiplication factor above 400 at 2 Hz-to 7 MHz.

Abstract: A tunable impedance multiplier with high multiplication factor is described. A single externally connected resistor is used and the multiplier is free of passive elements. The circuit can realize a positive or a negative impedance multiplier. Applications of the design to low and high pass filters are also presented. The simulation and experimental results show that the new design enjoys a multiplication factor above 400 at 2 Hz-to 7 MHz.

Abstract: The present disclosure relates to a compact temperature sensor displaying a temperature-resistance relationship. The temperature sensor comprises cross-coupled CMOS technology exhibits negative resistance, resulting in resistance-sensitive temperature sensing and amplification. The temperature sensor can be tuned to operate across a wide range of temperatures via modulation of a biasing current. The present disclosure further relates to subthreshold operation of CMOS technology.

Abstract: The capacitor-less LED drive is an LED drive circuit having a design based on the utilization of the internal capacitance of the LED to replace the smoothing capacitor in a conventional buck converter in a power supply. LED lighting systems usually have many LEDs for better illumination that can reach multiple tens of LEDs. Such a configuration can be utilized to enlarge the total internal capacitance, and hence minimize the output ripple. Also, the switching frequency of the buck converter is selected such that minimum ripple appears at the output. The functionality of the present design is confirmed experimentally, and the efficiency of the drive is 85% at full load.

Abstract: The capacitor-less LED drive is an LED drive circuit having a design based on the utilization of the internal capacitance of the LED to replace the smoothing capacitor in a conventional buck converter in a power supply. LED lighting systems usually have many LEDs for better illumination that can reach multiple tens of LEDs. Such a configuration can be utilized to enlarge the total internal capacitance, and hence minimize the output ripple. Also, the switching frequency of the buck converter is selected such that minimum ripple appears at the output. The functionality of the present design is confirmed experimentally, and the efficiency of the drive is 85% at full load.

Abstract: The compact C-multiplier includes four MOSFETs operating in the subthreshold region using the translinear principle. The multiplier is controllable to meet designer requirements. A Tanner Tspice simulator is used to confirm the functionality of the design in 0.13 pm CMOS Technology. The circuit operates from a ±0.75 supply voltage. Simulation results indicate that the multiplication factor is large compared to existing designs.

Abstract: The CMOS current-mode squaring circuit includes a translinear loop. A rectifier is used to produce the absolute value of the input current. Carrier mobility reduction is taken into consideration to compute the drain current for short channel MOSFETs. Careful selection of CMOS aspect ratios provides error compensation due to carrier mobility reduction.

Abstract: The CMOS current-mode squaring circuit includes a translinear loop. A rectifier is used to produce the absolute value of the input current. Carrier mobility reduction is taken into consideration to compute the drain current for short channel MOSFETs. Careful selection of CMOS aspect ratios provides error compensation due to carrier mobility reduction.

Abstract: The compact CMOS current-mode analog multifunction circuit is based on an implementation using MOSFETs operating in a sub-threshold region and forming two overlapping translinear loops capable of performing multiplication, division, controllable gain current amplifier, current mode differential amplifier, and differential-input single-output current amplifier.

Abstract: The compact CMOS current-mode analog multifunction circuit is based on an implementation using MOSFETs operating in a sub-threshold region and forming two overlapping translinear loops capable of performing multiplication, division, controllable gain current amplifier, current mode differential amplifier, and differential-input single-output current amplifier.

Abstract: A CMOS logarithmic current generator includes current mode circuitry having a design principle based on a Taylor's series expansion that approximates an exponential function. A MOSFET circuit provides a function generator core cell having a biasing current Ib. The FETs of the circuit are matched and are biased in the weak inversion region. Additional transistors are used to convert a pair of input currents to a pair of voltages to provide an output current based upon a current mode logarithmic function. The biasing current Ib can be varied to provide a variable gain in the circuit.

Abstract: The high dynamic range exponential current generator produces an output waveform (current/voltage) which is an exponential function of the input waveform (current/voltage). The exponential characteristics are obtained in BiCMOS or Bipolar technologies using the intrinsic characteristics (IC/VBE) of the bipolar transistors. The high dynamic range exponential current generator is biased in weak inversion region. MOSFETs biased in weak inversion region are used not to utilize the inherent exponential (IDS/VGS) relationship but to simply implement x2 and x4 terms using translinear loops. The term x4 is realized by two cascaded squaring units. The approximation equation used is ? x ? 0.025 + ( 1 + 0.125 ? x ) 4 0.025 + ( 1 - 0.125 ? x ) 4 .

Abstract: The high dynamic range exponential current generator produces an output waveform (current/voltage) which is an exponential function of the input waveform (current/voltage). The exponential characteristics are obtained in BiCMOS or Bipolar technologies using the intrinsic characteristics (IC/VBE) of the bipolar transistors. The high dynamic range exponential current generator is biased in weak inversion region. MOSFETs biased in weak inversion region are used not to utilize the inherent exponential (IDS/VGS) relationship but to simply implement x2 and x4 terms using translinear loops. The term x4 is realized by two cascaded squaring units. The approximation equation used is ? x ? 0.025 + ( 1 + 0.125 ? x ) 4 0.025 + ( 1 - 0.125 ? x ) 4 .

Abstract: A CMOS logarithmic current generator includes current mode circuitry having a design principle based on a Taylor's series expansion that approximates an exponential function. A MOSFET circuit provides a function generator core cell having a biasing current Ib. The FETs of the circuit are matched and are biased in the weak inversion region. Additional transistors are used to convert a pair of input currents to a pair of voltages to provide an output current based upon a current mode logarithmic function. The biasing current Ib can be varied to provide a variable gain in the circuit.

Abstract: A CMOS current-mode square-root circuit includes a square-root circuit configured to compensate for the errors due to the carrier mobility reduction by employing a plurality of MOSFETs in Translinear Loop (MTL). The plurality of MOSFETs are configured to operate in the strong inversion region. The CMOS current-mode square-root circuit is configured to receive an input current and a biasing current, and is further configured to produce an output current based on the input current and the biasing current. The output current based on the input current and the biasing current is described by a first square-root relation and a second square-root relation.