Patents by Inventor Myron J. Schneider

Myron J. Schneider has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7362106
    Abstract: A method and apparatus for detecting open defects on non-probed node under test of an electrical device using capacitive lead frame technology is presented. In accordance with the method of the invention, a probed node neighboring the non-probed node under test is stimulated with a known source signal. A sensor of a capacitive sensing probe is capacitively coupled to at least the probed node and non-probed node under test of the electrical device, and a measuring device coupled to the capacitive sensing probe measures a capacitively coupled signal present between the sensor of the probe and at least the probed and non-probed node of the electrical device. Based on the value of the capacitively sensed signal, a known expected “defect-free” capacitively sensed signal measurement and/or a known expected “open” capacitively sensed signal measurement, a determination is made of whether an open defect exists on the non-probed node under test of the electrical device.
    Type: Grant
    Filed: June 29, 2005
    Date of Patent: April 22, 2008
    Assignee: Agilent Technologies, Inc.
    Inventors: Kenneth P. Parker, Myron J. Schneider
  • Patent number: 7327148
    Abstract: Capacitive leadframe testing techniques are improved through knowledge of characteristics of semiconductor junctions specific to nodes of device under test (DUT) that are connected to nodes under test of the DUT.
    Type: Grant
    Filed: June 29, 2005
    Date of Patent: February 5, 2008
    Assignee: Agilent Technologies, Inc.
    Inventors: Myron J. Schneider, Eddie Williamson
  • Patent number: 7307427
    Abstract: A method and apparatus is presented for gaining socket testability through the use of a capacitive interposer engineered to create capacitive coupling between signal nodes of a circuit assembly that the tester has access to and nodes of the socket that would not otherwise have any coupling to a testable signal node of the socket. Generally, coupling capacitance is engineered into the interposer by trace and via routing between the signal node of the socket and a location in close proximity to the inaccessible socket node such that their proximity to each other couples them together.
    Type: Grant
    Filed: July 23, 2005
    Date of Patent: December 11, 2007
    Assignee: Agilent Technologies, Inc.
    Inventors: Chris R. Jacobsen, Kenneth P. Parker, Myron J. Schneider, Tak Yee Kwan
  • Patent number: 7295031
    Abstract: Non-contact connectivity testing of joints connecting circuit junctions are improved through knowledge of characteristics of semiconductor junctions connected to component nodes of components of a device under test (DUT) to allow detection of high-impedance joints.
    Type: Grant
    Filed: July 12, 2006
    Date of Patent: November 13, 2007
    Assignee: Agilent Technologies, Inc.
    Inventors: Kenneth P. Parker, Chris R. Jacobsen, Dayton Norrgard, Myron J. Schneider
  • Patent number: 7242198
    Abstract: Capacitive leadframe testing techniques are improved through knowledge of characteristics of semiconductor junctions specific to nodes of device under test (DUT) that are connected to nodes under test of the DUT.
    Type: Grant
    Filed: June 29, 2006
    Date of Patent: July 10, 2007
    Assignee: Agilent Technologies, Inc.
    Inventors: Myron J. Schneider, Eddie Williamson
  • Patent number: 7208957
    Abstract: A method for testing for a defect condition on a node-under-implicit-test of an electrical device is presented. The technique according to the invention includes stimulating a first node of the electrical device that is capacitively coupled to the node-under-implicit-test with a known source signal, and capacitively sensing a signal on a second node of the electrical device that is capacitively coupled to the node-under-implicit-test. A defect condition such as a short or open can be determined from the capacitively sensed signal.
    Type: Grant
    Filed: March 1, 2005
    Date of Patent: April 24, 2007
    Assignee: Agilent Technologies, Inc.
    Inventors: Myron J. Schneider, Kenneth P. Parker, Chris R. Jacobsen
  • Patent number: 7123022
    Abstract: A device for enabling testing of electrical paths through a circuit assembly is presented. The device may include a non-contact connector test probe for a testing a connector of the circuit assembly. A method for testing continuity of electrical paths through a circuit assembly is presented. In the method, one or more nodes of the circuit assembly are stimulated, connector pins of a connector on the circuit assembly are capacitively coupled to a non-contact connector test probe, and an electrical characteristic is measured by a tester coupled to the non-contact connector test probe to determine continuity of electrical paths through the circuit assembly.
    Type: Grant
    Filed: April 28, 2004
    Date of Patent: October 17, 2006
    Assignee: Agilent Technologies, Inc.
    Inventors: Kenneth P. Parker, Chris R. Jacobsen, Myron J. Schneider