Abstract: A driving apparatus of a plasma display panel (PDP) operates stably and reliably. The driving apparatus to drive the PDP includes a pulse application unit which applies a pulse to the PDP; and an energy recovery unit which comprises an inductor which generates LC resonance with a panel capacitor element of the PDP, an energy recovery determiner which determines the accumulation of energy during the LC resonance or emission of the accumulated energy to the PDP, and an energy storage unit which stores the accumulated energy, wherein the energy recovery determiner comprises a first falling switching device which determines the accumulation of the energy; and a second falling switching device which is connected between the first falling switching device and the energy storage unit, in order for the second falling switching device to form a current path toward the energy storage unit.

Abstract: A plasma display panel and driving method thereof. Waveforms for performing a reset operation, an address operation, and a sustain operation are applied to a scan electrode while a sustain electrode is biased with a predetermined voltage, and it is controlled such that the absolute value of a positive voltage of sustain voltage pulses applied to the scan electrode in the sustain period may be greater than the absolute value of a negative voltage thereof. Further, an address electrode is floated when a waveform having a sustain discharge function is applied to the scan electrode, and the voltage at the address electrode is controlled to be increased and decreased according to the voltage at the scan electrode.

Abstract: A PDP address data processor, a method thereof, and a recording medium for storing a program used to perform the method. The address data processor generates subfield data corresponding to RGB input video data, divides them into two sets of subfield data, and stores them in a frame memory using rising and falling edges of a reference clock signal of a frame memory. The address data processor reads and arranges the stored subfield data using the rising and falling edges to generate address data for representing gray on the PDP. The address data processor uses an RGB mixing algorithm for selecting two different video data from among the RGB input video data to select video data, and generates the subfield data corresponding to the selected video data.

Abstract: Disclosed is a driver for a PDP including discharge cells with a plurality of electrodes, which may include the following: a first voltage source having a first voltage level; a first active element for intercepting a current flow in the direction of the first voltage source; a first switch coupled between the first active element and an electrode; a capacitor for storing a second voltage; and a second switch for supplying the second voltage stored in the capacitor to the electrode. The first active element and the first switch may each be transistors, and they may be coupled together, back-to-back.

Abstract: A PDP address data processor, a method thereof, and a recording medium for storing a program used to perform the method. The address data processor generates subfield data corresponding to RGB input video data, divides them into two sets of subfield data, and stores them in a frame memory using rising and falling edges of a reference clock signal of a frame memory. The address data processor reads and arranges the stored subfield data using the rising and falling edges to generate address data for representing gray on the PDP. The address data processor uses an RGB mixing algorithm for selecting two different video data from among the RGB input video data to select video data, and generates the subfield data corresponding to the selected video data.

Abstract: A plasma display apparatus is capable of enhancing the heat dissipating ability of a plasma display panel, and of reducing the total weight of the plasma display apparatus. The plasma display apparatus comprises a plasma display panel, a frame to which the plasma display panel is attached and by which the plasma display panel is supported, and a boss plate fixed to a rear surface of the frame and fitted with driving circuit boards. The frame is formed in the shape of a rectangular frame which contacts edges of the plasma display panel. A vertical member is vertically disposed in the rectangular frame. The vertical member has wall-mounted bosses which support the total weight of the plasma display apparatus. Other features include a thermally conductive member formed on the rear surface of the frame, and formation of an air passage between the thermally conductive member and the driving circuit boards.

Abstract: In a plasma display device, a first transistor is coupled between an electrode and a power source supplying a VscL voltage, and a second transistor gradually changing a voltage of the electrode is coupled between the electrode and the power source. First and second resistors are coupled in series between the electrode and the second transistor. A node of the first and second resistors is coupled to a control terminal of a regulator, an anode terminal of the regulator is coupled to the electrode, and a cathode terminal of the regulator is coupled to the second transistor. The regulator has a reference voltage, and connects the anode terminal and the cathode terminal when the second transistor is turned on and a node voltage of a node between the first and second resistors is greater than the reference voltage and disconnects the anode terminal and the cathode terminal when the node voltage is less than the reference voltage.

Abstract: A plasma display apparatus includes a plasma display panel and a chassis base extending substantially parallel to the plasma display panel. The chassis base has a driving circuit mounted thereon in opposition to the plasma display panel. A driver IC faces the chassis base, and is packaged in a film-shaped assembly. A thermal conduction medium is disposed and solidified between the driver IC and the chassis base so as to dissipate the heat generated at the driver IC.

Abstract: A method of driving a plasma display apparatus may include supplying a first voltage to the X electrodes during a first reset period of the reset period, supplying, using energy stored in the energy recovery circuit, a ramp waveform voltage that rises from the first voltage signal to a second voltage to the X electrodes during a second reset period of the reset period, biasing the X electrodes with the second voltage during at least a first sub-period of a third reset period of the reset period, supplying a ramp pulse waveform voltage that rises from a third voltage to a fourth voltage to the Y electrodes during a second portion of the first reset period, and supplying a ramp pulse waveform voltage that falls from the third voltage to a fifth voltage to the Y electrodes during the third reset period.

Abstract: In an address driving circuit including a power recovery circuit, the voltage of the address electrode is reduced through a transistor, and the voltage of the address electrode increases through the current formed by the body diode of the transistor. In addition, the ground voltage is not applied to the address electrode in the power recovery circuit after the voltage of the address electrode is reduced. As a result, the resonance for raising the voltage of the address electrode and the resonance for reducing the voltage of the address electrode can be performed through the same transistor, and the transistor for applying the ground voltage to the address electrode can be eliminated.

Abstract: A PDP address driver circuit includes: an inductor coupled to a conductive pattern. A first current applier applyies a current of a first direction to the inductor and the conductive pattern while sustaining a panel capacitor at an address voltage. A discharger generates a resonance between the inductor and the panel capacitor to discharge the panel capacitor to 0V, while the current of the first direction flows to the inductor and the conductive pattern. A second current applier applyies a current of a second direction to the inductor and the conductive pattern while sustaining the panel capacitor at 0V. A charger generates a resonance between the inductor and the panel capacitor to charge the panel capacitor to the address voltage, while the current of the second direction flows to the inductor and the conductive pattern.

Abstract: A method of driving a Plasma Display Panel (PDP) includes: arranging discharge cells in the PDP to each include sustain electrode lines and address electrode lines crossing each other; defining a display period in which each frame includes a plurality of subfields, each subfield having a corresponding gray scale weight for displaying a time division gray scale and a reset period, an address period, and a sustain-discharge period; biasing the sustain electrode lines to a first level; sequentially supplying a scan pulse of a second level to the sustain electrode lines and a data pulse synchronized with the scan pulse to the address electrode lines corresponding to selected discharge cells in the address period; and supplying a sustain pulse of a third level voltage and a sustain pulse of a fourth level voltage to the sustain electrode lines in the sustain-discharge period; the second level voltage and the fourth level voltage are supplied by the same power source.

Abstract: A driving apparatus of a plasma display panel (PDP) operates stably and reliably. The driving apparatus to drive the PDP includes a pulse application unit which applies a pulse to the PDP; and an energy recovery unit which comprises an inductor which generates LC resonance with a panel capacitor element of the PDP, an energy recovery determiner which determines the accumulation of energy during the LC resonance or emission of the accumulated energy to the PDP, and an energy storage unit which stores the accumulated energy, wherein the energy recovery determiner comprises a first falling switching device which determines the accumulation of the energy; and a second falling switching device which is connected between the first falling switching device and the energy storage unit, in order for the second falling switching device to form a current path toward the energy storage unit.

Abstract: In a plasma display device, a plurality of row electrodes are divided into first and second row electrode groups, and the respective first and second row electrode groups are divided into a plurality of sub-groups. In respective subfields of one field, an operation of an address period is performed for the respective sub-groups of the first and second row electrode groups, and an operation of a sustain period is performed between the address periods of the respective sub-groups. In addition, the operation of the address period is performed for the respective sub-groups of the second row electrode group while the operation of the sustain period is performed for the respective sub-groups of the first row electrode group, and the operation of the sustain period is performed for the respective sub-groups of the first row electrode group while the operation of the address period is performed for the respective sub-groups of the second row electrode group.

Abstract: A plasma display device is driven by dividing a plurality of row electrodes into first and second row groups. A first row group of electrodes are dividedinto a plurality of first sub-groups, and a second row group of row electrodes are divided into a plurality of second sub-groups. During a first subfield of a first group of subfields, non-light emitting cells are selected from light emitting cells of a first sub-groups and light emitting cells of a second sub-groups are sustain-discharged during a first period. In addition, during the first subfield, the non-light emitting cells are selected from the second sub-group, and the light emitting cells of a first sub-group are sustain-discharged during a second period. With such an operation, a length of one subfield can be reduced because another row group is sustain-discharged while one row group is being selected as the non-emitting cells.

Abstract: In an address driving circuit including a power recovery circuit, an energy charged in an external capacitor is established to be greater than an energy discharged from the external capacitor. As a result, a voltage of the external capacitor is increased to an address voltage to automatically stop a power recovery operation in the case of displaying a full white pattern. Further, to perform the power recovery operation in the cases of the dot on/off pattern and the line on/off pattern, the voltage of the external capacitor reaches an equilibrium state between the half the address voltage and the address voltage.

Abstract: In a method of resetting a plasma display panel including a front substrate and a rear substrate separated from each other and facing each other, in which a first electrode line and second display electrode line are formed parallel to each other on the front substrate and address electrode lines are formed perpendicular to the first electrode line and the second display electrode lines, a voltage applied to the first display electrode lines is gradually increased up to a first voltage. Then, a voltage applied to the second display electrode lines is gradually increased up to a second voltage higher than the first voltage while the voltage applied to the first display electrode lines is gradually increased up to a third voltage lower than the first voltage. The voltage applied to the first display electrode lines is maintained at the first voltage while the voltage applied to the second display electrode lines is gradually decreased down to a fourth voltage lower than the third voltage.

Abstract: An image of each field displayed on a plasma display panel corresponding to input image signals is divided into sub-fields of different weights, the sub-fields being divided into two continuous sub-field groups having a different weighting value, and in which the weighting values of the sub-fields combine to display grays. The method includes generating original grays; determining a diffusion filter value; generating final grays by applying the diffusion filter value to the original grays; generating gray data corresponding to the final grays, the gray data being distributed over the two sub-field groups; and displaying an image on the PDP according to the gray data. The disclosed method and system reduce flicker and contour noise and other display problems associated with the display of 50 Hz Phase Alternating by Line image signals.

Abstract: A plasma display panel and driving method thereof. Waveforms for performing a reset operation, an address operation, and a sustain operation are applied to a scan electrode while a sustain electrode is biased with a predetermined voltage, and it is controlled such that the absolute value of a positive voltage of sustain voltage pulses applied to the scan electrode in the sustain period may be greater than the absolute value of a negative voltage thereof. Further, an address electrode is floated when a waveform having a sustain discharge function is applied to the scan electrode, and the voltage at the address electrode is controlled to be increased and decreased according to the voltage at the scan electrode.

Abstract: A plasma display apparatus is capable of enhancing the heat dissipating ability of a plasma display panel, and of reducing the total weight of the plasma display apparatus. The plasma display apparatus comprises a plasma display panel, a frame to which the plasma display panel is attached and by which the plasma display panel is supported, and a boss plate fixed to a rear surface of the frame and fitted with driving circuit boards. The frame is formed in the shape of a rectangular frame which contacts edges of the plasma display panel. A vertical member is vertically disposed in the rectangular frame. The vertical member has wall-mounted bosses which support the total weight of the plasma display apparatus. Other features include a thermally conductive member formed on the rear surface of the frame, and formation of an air passage between the thermally conductive member and the driving circuit boards.