Abstract: A nitride semiconductor device includes: a substrate; a first nitride semiconductor layer; a second nitride semiconductor layer; a first opening penetrating through the second nitride semiconductor layer to the first nitride semiconductor layer; a second opening penetrating through the second nitride semiconductor layer to the first nitride semiconductor layer; an electron transport layer and an electron supply layer provided along an inner face of each of the first opening and the second opening and above the second nitride semiconductor layer; a gate electrode; an anode electrode; a third opening penetrating through the electron supply layer and the electron transport layer to the second nitride semiconductor layer; a source electrode in the third opening; a drain electrode; and a cathode electrode. The anode electrode and the source electrode are electrically connected, and the cathode electrode and the drain electrode are electrically connected.

Abstract: A nitride semiconductor device includes: a substrate; a nitride semiconductor layer above the substrate; a high-resistance layer above the nitride semiconductor layer; a p-type nitride semiconductor layer above the high-resistance layer; a first opening penetrating through the p-type nitride semiconductor layer and the high-resistance layer to the nitride semiconductor layer; an electron transport layer and an electron supply layer covering an upper portion of the p-type nitride semiconductor layer and the first opening; a gate electrode above the electron supply layer; a source electrode in contact with the electron supply layer; a second opening penetrating through the electron supply layer and the electron transport layer to the p-type nitride semiconductor layer; a potential fixing electrode in contact with the p-type nitride semiconductor layer at a bottom part of the second opening; and a drain electrode.

Abstract: A semiconductor device including: a metal-insulator-semiconductor (MIS) structure that includes a nitride semiconductor layer, a gate insulator film, and a gate electrode stacked in stated order; and a source electrode and a drain electrode that are disposed to sandwich the gate electrode in a plan view and contact the nitride semiconductor layer. The gate insulator film includes a threshold value control layer that includes an oxynitride film.

Abstract: A semiconductor device including: a metal-insulator-semiconductor (MIS) structure that includes a nitride semiconductor layer, a gate insulator film, and a gate electrode stacked in stated order; and a source electrode and a drain electrode that are disposed to sandwich the gate electrode in a plan view and contact the nitride semiconductor layer. The gate insulator film includes a threshold value control layer that includes an oxynitride film.

Abstract: An object is to achieve an increase in gain by reducing a current collapse, and reducing Cgd and Rg. A semiconductor device according to the present invention includes a substrate; a first semiconductor layer disposed on the substrate and made of a Group III nitride semiconductor; a second semiconductor layer disposed on the first semiconductor layer and made of a Group III nitride semiconductor; a gate electrode, a source electrode, and a drain electrode disposed on the second semiconductor layer; a first field plate electrode disposed on the second semiconductor layer; and a second field plate electrode disposed on the first field plate electrode, in which the first field plate electrode and the second field plate electrode are disposed between the gate electrode and the drain electrode.

Abstract: A semiconductor device includes a semiconductor layer made of nitride semiconductor, an ohmic electrode and a schottky electrode both formed on the semiconductor layer, a first insulating film containing a small amount of hydrogen per unit volume for covering the semiconductor device on a top face defined between the ohmic electrode and the schottky electrode and also covering the schottky electrode, and a second insulating film formed on the first insulating film and containing a greater amount of hydrogen per unit volume than the first insulating film.

Abstract: An object is to achieve an increase in gain by reducing a current collapse, and reducing Cgd and Rg. A semiconductor device according to the present invention includes a substrate; a first semiconductor layer disposed on the substrate and made of a Group III nitride semiconductor; a second semiconductor layer disposed on the first semiconductor layer and made of a Group III nitride semiconductor; a gate electrode, a source electrode, and a drain electrode disposed on the second semiconductor layer; a first field plate electrode disposed on the second semiconductor layer; and a second field plate electrode disposed on the first field plate electrode, in which the first field plate electrode and the second field plate electrode are disposed between the gate electrode and the drain electrode.

Abstract: A field effect transistor includes a nitride semiconductor multilayer structure formed on a substrate, a source electrode, a drain electrode, a gate electrode, an insulating film formed on the nitride semiconductor multilayer structure, and a field plate formed on and in contact with the insulating film, and having an end located between the gate electrode and the drain electrode. The insulating film includes a first film, and a second film having a dielectric breakdown voltage lower than that of the first film, and a thin film portion formed between the gate electrode and the drain electrode is formed in the insulating film. The field plate covers the thin film portion, and is connected to the source electrode in an opening.

Abstract: A nitride semiconductor device includes a first nitride semiconductor layer; a second nitride semiconductor layer formed on the first nitride semiconductor layer, and having a wider bad gap than the first nitride semiconductor layer; a source electrode, a drain electrode, and a gate electrode, which are formed on the second nitride semiconductor layer; a high resistive layer formed lower than the first nitride semiconductor layer; a conductive layer formed under and in contact with the high resistive layer; a lower insulating layer formed under the conductive layer; and a bias terminal electrically connected to the conductive layer.

Abstract: A film bulk acoustic resonator includes a substrate; an acoustic reflector portion formed on the substrate; and an acoustic resonator portion including a lower electrode, a piezoelectric film, and an upper electrode which are sequentially stacked on the acoustic reflector portion, An uppermost layer of the acoustic reflector portion which is in contact with the acoustic resonator portion has a root-mean-square roughness of approximately 1 nm or less.

Abstract: A first supporting section provided between a substrate section and a second supporting section. The first supporting section is structured by, e.g., a film formed from a material having a higher acoustic impedance than a piezoelectric body and the substrate section, or a film formed from a material having a smaller Q value than the piezoelectric body and substrate section. By inserting the first supporting section, most vibration from the second supporting section toward the substrate section is reflected, and also a vibration having been transmitted to the substrate section from the second supporting section is prevented from reflecting at the bottom of the substrate section 40 and then returning in a direction of the vibration section.

Abstract: A bulk acoustic resonator has an acoustic reflector portion formed on a substrate and including one or more low acoustic impedance layers and one or more high acoustic impedance layers having a higher acoustic impedance than the low acoustic impedance layer which are disposed in stacked relation and an acoustic resonator portion formed on the acoustic reflector portion and having a piezoelectric film. At least one of the low acoustic impedance layers is made of silicon.

Abstract: A filter module includes a substrate and a plurality of resonators formed on the substrate and utilizing longitudinal vibration along the thickness of a piezoelectric layer. A plurality of external connection terminals are formed above or below the piezoelectric layer so as to be electrically connected to external circuits and also electrically connected to some of the plurality of resonators through a plurality of interconnects formed to the side of the piezoelectric layer to which the external connection terminals are formed.

Abstract: A first supporting section 30 is provided between a substrate section 40 and a second supporting section 20. The first supporting section 30 is structured by, e.g., a film formed from a material having a higher acoustic impedance than a piezoelectric body 11 and the substrate section 40, or a film formed from a material having a smaller Q value than the piezoelectric body 11 and substrate section 40. By inserting the first supporting section 30, most vibration from the second supporting section 20 toward the substrate section 40 is reflected (arrow a), and also a vibration having been transmitted to the substrate section 40 from the second supporting section 20 is prevented from reflecting at the bottom of the substrate section 40 and then returning in a direction of the vibration section 10 (arrow b).

Abstract: A method for manufacturing a resonator of the present invention includes the steps of (a) forming a resonator film including a piezoelectric film made of piezoelectric material and (b) preparing a resonator substrate for supporting the resonator film. The method further comprises the step of (c) bonding the resonator film formed in the step (a) and the resonator substrate prepared in the step (b).

Abstract: An acoustic resonator includes: a substrate; a resonator film which is supported above the main surface of the substrate and includes a piezoelectric film and a pair of a top electrode and a bottom electrode which are formed on part of the top surface and part of the bottom surface of the piezoelectric film, respectively, to face each other via the piezoelectric film; and a support which is formed on the main surface of the substrate to support the resonator film from below. A resonance cavity is provided in part of a region between the substrate and the resonator film below at least a portion of part of the resonator film where the top electrode and the bottom electrode coincide with each other and an isolation cavity is provided in other part of said region where the support and the resonance cavity do not exist.

Abstract: A film bulk acoustic resonator includes a substrate; an acoustic reflector portion formed on the substrate; and an acoustic resonator portion including a lower electrode, a piezoelectric film, and an upper electrode which are sequentially stacked on the acoustic reflector portion, An uppermost layer of the acoustic reflector portion which is in contact with the acoustic resonator portion has a root-mean-square roughness of approximately 1 nm or less.

Abstract: A bipolar transistor includes: a first semiconductor layer having an intrinsic base region and an extrinsic base region; and a second semiconductor layer having a portion located on the intrinsic base region to be an emitter region or a collector region. A capacitive film is provided on the extrinsic base region using the same semiconductor material as that for the second semiconductor layer. A base electrode is formed on the first semiconductor layer to cover the capacitive film and the extrinsic base region.

Abstract: A bulk acoustic resonator has an acoustic reflector portion formed on a substrate and including one or more low acoustic impedance layers and one or more high acoustic impedance layers having a higher acoustic impedance than the low acoustic impedance layer which are disposed in stacked relation and an acoustic resonator portion formed on the acoustic reflector portion and having a piezoelectric film. At least one of the low acoustic impedance layers is made of silicon.

Abstract: A composite filter chip includes a stacked chip made by stacking a first chip and a second chip. The first chip has a first filter circuit formed on the main surface thereof. The second chip has a second filter circuit formed on the main surface thereof.