Abstract: An optical module includes an optical semiconductor element a stem including a signal pin and a ground pin; and a circuit board, the circuit board including a signal through-hole, a ground through-hole, a ground layer, and a junction part, the signal through-hole being configured to be pierced by the signal pin, the ground through-hole being configured to be pierced by the ground pin, the signal line being configured to be electrically connected with the signal pin, the ground layer being configured to be electrically connected with the ground pin, the junction part being configured to connect the assistance through-hole and the ground layer around the assistance through-hole with the stem. The circuit board has a first distance between the assistance through-hole and the signal through-hole, the first distance being smaller than a second distance between the ground through-hole and the signal through-hole.

Abstract: An optical module includes a circuit board having a through hole for the lead terminal, a signal wiring connected to the lead terminal, a ground layer providing a reference potential, an opening through which the ground layer is exposed, and a bonding material connecting the ground layer to the metallic base. The lead terminal extends in a first direction, and the circuit board and the signal wiring extend in a second direction. When the circuit board is viewed from the first direction, the opening overlaps with the signal wiring, or when the opening does not overlap with the signal wiring, a first distance between the signal wiring and a closest point of the opening to the signal wiring is smaller than a second distance between the closest point and an edge of the circuit board.

Abstract: An optical transmission module includes a metal base including a signal terminal which extends along a first direction, a dielectric block including a dielectric substance, the dielectric block having a semiconductor plane, an optical plane, and a thermal plane, the semiconductor plane and the optical plane being parallel to the first direction, the thermal plane crossing the first direction, and the semiconductor plane being provided between the optical plane and the thermal plane in the first direction, an optical semiconductor element mounted on the semiconductor plane, the optical semiconductor element being electrically connected with the signal terminal, a temperature regulating element provided between the dielectric block and the metal base in the first direction, the temperature regulating element being contacted with the thermal plane, and a lens mounted on the optical plane.

Abstract: An optical receiver disclosed includes a bias terminal, an input terminal, a photodiode, an amplifier circuit, a first resistor, a bypass circuit, a filter circuit, and a control circuit. The photodiode receives a bias from the filter circuit through the bias terminal, and outputs a current signal to the amplifier circuit through the input terminal. The amplifier circuit converts an input current to an output voltage. The bypass circuit electrically connected to the input terminal decreases a first input impedance viewed from the input terminal, when activated, and increases the first input impedance, when deactivated. The filter circuit increases a second input impedance viewed from the bias terminal, when a dumping function thereof is activated, and decreases the second input impedance, when the dumping function is deactivated. The control circuit activates the dumping function and the bypass circuit, when the output voltage is larger than a certain voltage.

Abstract: An optical module includes a circuit board having a through hole for the lead terminal, a signal wiring connected to the lead terminal, a ground layer providing a reference potential, an opening through which the ground layer is exposed, and a bonding material connecting the ground layer to the metallic base. The lead terminal extends in a first direction, and the circuit board and the signal wiring extend in a second direction. When the circuit board is viewed from the first direction, the opening overlaps with the signal wiring, or when the opening does not overlap with the signal wiring, a first distance between the signal wiring and a closest point of the opening to the signal wiring is smaller than a second distance between the closest point and an edge of the circuit board.

Abstract: A differential amplifier circuit includes a first transistor, a second transistor, a field effect transistor (FET) connected between the first transistor and the second transistor, a first current source connected to the first transistor, a second current source connected to the second transistor, and a control circuit. The first transistor and the second transistor generate a differential output signal in accordance with an input signal and a reference signal. The control circuit includes a first resistor and a second resistor connected in series between the drain and the source of the FET, a center node between the first resistor and the second resistor, a third resistor connected between the gate of the FET and the center node, and a variable current source. The variable current source supplies a control current to the third resistor in accordance with a gain control signal. The control circuit controls on-resistance of the FET.

Abstract: A transimpedance amplifier (TIA) circuit disclosed includes an input terminal, a first TIA circuit, a second TIA circuit, a field effect transistor (FET), and a gain control circuit. The first TIA circuit outputs a voltage signal from a first output in accordance with an input current received at a first input electrically connected to the input terminal. The second TIA circuit outputs a reference signal from a second output. The FET varies a resistance between a first current terminal and a second current terminal in accordance with a control signal applied to a control terminal. The first current terminal is electrically connected to the input terminal. The second current terminal is electrically connected to the second output of the second TIA circuit. The gain control circuit detects an amplitude of the voltage signal and generates the control signal according to a detection result of the amplitude.

Abstract: An optical semiconductor module according to an embodiment includes a housing; a temperature control element having a temperature control plane; a first board mounted on the temperature control plane; a semiconductor laser device mounted on the second side of the first board; a second board mounted on the second side of the first board, the second board having a third side and a fourth side, the fourth side including a wiring pattern, the wiring pattern being electrically connected with the housing via a first bonding wire and electrically connected to the semiconductor laser device via a second bonding wire, the second board having a second thermal conductivity smaller than the first thermal conductivity. The housing is configured to accommodate the temperature control element, the first board, the second board, and the semiconductor laser device.

Abstract: An optical semiconductor module according to the embodiment includes: a board including a transmission line; a block including a low-permittivity material; an inductor mounted on the block, the inductor being connected with the transmission line via a first wire, the first wire having a first inductance; a semiconductor laser device mounted on the board, the semiconductor laser device being connected with the transmission line via a second wire, the second wire having a second inductance smaller than the first inductance; and a housing configured to accommodate the board, the block, the inductor, and the semiconductor laser device.

Abstract: A light semiconductor device according to an embodiment includes: a carrier having a first pattern for transmitting a signal and a second pattern having a reference potential constituting a coplanar line together with the first pattern on a front surface; a modulator having a first electrode provided on a back surface and connected to the second pattern of the carrier and a second electrode provided on a front surface and connected to the first pattern of the carrier; and a first connection portion having one end connected to the second pattern of the carrier and the other end connected to the first electrode of the modulator. The front surface of the modulator and a front surface of the carrier face each other.

Abstract: A transimpedance amplifier (TIA) circuit disclosed includes an input terminal, a first TIA circuit, a second TIA circuit, a field effect transistor (FET), and a gain control circuit. The first TIA circuit outputs a voltage signal from a first output in accordance with an input current received at a first input electrically connected to the input terminal. The second TIA circuit outputs a reference signal from a second output. The FET varies a resistance between a first current terminal and a second current terminal in accordance with a control signal applied to a control terminal. The first current terminal is electrically connected to the input terminal. The second current terminal is electrically connected to the second output of the second TIA circuit. The gain control circuit detects an amplitude of the voltage signal and generates the control signal according to a detection result of the amplitude.

Abstract: An optical receiver disclosed includes a bias terminal, an input terminal, a photodiode, an amplifier circuit, a first resistor, a bypass circuit, a filter circuit, and a control circuit. The photodiode receives a bias from the filter circuit through the bias terminal, and outputs a current signal to the amplifier circuit through the input terminal. The amplifier circuit converts an input current to an output voltage. The bypass circuit electrically connected to the input terminal decreases a first input impedance viewed from the input terminal, when activated, and increases the first input impedance, when deactivated. The filter circuit increases a second input impedance viewed from the bias terminal, when a dumping function thereof is activated, and decreases the second input impedance, when the dumping function is deactivated. The control circuit activates the dumping function and the bypass circuit, when the output voltage is larger than a certain voltage.

Abstract: A differential amplifier circuit disclosed includes a first transistor, a second transistor, a field effect transistor (FET) connected between the first transistor and the second transistor, a first current source connected to the first transistor, a second current source connected to the second transistor, and a control circuit. The first transistor and the second transistor generates a differential output signal in accordance with an input signal and a reference signal. The control circuit includes a first resistor and a second resistor connected in series to each other between drain and source of the FET, a center node between the first resistor and the second resistor, a third resistor connected between gate of the FET and the center node, and a variable current source. The variable current source supplies a control current to the third resistor in accordance with a gain control signal. The control circuit controls on-resistance of the FET.

Abstract: An amplifier includes a printed circuit board that includes an output terminal for outputting an electrical signal to an outside and a bias terminal for receiving a bias of the electrical signal from the outside, and an integrated circuit, a capacitor, an inductor, and a ferrite bead element mounted on the printed circuit board. The integrated circuit includes a driving circuit and an output end, and outputs the electrical signal generated by the driving circuit from the output end. The capacitor is connected between the output end and the output terminal. A series circuit includes the inductor and the ferrite bead element connected to each other in series, with the inductor connected to the output end, and the ferrite bead element connected to the bias terminal.

Abstract: A transimpedance amplifier includes a variable gain circuit configured to generate a pair of complementary signals in accordance with an input signal and a reference signal. A first differential circuit of the variable gain circuit includes a first transistor including a control terminal to receive the input signal, a second transistor including a control terminal to receive the reference signal, and a variable resistance circuit including a first field effect transistor (FET) and a second FET. A first timing when a voltage of a first linearity adjustment signal input to the first FET reaches a first threshold voltage of the first FET and a second timing when a voltage of a second linearity adjustment signal input to the second FET reaches a second threshold voltage of the second FET are different from each other.

Abstract: An LD driver circuit includes an adjustment circuit to which a power supply voltage is applied. The adjustment circuit receives an input signal through an input terminal, generates a shifted input signal shifted in voltage from the input signal by a predetermined shift amount, and outputs the shifted input signal from an output terminal. The LD driver circuit also includes a transistor with its base receiving the shifted input signal, its collector electrically connected to an anode of a driven LD, and its emitter electrically connected to a cathode of the LD and ground, which transistor varies an amount of a shunt current flowing from the collector to the emitter in accordance with the shifted input signal. The adjustment circuit includes a comparator which compares a voltage in the collector and a threshold voltage, and increases or decreases the predetermined shift amount in accordance with an output of the comparator.

Abstract: A circuit device includes a differential circuit including differential input terminals; a differential amplifier circuit in which differential input nodes are connected to the differential input terminals; a first power supply terminal supplied with a first voltage; a second power supply terminal supplied with a second voltage; a common terminal; a first resistive element of which one end is connected to one differential input terminal and another end is connected to the common terminal; a second resistive element of which one end is connected to the first supply terminal and another end is connected to the common terminal; a third resistive element of which one end is connected to one differential input terminal and another end is connected to the second supply terminal; a bonding wire, and a capacitor of which one end is connected to the second supply terminal and another end is connected to the common terminal.

Abstract: An LD driver circuit includes an adjustment circuit, to which a power supply voltage is applied, which receives an input signal through an input terminal, and which generates a shifted input signal shifted in voltage from the input signal by a predetermined shift amount and outputs the shifted input signal from an output terminal; and a transistor, in which a base receives the shifted input signal, in which a collector is electrically connected to an anode of an LD, in which an emitter is electrically connected to a cathode of the LD and a ground, and which varies an amount of a shunt current flowing the collector to the emitter in accordance with the shifted input signal. The adjustment circuit includes a comparator which compares a voltage in the collector and a threshold voltage, and increases or decreases the predetermined shift amount in accordance with an output of the comparator.

Abstract: A variable gain amplifier capable of stabilizing an average output potential of a differential output signal, improving power efficiency over a wide range of an amplitude of the differential input signal, and suppressing deterioration of a distortion rate is provided. The variable gain amplifier includes an amplifying circuit configured to amplify a differential input signal with a gain according to a gain control signal, and a current control circuit. The amplifying circuit has a first current source supplying a source current. The current control circuit adjusts a magnitude of the source current of the first current source according to a magnitude of the gain control signal.

Abstract: A transimpedance amplifier includes a variable gain circuit configured to generate a pair of complementary signals in accordance with an input signal and a reference signal. A first differential circuit of the variable gain circuit includes a first transistor including a control terminal to receive the input signal, a second transistor including a control terminal to receive the reference signal, and a variable resistance circuit including a first field effect transistor (FET) and a second FET. A first timing when a voltage of a first linearity adjustment signal input to the first FET reaches a first threshold voltage of the first FET and a second timing when a voltage of a second linearity adjustment signal input to the second FET reaches a second threshold voltage of the second FET are different from each other.