Patents by Inventor Naoki Izumi
Naoki Izumi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240097008Abstract: A semiconductor device includes: an n-type semiconductor layer; a p-type drift region formed in a surface layer of the n-type semiconductor layer; an n-type body region formed in the surface layer of the n-type semiconductor layer so as to be spaced apart from or adjacent to the p-type drift region; a p-type drain region formed in a surface layer of the p-type drift region; a p-type source region formed in a surface layer of the n-type body region; a gate insulating film formed over a surface of the n-type semiconductor layer so as to straddle the p-type drift region and the n-type body region; a gate electrode formed over the gate insulating film; and an n-type region formed in the surface layer of the p-type drift region and arranged between a side edge of the p-type drift region near the n-type body region and the p-type drain region.Type: ApplicationFiled: September 7, 2023Publication date: March 21, 2024Applicant: ROHM CO., LTD.Inventors: Kazuhiro TAMURA, Naoki IZUMI, Hajime OKUDA
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Publication number: 20240097028Abstract: A semiconductor device includes an n-type semiconductor layer, a p-type drift region formed in a surface layer portion of the semiconductor layer, an n-type body region formed in the surface layer portion of the semiconductor layer, a p-type drain region formed in a surface layer portion of the drift region, a p-type source region formed in a surface layer portion of the body region, a gate insulating film formed on a surface of the semiconductor layer, and a polysilicon gate formed on the gate insulating film, wherein a region extending from the source region to a side edge of the drift region is a channel region, and wherein the polysilicon gate includes a p-type first portion facing at least a portion of the channel region, and an n-type second portion facing at least a portion of the drift region.Type: ApplicationFiled: September 1, 2023Publication date: March 21, 2024Applicant: ROHM CO., LTD.Inventors: Kazuhiro TAMURA, Naoki IZUMI, Yusuke SHIMIZU
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Publication number: 20230352545Abstract: A semiconductor device includes a chip that has a first main surface on one side and a second main surface on another side, a pn-junction portion that is formed in an interior of the chip such as to extend along the first main surface, a device region that is provided in the first main surface, a first trench structure that is formed in the first main surface such as to penetrate through the pn-junction portion and demarcates the device region in the first main surface, and a second trench structure that is formed in the first main surface such as to penetrate through the pn-junction portion and demarcates the device region in a region further to the device region side than the first trench structure.Type: ApplicationFiled: July 12, 2023Publication date: November 2, 2023Applicant: ROHM CO., LTD.Inventors: Keiji WADA, Daisuke ICHIKAWA, Mitsuhide KORI, Naoki IZUMI, Bungo TANAKA
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Patent number: 11353312Abstract: There is provided a roughness tester that improves measurement efficiency and roughness measurement accuracy. A roughness tester includes a stylus unit including a stylus that is provided in such a manner as to protrude from and retract into a through hole of a skid and performs scanning movement along a surface of a workpiece, and a stylus displacement detecting unit that detects displacement of the stylus, and a drive unit that moves the stylus unit forward and backward in a drive-axis direction. The roughness tester further includes a height detector that is provided in such a manner as to face a front end face of the main-body housing part, interposing the skid between the height detector and the front end face and that detects a height of an object in a direction parallel with a measurement axis.Type: GrantFiled: September 1, 2020Date of Patent: June 7, 2022Assignee: MITUTOYO CORPORATIONInventor: Naoki Izumi
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Patent number: 11156537Abstract: A controller of a hardness tester can determine, in a condition where a driver is not in operation and when a spring displacement detector and an arm displacement detector detect an amount of displacement of respective objects (plate spring and loading arm), that a loading arm and a plate spring are deformed according to changes in environmental temperature. A favorable hardness test can be performed by the hardness tester corresponding to the environmental temperature according to the determination by carrying out an initialization process that resets the displacement amount of respective object to zero, the displacement amount detected by the spring displacement detector and the arm displacement detector respectively.Type: GrantFiled: September 30, 2019Date of Patent: October 26, 2021Assignee: MITUTOYO CORPORATIONInventors: Masaru Kawazoe, Naoki Izumi
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Patent number: 11075297Abstract: A semiconductor device includes a semiconductor layer. A first conductivity type region is formed on a base layer portion of the semiconductor layer. A body region of a second conductivity type is formed on the semiconductor layer to be in contact with the first conductivity type region. A trench in which a gate electrode is embedded through a gate insulating film is formed on the semiconductor layer. The trench penetrates through the body region, so that a deepest portion thereof reaches the first conductivity type region. A source region of the first conductivity type is formed on a surface layer portion of the semiconductor layer around the trench. The gate insulating film includes a thick-film portion having a relatively large thickness on a bottom surface of the trench.Type: GrantFiled: February 20, 2020Date of Patent: July 27, 2021Assignee: ROHM CO., LTD.Inventor: Naoki Izumi
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Publication number: 20210072015Abstract: There is provided a roughness tester that improves measurement efficiency and roughness measurement accuracy. A roughness tester includes a stylus unit including a stylus that is provided in such a manner as to protrude from and retract into a through hole of a skid and performs scanning movement along a surface of a workpiece, and a stylus displacement detecting unit that detects displacement of the stylus, and a drive unit that moves the stylus unit forward and backward in a drive-axis direction. The roughness tester further includes a height detector that is provided in such a manner as to face a front end face of the main-body housing part, interposing the skid between the height detector and the front end face and that detects a height of an object in a direction parallel with a measurement axis.Type: ApplicationFiled: September 1, 2020Publication date: March 11, 2021Inventor: Naoki Izumi
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Publication number: 20200235236Abstract: A semiconductor device includes a semiconductor layer. A first conductivity type region is formed on a base layer portion of the semiconductor layer. A body region of a second conductivity type is formed on the semiconductor layer to be in contact with the first conductivity type region. A trench in which a gate electrode is embedded through a gate insulating film is formed on the semiconductor layer. The trench penetrates through the body region, so that a deepest portion thereof reaches the first conductivity type region. A source region of the first conductivity type is formed on a surface layer portion of the semiconductor layer around the trench. The gate insulating film includes a thick-film portion having a relatively large thickness on a bottom surface of the trench.Type: ApplicationFiled: February 20, 2020Publication date: July 23, 2020Inventor: Naoki IZUMI
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Publication number: 20200110012Abstract: A controller of a hardness tester can determine, in a condition where a driver is not in operation and when a spring displacement detector and an arm displacement detector detect an amount of displacement of respective objects (plate spring and loading arm), that a loading arm and a plate spring are deformed according to changes in environmental temperature. A favorable hardness test can be performed by the hardness tester corresponding to the environmental temperature according to the determination by carrying out an initialization process that resets the displacement amount of respective object to zero, the displacement amount detected by the spring displacement detector and the arm displacement detector respectively.Type: ApplicationFiled: September 30, 2019Publication date: April 9, 2020Applicant: MITUTOYO CORPORATIONInventors: Masaru Kawazoe, Naoki Izumi
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Patent number: 10615275Abstract: A semiconductor device includes a semiconductor layer. A first conductivity type region is formed on a base layer portion of the semiconductor layer. A body region of a second conductivity type is formed on the semiconductor layer to be in contact with the first conductivity type region. A trench in which a gate electrode is embedded through a gate insulating film is formed on the semiconductor layer. The trench penetrates through the body region, so that a deepest portion thereof reaches the first conductivity type region. A source region of the first conductivity type is formed on a surface layer portion of the semiconductor layer around the trench. The gate insulating film includes a thick-film portion having a relatively large thickness on a bottom surface of the trench.Type: GrantFiled: September 6, 2019Date of Patent: April 7, 2020Assignee: ROHM CO., LTD.Inventor: Naoki Izumi
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Publication number: 20190393337Abstract: A semiconductor device includes a semiconductor layer. A first conductivity type region is formed on a base layer portion of the semiconductor layer. A body region of a second conductivity type is formed on the semiconductor layer to be in contact with the first conductivity type region. A trench in which a gate electrode is embedded through a gate insulating film is formed on the semiconductor layer. The trench penetrates through the body region, so that a deepest portion thereof reaches the first conductivity type region. A source region of the first conductivity type is formed on a surface layer portion of the semiconductor layer around the trench. The gate insulating film includes a thick-film portion having a relatively large thickness on a bottom surface of the trench.Type: ApplicationFiled: September 6, 2019Publication date: December 26, 2019Inventor: Naoki IZUMI
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Patent number: 10446678Abstract: A semiconductor device includes a semiconductor layer. A first conductivity type region is formed on a base layer portion of the semiconductor layer. A body region of a second conductivity type is formed on the semiconductor layer to be in contact with the first conductivity type region. A trench in which a gate electrode is embedded through a gate insulating film is formed on the semiconductor layer. The trench penetrates through the body region, so that a deepest portion thereof reaches the first conductivity type region. A source region of the first conductivity type is formed on a surface layer portion of the semiconductor layer around the trench. The gate insulating film includes a thick-film portion having a relatively large thickness on a bottom surface of the trench.Type: GrantFiled: January 16, 2019Date of Patent: October 15, 2019Assignee: ROHM CO., LTD.Inventor: Naoki Izumi
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Publication number: 20190148542Abstract: A semiconductor device includes a semiconductor layer. A first conductivity type region is formed on a base layer portion of the semiconductor layer. A body region of a second conductivity type is formed on the semiconductor layer to be in contact with the first conductivity type region. A trench in which a gate electrode is embedded through a gate insulating film is formed on the semiconductor layer. The trench penetrates through the body region, so that a deepest portion thereof reaches the first conductivity type region. A source region of the first conductivity type is formed on a surface layer portion of the semiconductor layer around the trench. The gate insulating film includes a thick-film portion having a relatively large thickness on a bottom surface of the trench.Type: ApplicationFiled: January 16, 2019Publication date: May 16, 2019Applicant: ROHM CO., LTD.Inventor: Naoki IZUMI
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Patent number: 10211334Abstract: A semiconductor device includes a semiconductor layer. A first conductivity type region is formed on a base layer portion of the semiconductor layer. A body region of a second conductivity type is formed on the semiconductor layer to be in contact with the first conductivity type region. A trench in which a gate electrode is embedded through a gate insulating film is formed on the semiconductor layer. The trench penetrates through the body region, so that a deepest portion thereof reaches the first conductivity type region. A source region of the first conductivity type is formed on a surface layer portion of the semiconductor layer around the trench. The gate insulating film includes a thick-film portion having a relatively large thickness on a bottom surface of the trench.Type: GrantFiled: May 2, 2018Date of Patent: February 19, 2019Assignee: ROHM CO., LTD.Inventor: Naoki Izumi
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Publication number: 20180248033Abstract: A semiconductor device includes a semiconductor layer. A first conductivity type region is formed on a base layer portion of the semiconductor layer. A body region of a second conductivity type is formed on the semiconductor layer to be in contact with the first conductivity type region. A trench in which a gate electrode is embedded through a gate insulating film is formed on the semiconductor layer. The trench penetrates through the body region, so that a deepest portion thereof reaches the first conductivity type region. A source region of the first conductivity type is formed on a surface layer portion of the semiconductor layer around the trench. The gate insulating film includes a thick-film portion having a relatively large thickness on a bottom surface of the trench.Type: ApplicationFiled: May 2, 2018Publication date: August 30, 2018Applicant: ROHM CO., LTD.Inventor: Naoki IZUMI
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Patent number: 10062778Abstract: A semiconductor device according to the present invention includes: an insulating layer; a semiconductor layer of a first conductive type laminated on the insulating layer; an annular deep trench having a thickness reaching the insulating layer from a top surface of the semiconductor layer; a body region of a second conductive type formed across an entire thickness of the semiconductor layer along a side surface of the deep trench in an element forming region surrounded by the deep trench; a drift region of the first conductive type constituted of a remainder region besides the body region in the element forming region; a source region of the first conductive type formed in a top layer portion of the body region; a drain region of the first conductive type formed in a top layer portion of the drift region; and a first conductive type region formed in the drift region, having a deepest portion reaching a position deeper than the drain region, and having a first conductive type impurity concentration higher thaType: GrantFiled: March 7, 2016Date of Patent: August 28, 2018Assignee: ROHM CO., LTD.Inventors: Naoki Izumi, Tomoyasu Sada
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Patent number: 9978860Abstract: A semiconductor device includes a semiconductor layer. A first conductivity type region is formed on a base layer portion of the semiconductor layer. A body region of a second conductivity type is formed on the semiconductor layer to be in contact with the first conductivity type region. A trench in which a gate electrode is embedded through a gate insulating film is formed on the semiconductor layer. The trench penetrates through the body region, so that a deepest portion thereof reaches the first conductivity type region. A source region of the first conductivity type is formed on a surface layer portion of the semiconductor layer around the trench. The gate insulating film includes a thick-film portion having a relatively large thickness on a bottom surface of the trench.Type: GrantFiled: July 29, 2016Date of Patent: May 22, 2018Assignee: ROHM CO., LTD.Inventor: Naoki Izumi
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Patent number: 9644950Abstract: A positioning unit includes two or more the laser light sources disposed around a point sensor. Laser light beams from the two or more the laser light sources intersect at an adjustment point separated from a detection point, which is away from the point sensor, by a predetermined distance. The adjustment point is positioned on a desired measurement start point on a work, the point sensor is moved close to the work by the predetermined distance, and a measurement scan of the work is started.Type: GrantFiled: September 30, 2015Date of Patent: May 9, 2017Assignee: MITUTOYO CORPORATIONInventors: Kotaro Hirano, Naoki Izumi, Hideki Shindo
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Publication number: 20160380096Abstract: A semiconductor device includes a semiconductor layer. A first conductivity type region is formed on a base layer portion of the semiconductor layer. A body region of a second conductivity type is formed on the semiconductor layer to be in contact with the first conductivity type region. A trench in which a gate electrode is embedded through a gate insulating film is formed on the semiconductor layer. The trench penetrates through the body region, so that a deepest portion thereof reaches the first conductivity type region. A source region of the first conductivity type is formed on a surface layer portion of the semiconductor layer around the trench. The gate insulating film includes a thick-film portion having a relatively large thickness on a bottom surface of the trench.Type: ApplicationFiled: July 29, 2016Publication date: December 29, 2016Applicant: ROHM CO., LTD.Inventor: Naoki IZUMI
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Patent number: 9441715Abstract: A traction nut has twist rollers pivotally supported so as to be rotatable in a state of defining an inclination angle with respect to an axis of a drive shaft, the inclination angle being equivalent to a lead angle; an open/close lever provided to switch between a friction-contact state and a disengaged state of the traction nut relative to the drive shaft; and a spring generating a biasing force such that the traction nut is brought into friction-contact with the drive shaft. In response to user operation, the open/close lever puts the traction nut in the disengaged state against the biasing force of the spring. When the user releases the open/close lever, the traction nut returns to the friction-contact state due to the biasing force of the spring.Type: GrantFiled: September 16, 2014Date of Patent: September 13, 2016Assignee: MITUTOYO CORPORATIONInventors: Youhei Onodera, Hideki Shindo, Naoki Izumi