Patents by Inventor Naoki Matsushima

Naoki Matsushima has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8269301
    Abstract: Submounts for mounting optical devices which have an excellent heat radiating property and can be formed in a wafer state in batch are provided. A metallized electrode including optical device mounting parts and wiring parts is formed on a surface of a first substrate containing an insulating material as a main component, a through hole is formed in a glass substrate serving as a second substrate, the optical device mounting parts of the first substrate are aligned to be located inside the through hole of the second substrate, and the first substrate and the second substrate are joined together by use of a method such as anodic bonding.
    Type: Grant
    Filed: April 4, 2007
    Date of Patent: September 18, 2012
    Assignee: Hitachi Kyowa Engineering Co., Ltd.
    Inventors: Shohei Hata, Eiji Sakamoto, Naoki Matsushima, Hideaki Takemori, Masatoshi Seki
  • Publication number: 20120128292
    Abstract: A photoelectric composite wiring module, being superior in performances and mass-productivity thereof, and a transmission apparatus of applying that therein are provided. Optical devices 2a and 2b are disposed on a circuit board 1, so that they are optically coupled with optical guides 11 formed on the circuit board 1, wherein a filet-like resin is formed on a side surface of a bump, which is formed on side surfaces or/and upper portions of the optical devices, on an upper layer thereof being compressed a resin film to be adhered thereon, thereby forming an insulation film 31, and an electric wiring layer 3 is laminated, so that the electrodes of the optical devices 2 and wirings of the electric wiring layer are electrically connected with, and further thereon is mounted a semiconductor element 4; thereby obtaining the structure for brining the transmission speed to be high per channel, and for preventing the power consumption from increasing.
    Type: Application
    Filed: June 2, 2010
    Publication date: May 24, 2012
    Applicant: Hitachi-Ltd.
    Inventors: Saori Hamamura, Naoki Matsushima, Madoka Minagawa, Satoshi Kaneko, Norio Chujo, Yasunobu Matsuoka, Toshiki Sugawara, Tsutomu Kono
  • Patent number: 8110907
    Abstract: A semiconductor device includes a semiconductor chip, a first substrate, and a second substrate. The first substrate includes a plurality of wires and a plurality of first electrodes, each first electrode being connected with each wire. The second substrate includes the semiconductor chip that is mounted thereon, and a plurality of second electrodes with, each second electrode being connected with the each first electrode of the first substrate. The widths of the wires of the first substrate are different depending on the lengths of the wires. By changing the widths of the wires depending on their lengths, it is possible to reduce variation in stiffness of the electrodes and vicinities of electrodes, whereby variation in ultrasonic bonding strength can be reduced.
    Type: Grant
    Filed: January 8, 2009
    Date of Patent: February 7, 2012
    Assignee: Elpida Memory, Inc.
    Inventors: Masahiro Yamaguchi, Emi Sawayama, Hiroshi Oyama, Shigeharu Tsunoda, Yasuo Amano, Naoki Matsushima
  • Patent number: 8103332
    Abstract: A head-coupled holder the optical measurement of a living body that securely brings a light irradiation module and a light detection module in close contact with the scalp of a person to be examined, and gives the person no excessive pressure feeling. Each light irradiation module and light detection module includes a contactor having a contact portion that comes in contact with the scalp at a leading end thereof, and exposes a leading end of a light guide to the contact portion to form the light guide, and a package having a lower portion to which the contactor is attached. The contactor is fixed to the lower portion of the package through an elastic body, and the package is fixed to an inner upper wall of the insertion hole with a series structure of the elastic body and the viscoelastic body.
    Type: Grant
    Filed: July 18, 2008
    Date of Patent: January 24, 2012
    Assignee: Hitachi, Ltd.
    Inventors: Masashi Kiguchi, Naoki Matsushima, Hirokazu Atsumori
  • Publication number: 20110237001
    Abstract: A technique for evaluating a semiconductor chip is provided. The semiconductor chip is mounted on a mount substrate, the semiconductor chip laminating on one surface of a silicone substrate, at least any of a metal wiring film 101 serving as a resistance temperature detector made up of multiple regions and a metal wiring film 102 serving as a heater made up of one or more regions, and an electrode 103 for connecting the metal wiring film 101 and the metal wiring film 102 with the mount substrate. Then, the metal wiring film 101 is electrically connected with an ammeter and a voltmeter, and the metal wiring film 102 is electrically connected with a power source, thereby providing an evaluation system which is capable of evaluating temperature measurement, heating, and temperature profile in each of the regions on the semiconductor chip.
    Type: Application
    Filed: February 24, 2011
    Publication date: September 29, 2011
    Inventors: Takehiko HASEBE, Masako Kato, Yoshihide Yamaguchi, Masashi Nishiki, Naoki Matsushima, Teiichi Inada, Rei Yamamoto, Hiroyuki Temmei, Ukyo Ikeda
  • Patent number: 8027553
    Abstract: An optical element amounted structure includes an optical element having an electrode such as a bump formed on a surface thereof, and a substrate having an electrode that is joined to the optical element formed on the surface. The structure of the electrode of the substrate has a substantially ring configuration or a substantially ring configuration a part of which is notched, and the optical element and the substrate are joined to each other in a configuration where a joining material such as a bump is inserted into an opening portion.
    Type: Grant
    Filed: August 6, 2007
    Date of Patent: September 27, 2011
    Assignee: Hitachi Cable, Ltd.
    Inventors: Toshiaki Takai, Naoki Matsushima, Koki Hirano, Hiroki Yasuda
  • Publication number: 20110205865
    Abstract: A thermally assisted magnetic recording head with highly efficient optical coupling, while guiding a laser beam from a semiconductor laser element, i.e., a light source, to a leading end thereof, eliminating an influence due to heat generated by the element, and having excellent floating characteristics. The thermally assisted magnetic recording head includes a substrate 2 having a first optical waveguide 1, a semiconductor laser element 100, and a slider 4 having a second optical waveguide 3 formed on an end surface. The semiconductor laser element 100 is fixed on the substrate 2 so that light emitted from the element 100 propagates through the first optical waveguide 1, and a slider 4 is fixed on the substrate 2 so that light emitted from the first optical waveguide 1 propagates through the second optical waveguide 3. High optical coupling efficiency is then achieved, while ensuring both heat-dissipating and floating characteristics.
    Type: Application
    Filed: June 9, 2009
    Publication date: August 25, 2011
    Applicant: Hitachi, Ltd.
    Inventors: Naoki Matsushima, Satoshi Arai, Takuya Matsumoto, Jun-ichiro Shimizu, Irizo Naniwa
  • Patent number: 8003193
    Abstract: The present invention provides a low-cost MEMS functional device by improving air tightness of a jointed section by anode junction in wafer level packaging for MEMS based functional devices. The MEMS functional device comprises a function element section formed by processing a substrate mainly made of Si, a metallized film for sealing formed around the functional element, and a glass substrate jointed to the metallized film for sealing by anode junction. Formed on a surface of the metallized film for sealing is a metallized film containing at least one of Sn and Ti as a main component.
    Type: Grant
    Filed: October 26, 2007
    Date of Patent: August 23, 2011
    Assignee: Hitachi, Ltd.
    Inventors: Shohei Hata, Eiji Sakamoto, Naoki Matsushima
  • Patent number: 7991251
    Abstract: A filter element includes a first glass substrate having a pair of parallel surfaces and a band pass filter arranged on one of the parallel surfaces, a pair of single-crystal substrates (Si wafers) each including a primary surface formed with a depression having an inclined surface with respect to the primary surface occupying at least one half of the opening of the depression, and a second glass substrate having an optical element. The primary surfaces of the single-crystal substrate pair are bonded to a pair of the surfaces of the glass substrate. The depressions are faced through the glass substrate and surround the band pass filter. By this configuration, the filter element can be mass produced with a high accuracy and a low cost by the wafer-level process.
    Type: Grant
    Filed: June 30, 2009
    Date of Patent: August 2, 2011
    Assignee: Hitachi, Ltd.
    Inventors: Shohei Hata, Naoki Matsushima, Toshiaki Takai, Yukio Sakigawa, Satoshi Arai
  • Publication number: 20110141862
    Abstract: In a thermally assisted magnetic recording head having a light source and a waveguide to lead a laser beam radiated from the light source to a front end of the magnetic head, while blocking an adverse effect of heat generated in the light source and securing a good floating characteristic, the light source and the magnetic head are optically coupled with high efficiency and the magnetic head itself is reduced in size. This invention provides a reflection mirror that is formed of a part or whole of one inclined end surface of the semiconductor laser mounted on the first submount. Near one end surface of the slider is provided the optical waveguide that pierces through the slider in a direction of the thickness thereof.
    Type: Application
    Filed: June 3, 2009
    Publication date: June 16, 2011
    Applicant: Hitachi, Ltd.
    Inventors: Satoshi Arai, Naoki Matsushima, Irizo Naniwa, Junichiro Shimizu
  • Patent number: 7939938
    Abstract: A packaging structure for hermetically sealing a functional device by solder connection at a wafer level in which a first Si substrate having a concave portion metallized on its internal surface and a second Si substrate metallized at a position opposed to said concave portion are used, the metallization applied to the internal surface of the concave portion of the first Si substrate and the metallization applied to the second Si substrate at the position opposed to the concave portion are connected by molten solder to hermetically seal the functional device between the first Si substrate and the second Si substrate, whereby the wettability of the solder for the two Si substrates is improved, the bondability between the Si substrates is enhanced, and the yield at which the package is manufactured is improved.
    Type: Grant
    Filed: February 8, 2008
    Date of Patent: May 10, 2011
    Assignee: Hitachi Metals, Inc.
    Inventors: Shohei Hata, Naoki Matsushima, Eiji Sakamoto, Ryoji Okada, Takanori Aono, Atsushi Kazama, Toshiki Kida
  • Publication number: 20110026878
    Abstract: In fabricating an optical I/O array module, an optical waveguide provided with mirror parts, each having a tapered face, is formed on a substrate, a convex shaped member or a concave shaped member is placed at spots above the respective mirror parts of the optical waveguide, and laser diode arrays and photo diode arrays, provided with either a concave shape, or a convex shape, are mated with, or into the convex shaped member or the concave shaped member before being mounted. Further, there are formed multiple filmy layers, on which an LSI where a driver IC LSI of optical elements, and an amplifier LSI of the optical elements are integrated.
    Type: Application
    Filed: July 27, 2010
    Publication date: February 3, 2011
    Applicant: Hitachi, Ltd.
    Inventors: Yasunobu MATSUOKA, Toshiki Sugawara, Koichiro Adachi, Naoki Matsushima, Saori Hamamura, Madoka Minagawa, Norio Chujo
  • Patent number: 7842889
    Abstract: The present invention is characterized by a structure having a substrate 1, and metallization layers 2 formed on the substrate 1, on which a Sn solder film 3 and an Ag film 4 are formed. The Ag film 4 is a metal free from oxidization at room temperature in the atmosphere. In a wet process, since only an exposed side of the Sn solder film 3 is oxidized by the cell reaction of Ag and Sn, an upper surface of the Ag film 4 on the solder film, which would otherwise affect the connection, is not oxidized. Since the Ag film 4 melts into the Sn solder simultaneously with melting of the Sn solder film 3, the Ag film 4 does not hinder the connection.
    Type: Grant
    Filed: January 13, 2009
    Date of Patent: November 30, 2010
    Assignee: Hitachi Kyowa Engineering Co., Ltd.
    Inventors: Shohei Hata, Naoki Matsushima, Takeru Fujinaga
  • Publication number: 20100209041
    Abstract: A photoelectric composite wiring module includes a circuit substrate, an optical device, an LSI having a driver and an amplifier for the optical device, and a thin film wiring layer having an electrical wiring. The optical device is connected with the LSI by means of the electrical wiring. The optical device is formed on the circuit substrate and optically coupled to an optical waveguide formed in the circuit substrate. The thin film wiring layer is formed on the optical device to ensure that the optical device is electrically connected with the electrical wiring of the thin film wiring layer. The LSI is mounted on and electrically connected with the thin film wiring layer.
    Type: Application
    Filed: November 23, 2009
    Publication date: August 19, 2010
    Applicant: HITACHI, LTD.
    Inventors: Naoki MATSUSHIMA, Norio CHUJO, Yasunobu MATSUOKA, Toshiki SUGAWARA, Madoka MINAGAWA, Saori HAMAMURA, Satoshi KANEKO, Tsutomu KONO
  • Patent number: 7750310
    Abstract: The present invention provides a semiconductor radioactive ray detector having the excellent energy resolution or time precision, a radioactive detection module, and a nuclear medicine diagnosis apparatus. The semiconductor radioactive ray detector has a structure in which plate-like elements made of cadmium telluride and conductive members are alternately laminated and the plate-like element made of cadmium telluride and the conductive member are adhered to each other with a conductive adhesive agent, and the Young's modulus of the conductive adhesive agent is in the range from 350 MPa to 1000 MPa, while the conductive members are made from a material with the linear expansion coefficient of the conductive members in the range from 5×10?6/° C. to 7×10?6/° C.
    Type: Grant
    Filed: August 10, 2006
    Date of Patent: July 6, 2010
    Assignee: Hitachi, Ltd.
    Inventors: Tomoyuki Seino, Norihito Yanagita, Toshiaki Takai, Chiko Yorita, Naoki Matsushima
  • Publication number: 20100047588
    Abstract: A technique for bonding a glass plate to an insulating material or a nonoxidized semiconductor substrate such as SiC without a bonding agent is provided. A metallized layer is formed on the insulating material or the nonoxidized semiconductor substrate such as SiC serving as a first substrate, and the metallized layer of the first substrate is bonded to a second glass substrate, which serves as a second substrate and contains ions capable of being diffused by a voltage, by anodic bonding.
    Type: Application
    Filed: April 4, 2007
    Publication date: February 25, 2010
    Inventors: Syohei Hata, Eiji Sakamoto, Naoki Matsushima
  • Publication number: 20100002987
    Abstract: A filter element includes a first glass substrate having a pair of parallel surfaces and a band pass filter arranged on one of the parallel surfaces, a pair of single-crystal substrates (Si wafers) each including a primary surface formed with a depression having an inclined surface with respect to the primary surface occupying at least one half of the opening of the depression, and a second glass substrate having an optical element. The primary surfaces of the single-crystal substrate pair are bonded to a pair of the surfaces of the glass substrate. The depressions are faced through the glass substrate and surround the band pass filter. By this configuration, the filter element can be mass produced with a high accuracy and a low cost by the wafer-level process.
    Type: Application
    Filed: June 30, 2009
    Publication date: January 7, 2010
    Applicant: HITACHI, LTD.
    Inventors: Shohei HATA, Naoki MATSUSHIMA, Toshiaki TAKAI, Yukio SAKIGAWA, Satoshi ARAI
  • Publication number: 20090294158
    Abstract: To provide an electronic circuit board in which a conductive wire is excellently connected to a bonding pad formed directly on a polyimide film. The electronic circuit includes: a first layer metal pattern 3 formed on a substrate 1; a polyimide film 2 formed on the first layer metal pattern 3; and a second layer metal pattern formed on a surface of the polyimide film 2. A conductive bump 4 is formed on the surface of the second layer metal pattern 31 by ball-bonding to provide electrical connection with a semiconductor chip 7 bonded to the first layer metal pattern by die-bonding. The conductive bump 4 is electrically connected to an electrode 72 of the semiconductor chip 7 by wire bonding.
    Type: Application
    Filed: March 9, 2006
    Publication date: December 3, 2009
    Inventors: Naoki Matsushima, Hideaki Takemori
  • Publication number: 20090219728
    Abstract: Submounts for mounting optical devices which have an excellent heat radiating property and can be formed in a wafer state in batch are provided. A metallized electrode including optical device mounting parts and wiring parts is formed on a surface of a first substrate containing an insulating material as a main component, a through hole is formed in a glass substrate serving as a second substrate, the optical device mounting parts of the first substrate are aligned to be located inside the through hole of the second substrate, and the first substrate and the second substrate are joined together by use of a method such as anodic bonding.
    Type: Application
    Filed: April 4, 2007
    Publication date: September 3, 2009
    Applicants: Institut Francias Du Petrole, Institut National De La Recherche Agronomique
    Inventors: Shohei Hata, Eiji Sakamoto, Naoki Matsushima, Hideaki Takemori, Masatoshi Seki
  • Publication number: 20090206492
    Abstract: A semiconductor device includes a semiconductor chip, a first substrate, and a second substrate. The first substrate includes a plurality of wires and a plurality of first electrodes, each first electrode being connected with each wire. The second substrate includes the semiconductor chip that is mounted thereon, and a plurality of second electrodes with, each second electrode being connected with the each first electrode of the first substrate. The widths of the wires of the first substrate are different depending on the lengths of the wires. By changing the widths of the wires depending on their lengths, it is possible to reduce variation in stiffness of the electrodes and vicinities of electrodes, whereby variation in ultrasonic bonding strength can be reduced.
    Type: Application
    Filed: January 8, 2009
    Publication date: August 20, 2009
    Applicant: Elpida Memory, Inc.
    Inventors: Masahiro Yamaguchi, Emi Sawayama, Hiroshi Oyama, Shigeharu Tsunoda, Yasuo Amano, Naoki Matsushima