Patents by Inventor Naoki Mukawa

Naoki Mukawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210258273
    Abstract: A communication server device that mediates communication information transmitted and received between a plurality of communication terminals provides people who are participating in a conversation using real-time chat with information that can create a trigger to prompt them to end the conversation.
    Type: Application
    Filed: June 7, 2019
    Publication date: August 19, 2021
    Applicant: NIPPON TELEGRAPH AND TELEPHONE CORPORATION
    Inventors: Ryosuke AOKI, Yusuke KAMEYAMA, Naoki OSHIMA, Naoki MUKAWA
  • Publication number: 20210249007
    Abstract: Implemented is a communication with reasonably smooth conversation even between people having different proficiency levels in a common language. Included are a voice recognition unit (14) that acquires a speech rate of a speaker and recognizes a voice on a speech content; and a call voice processing unit (12) that processes a part of a voice recognition result based on a result of comparing the acquired speech rate with a reference speech rate, and transmits a video on which a text character image of the voice recognition result having been processed is superimposed to a communication terminal TM of the speaker.
    Type: Application
    Filed: June 7, 2019
    Publication date: August 12, 2021
    Inventors: Ryosuke Aoki, Munenori Koyasu, Naoki Oshima, Naoki Mukawa
  • Patent number: 4920426
    Abstract: In an image coding system having a plurality of coding characteristics, such as quantization characteristics, information of a digital image signal sequence is monitored in each of a number of predetermined intervals by forming a histogram of a sequence of coefficients which is calculated from the digital image signal sequence in accordance with each of the coding characteristics. The amount of information is calculated by summing up the coefficients in relation to every one of the coding characteristics. An optimum one of the coding characteristics is indicated by the coding control circuit to code the coefficient sequence into a sequence of coded signals in accordance with the optimum coding characteristic. The coefficient sequence in each frame may be divided into a sequence of blocks each of which is judged to be either valid or invalid in relation to each coding characteristic. Results of judgement may be included in the amount of information.
    Type: Grant
    Filed: November 9, 1987
    Date of Patent: April 24, 1990
    Assignees: Kokusai Denshin Denwa Co., Ltd., NEC Corporation, Fujitsu Limited, Nippon Telegraph and Telephone Corporation
    Inventors: Yoshinori Hatori, Toshio Koga, Kiichi Matsuda, Naoki Mukawa
  • Patent number: 4908862
    Abstract: In an encoding system responsive to a sequence of coefficient signals which results from a predetermined linear transform and which is divided into a sequence of blocks, anterior processing is carried out prior to quantization about the coefficient signals in each block to determine a significant area of the coefficient signals by comparing each level of the coefficient signals with a threshold level. Only the coefficient signals within the significant area are judged to be valid and produced as a sequence of significant coefficient signals from a classifying circuit (20) to be quantized by a quantizer (15) into a sequence of quantized signals. The quantized signal sequence is subjected to posterior processing to produce a sequence of encoded signals. The significant area may be decided by the use of a selected one of zone detection, zigzag scanning, and adaptive scanning.
    Type: Grant
    Filed: November 10, 1987
    Date of Patent: March 13, 1990
    Assignees: Kokusai Denshin Denwa Co., Ltd., NEC Corporation, Fujitsu Ltd., Nippon Telegraph and Telephone Corporation
    Inventors: Masahide Kaneko, Atsushi Koike, Mutsumi Ohta, Kiichi Matsuda, Naoki Mukawa, Yoichi Kato
  • Patent number: 4807028
    Abstract: For decoding by the use of a decoder buffer memory an encoded video signal into which an encoder input signal is encoded with data compression on a basis of frames, a decoding device comprises a control signal producing unit for delivering a decoder control signal to a decoder when the frame of data written into the buffer memory coincides with the frame of data read out of the buffer memory. Responsive to the control signal, the decoder produces a supply control signal to the buffer memory to stop delivery of the read-out data to the decoder. Preferably, the decoding device should comprise a processing unit for producing frame pulses at heads of the respective frames of the encoded video signal. A counter counts the frame head pulses to make the write-in data and the read-out data indicate frame numbers for use in the signal producing unit. Alternatively, the decoding device may receive an encoded video signal in which frame number data are included for use in the signal producing unit.
    Type: Grant
    Filed: November 10, 1987
    Date of Patent: February 21, 1989
    Assignees: Kokusai Denshin Denwa Co., Ltd., Nippon Telegraph & Telephone Corp., Nec Corp.
    Inventors: Yoshinori Hatori, Mitsuo Nishiwaki, Naoki Mukawa
  • Patent number: 4805017
    Abstract: A motion compensation difference interframe or intra-frame coding system includes a block data redundancy compression and coding unit, a PIXEL data coding unit and a prediction data generator unit. The block data redundancy compression and coding unit codes a motion compensated (MC) difference between an input image in a block and a motion predicted image from the prediction data generator unit, and transmits coded data to a receiver. The PIXEL data coding unit receives an error between the MC difference and a decoded MC difference from the block data redundancy compression and coding unit, rearranges the error in PIXEL data and codes the PIXEL error, when the error is greater than a predetermined value. The PIXEL coded data is also transmitted to the receiver. The prediction data generator unit generates predicted block data of the motion of the image. The redundancy compression and coding unit may include a filter circuit rejecting pulse components contained in the MC difference.
    Type: Grant
    Filed: March 4, 1987
    Date of Patent: February 14, 1989
    Assignees: Kokusai Denshin Denwa Co., Ltd., Fujitsu Limited, Nippon Telegraph and Telephone Corporation, NEC Corporation
    Inventors: Masahide Kaneko, Kiichi Matsuda, Naoki Mukawa, Toshio Koga
  • Patent number: 4802006
    Abstract: In a predictive encoder for use particularly in a conference television system, a signal processing unit is used in producing a prediction signal and comprises three prediction circuits (22, 23, 31) and a selection circuit (24) coupled to the prediction circuits. The prediction circuits are for producing an inframe, an interframe, and a background prediction signals, respectively. Those signals are produced by processing an original signal at instants which precede a current instant and are different from one another. The selection circuit is for selecting one of the inframe, the interframe, and the background prediction signals. Therefore, it is possible to produce the prediction signal suitably predictive of the original signal. The signal processing circuit serves equally well in a predictive decoder.
    Type: Grant
    Filed: November 12, 1985
    Date of Patent: January 31, 1989
    Assignees: NEC Corporation, Nippon Telegraph and Telephone Corporation
    Inventors: Kazumoto Iinuma, Toshio Koga, Akihiro Furukawa, Sakae Okubo, Hideo Hashimoto, Naoki Mukawa
  • Patent number: 4791485
    Abstract: An inter-frame encoding/decoding equipment for television signals consists of inter-frame encoding equipment encoding a difference between television signals and the output of a frame memory and inter-frame decoding equipment which receives an encoded signal sent from the inter-frame encoding device via a transmission line, which decodes by adding the output of the frame memory to the encoded signal. The inter-frame encoding equipment is provided with a first operation circuit which operates the remainders obtained by dividing, by a predetermined value, the number of bits of logic "1" in the bit groups into which the output or the input of the frame memory is divided by a predetermined unit. The inter-frame decoding equipment is provided with a second operation circuit which operates the remainders obtained by dividing, by a predetermined value, the number of bits of logic "1" in the bit groups into which the output or the input of the frame memory is divided by a predetermined unit.
    Type: Grant
    Filed: December 19, 1986
    Date of Patent: December 13, 1988
    Assignees: Nippon Telegraph & Telephone Public Corporation, Fujitsu Limited, NEC Corporation
    Inventors: Hideo Kuroda, Naoki Mukawa, Makoto Hiraoka, Kiichi Matsuda, Mitsuo Nishiwaki, Shuzo Tsugane
  • Patent number: 4731664
    Abstract: A video signal frame memory is refreshed without requiring either a separate transmission line or the transmission of bursts of data. This is done by dividing the frame signals into blocks of data, which are further divided into lines and sub-blocks. During each frame, refreshing signals are sent on a sub-block basis, thereby distributing the refreshing control signals and preventing many signals from being sent in bursts.
    Type: Grant
    Filed: November 4, 1985
    Date of Patent: March 15, 1988
    Assignee: NEC Corporation
    Inventors: Mitsuo Nishiwaki, Shuzo Tsugane, Naoki Mukawa, Hideo Kuroda
  • Patent number: 4688233
    Abstract: In a digital data communication network comprising digital data transmitting and receiving devices (111, 122) and first and second digital communication paths (16, 17) connected to each other and to the transmitting and the receiving devices, respectively, a stuffing circuit (23) is controlled by a control signal producing circuit (24) so as to stuff and not to stuff an input bit sequence when at least one of the first and the second digital communication paths has a restricted transmission characteristic and when both of the communication paths have an unrestricted transmission characteristic. Preferably, necessity and unnecessity of stuffing should be detected for a leading and a trailing part of each block with a shorter interval of time than for other parts of the block. More preferably, some of binary one bits placed at the beginnings of the respective blocks are used as a part of a multiframe synchronization pattern for a signal transmitted through the communication paths.
    Type: Grant
    Filed: November 7, 1985
    Date of Patent: August 18, 1987
    Assignee: NEC Corporation
    Inventors: Mitsuo Nishiwaki, Tooru Amano, Tooru Yasuda, Sakae Okubo, Naoki Mukawa
  • Patent number: 4677480
    Abstract: Inter-frame encoding/decoding equipment for television signals includes inter-frame encoding equipment generating an encoded signal by encoding a difference between television signals and the output of a frame memory and inter-frame decoding equipment which receives the encoded signal sent from the inter-frame encoding device via a transmission line. The decoding equipment decodes by adding its output of the frame memory to the encoded signal. The inter-frame encoding equipment is provided with a first operation circuit which calculates remainders obtained by dividing a predetermined value, into bit groups of the output or the input of the frame memory. The inter-frame decoding equipment is provided with a second operation circuit which calculates remainders obtained by dividing, the predetermined value, into the bit groups of the output or the input of its frame memory.
    Type: Grant
    Filed: June 14, 1984
    Date of Patent: June 30, 1987
    Assignees: Nippon Telegraph & Telephone Public Corp., Fujitsu Limited, NEC Corp.
    Inventors: Hideo Kuroda, Naoki Mukawa, Makoto Hiraoka, Kiichi Matsuda, Mitsuo Nishiwaki, Shuzo Tsugane
  • Patent number: 4603347
    Abstract: Intraframe coding and decoding equipment are used in a communication network for digital video signals. Video signal sources which have various frequency deviations are transmitted by the communication network. Each of the intraframe coding and decoding equipment items has a locked sampling coding algorithm which is suitable for an input video signal with high frequency precision and a nonlocked sampling coding algorithm which is suitable for an input video signal with low frequency precision. It is determined whether or not the frequency precision (i.e., the frequency deviation of the sync signal) falls within a predetermined range. One of the coding algorithms is selected in accordance with a detection result. The coding algorithm can be selected in accordance with a decoding algorithm of a receiving-side equipment. Switching of the coding algorithms is performed simultaneously with switching of the clock signals of the locked and unlocked sampling clocks.
    Type: Grant
    Filed: April 28, 1983
    Date of Patent: July 29, 1986
    Assignee: Nippon Telegraph & Telephone Public Corporation
    Inventors: Hideo Kuroda, Naoki Mukawa
  • Patent number: 4593267
    Abstract: A digital data code conversion circuit for a variable-word-length data code includes a data code conversion portion and a preparation circuit. In the preparation circuit, a variable-word-length data code having a word length greater than a number n is divided into a plurality of variable-word-length data codes having a word length less than or equal to the number n. The divided variable-word-length data codes are converted into fixed-word-length data codes having a word length n in the data code conversion portion.
    Type: Grant
    Filed: June 30, 1983
    Date of Patent: June 3, 1986
    Assignees: Nippon Telegraph & Telephone Public Corporation, Fujitsu Limited
    Inventors: Hideo Kuroda, Naoki Mukawa, Kiichi Matsuda, Toshihiro Honma, Hiroshi Fukuda
  • Patent number: 4591909
    Abstract: An interframe coding method performs predictive coding by dividing an input video signal into blocks each of which has a predetermined size, wherein a second memory for storing background data is arranged in addition to a first memory for storing coded picture data, and a block having a minimum prediction error among blocks read out from the first and second memories is detected as an optimal predictive block for every block of the input video signal, whereby predictive coding is performed by using the optimal predictive block. According to this method, after a moving element in the picture is displaced, the background area is monitored by using as predictive value data stored in the second memory. A prediction error becomes small, and coding efficiency is improved. In particular, motion compensated interframe coding is performed in addition to detection of the background area, thereby further improving the coding efficiency.
    Type: Grant
    Filed: April 20, 1984
    Date of Patent: May 27, 1986
    Assignee: Nippon Telegraph & Telephone Public Corp.
    Inventors: Hideo Kuroda, Naoki Mukawa