Patents by Inventor Naoki Sugawa

Naoki Sugawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190279894
    Abstract: A placement apparatus for placing a workpiece is provided. The placement apparatus includes a stage on which a workpiece can be placed in a processing vessel; an edge ring including a locking part which is disposed on the stage so as to surround a periphery of the workpiece; a conductive connecting member connected with the edge ring at the locking part; and a first contacting member configured to cause the edge ring to contact the stage, while the edge ring is connected with the connecting member.
    Type: Application
    Filed: March 6, 2019
    Publication date: September 12, 2019
    Inventors: Yohei UCHIDA, Naoki SUGAWA, Katsushi ABE, Tsuyoshi HIDA
  • Publication number: 20190164727
    Abstract: A part for a semiconductor manufacturing apparatus, the part being enabled to cause electricity to pass through and including an insulating member.
    Type: Application
    Filed: November 20, 2018
    Publication date: May 30, 2019
    Inventors: Naoki SUGAWA, Naoyuki SATOH, Kazuya NAGASEKI
  • Patent number: 5343199
    Abstract: A resistor string circuit, which is for use in a D/A converter or an A/D converter, has a first resistor string 11 and a second resistor string 12. The first resistor string 11 is connected between a ground potential point Vss and a reference potential point Vref and has resistor elements R11 to R18 connected in series to one another. Likewise, the second resistor string 12 is connected between a ground potential point Vss and a reference potential point Vref and has resistor elements R21 to R28 connected in series to one another. The ground potential point Vss of the second resistor string 12 is located in the vicinity of the reference potential point Vref of the first resistor string 11, and the reference potential point Vref of the second resistor string 12 is located in the vicinity of the ground potential point Vss. Those nodes of the first and second resistor strings 11 and 12 which are the same in potential level are connected by means of wiring layers 14, 17 and 20.
    Type: Grant
    Filed: January 28, 1993
    Date of Patent: August 30, 1994
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Naoki Sugawa
  • Patent number: 4893124
    Abstract: An A/D converter of this invention includes a first A/D converter for A/D-converting the input signal and determining upper bits of the n-bit binary code, first and second sample-hold circuits, which are alternately switched each time the first A/D converter samples the analog input signal, for sampling and holding the analog input signal, in synchronism with a sampling timing of the first A/D converter, and a second A/D converter. The second A/D converter is constituted by a reference voltage generator for generating reference voltages, based on contents of the binary code obtained by the first A/D converter, a voltage comparator for comparing the reference voltage with a voltage value of the analog input signal held in one of the first and second sample-hold circuits, which sample and hold the analog input signal corresponding to the binary code, and an encoder for encoding a comparison result output from the voltage comparator and determining lower bits of the n bits.
    Type: Grant
    Filed: March 2, 1988
    Date of Patent: January 9, 1990
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kazuhiro Tsuji, Tetsuya Iida, Naoki Sugawa
  • Patent number: 4827260
    Abstract: A digital-to-analog converter of current segment type, having a plurality of first variable current sources and a second variable current source of the same structure as the first variable current sources. The converter further comprises a comparator. The comparator compares a voltage corresponding to the output current of the second variable current source with a reference voltage. The difference between these compared voltages is used to determine the output currents of the first variable current sources.
    Type: Grant
    Filed: February 29, 1988
    Date of Patent: May 2, 1989
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Naoki Sugawa, Tetsuya Iida